disk: Remove instance conditionals from nxp usdhc driver functions
Refactors the nxp usdhc driver to remove instance-specific conditionals from driver functions. Now all instance-specific details, such as power and card detect gpios, are contained in the driver config structure. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
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47463173c7
commit
ec53518fa5
1 changed files with 72 additions and 122 deletions
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@ -377,6 +377,18 @@ enum usdhc_endian_mode {
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struct usdhc_config {
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USDHC_Type *base;
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char *clock_name;
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clock_control_subsys_t clock_subsys;
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uint8_t nusdhc;
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char *pwr_name;
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uint8_t pwr_pin;
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gpio_dt_flags_t pwr_flags;
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char *detect_name;
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uint8_t detect_pin;
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gpio_dt_flags_t detect_flags;
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uint32_t data_timeout;
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/* Data timeout value
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*/
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@ -438,29 +450,18 @@ struct usdhc_client_info {
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enum sd_voltage voltage;
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};
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struct usdhc_board_config {
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struct device *pwr_gpio;
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uint32_t pwr_pin;
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gpio_dt_flags_t pwr_flags;
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struct device *detect_gpio;
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uint32_t detect_pin;
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gpio_dt_flags_t detect_flags;
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struct gpio_callback detect_cb;
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};
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struct usdhc_priv {
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bool host_ready;
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uint8_t status;
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uint8_t nusdhc;
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struct usdhc_board_config board_cfg;
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struct device *pwr_gpio;
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struct device *detect_gpio;
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struct gpio_callback detect_cb;
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enum host_detect_type detect_type;
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bool inserted;
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struct device *clock_dev;
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clock_control_subsys_t clock_sys;
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struct usdhc_config host_config;
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struct usdhc_capability host_capability;
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@ -2010,11 +2011,11 @@ static int usdhc_select_bus_timing(struct usdhc_priv *priv)
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/* config IO strength in IOMUX*/
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if (priv->card_info.sd_timing == SD_TIMING_SDR50_MODE) {
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imxrt_usdhc_pinmux(priv->nusdhc, false,
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imxrt_usdhc_pinmux(priv->host_config.nusdhc, false,
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CARD_BUS_FREQ_100MHZ1,
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CARD_BUS_STRENGTH_7);
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} else {
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imxrt_usdhc_pinmux(priv->nusdhc, false,
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imxrt_usdhc_pinmux(priv->host_config.nusdhc, false,
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CARD_BUS_FREQ_200MHZ,
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CARD_BUS_STRENGTH_7);
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}
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@ -2038,7 +2039,7 @@ static int usdhc_select_bus_timing(struct usdhc_priv *priv)
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/* set default IO strength to 4 to cover card adapter driver
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* strength difference
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*/
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imxrt_usdhc_pinmux(priv->nusdhc, false,
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imxrt_usdhc_pinmux(priv->host_config.nusdhc, false,
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CARD_BUS_FREQ_100MHZ1,
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CARD_BUS_STRENGTH_4);
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}
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@ -2224,10 +2225,10 @@ static void usdhc_host_hw_init(USDHC_Type *base,
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static void usdhc_cd_gpio_cb(struct device *dev,
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struct gpio_callback *cb, uint32_t pins)
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{
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struct usdhc_board_config *board_cfg =
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CONTAINER_OF(cb, struct usdhc_board_config, detect_cb);
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struct usdhc_priv *priv =
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CONTAINER_OF(cb, struct usdhc_priv, detect_cb);
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gpio_pin_interrupt_configure(dev, board_cfg->detect_pin,
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gpio_pin_interrupt_configure(dev, priv->host_config.detect_pin,
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GPIO_INT_DISABLE);
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}
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@ -2594,68 +2595,28 @@ static int usdhc_board_access_init(struct usdhc_priv *priv)
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int ret;
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uint32_t gpio_level;
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if (priv->nusdhc == 0) {
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#if DT_NODE_HAS_PROP(DT_INST(0, nxp_imx_usdhc), pwr_gpios)
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priv->board_cfg.pwr_gpio =
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device_get_binding(
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DT_GPIO_LABEL(DT_INST(0, nxp_imx_usdhc), pwr_gpios));
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if (!priv->board_cfg.pwr_gpio) {
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if (priv->host_config.pwr_name) {
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priv->pwr_gpio =
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device_get_binding(priv->host_config.pwr_name);
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if (!priv->pwr_gpio) {
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return -ENODEV;
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}
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priv->board_cfg.pwr_pin =
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DT_GPIO_PIN(DT_INST(0, nxp_imx_usdhc), pwr_gpios);
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priv->board_cfg.pwr_flags =
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DT_GPIO_FLAGS(DT_INST(0, nxp_imx_usdhc), pwr_gpios);
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#endif
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#if DT_NODE_HAS_PROP(DT_INST(0, nxp_imx_usdhc), cd_gpios)
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priv->detect_type = SD_DETECT_GPIO_CD;
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priv->board_cfg.detect_gpio =
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device_get_binding(
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DT_GPIO_LABEL(DT_INST(0, nxp_imx_usdhc), cd_gpios));
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if (!priv->board_cfg.detect_gpio) {
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return -ENODEV;
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}
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priv->board_cfg.detect_pin =
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DT_GPIO_PIN(DT_INST(0, nxp_imx_usdhc), cd_gpios);
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priv->board_cfg.detect_flags =
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DT_GPIO_FLAGS(DT_INST(0, nxp_imx_usdhc), cd_gpios);
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#endif
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} else if (priv->nusdhc == 1) {
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#if DT_NODE_HAS_PROP(DT_INST(1, nxp_imx_usdhc), pwr_gpios)
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priv->board_cfg.pwr_gpio =
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device_get_binding(
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DT_GPIO_LABEL(DT_INST(1, nxp_imx_usdhc), pwr_gpios));
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if (!priv->board_cfg.pwr_gpio) {
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return -ENODEV;
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}
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priv->board_cfg.pwr_pin =
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DT_GPIO_PIN(DT_INST(1, nxp_imx_usdhc), pwr_gpios);
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priv->board_cfg.pwr_flags =
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DT_GPIO_FLAGS(DT_INST(1, nxp_imx_usdhc), pwr_gpios);
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#endif
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#if DT_NODE_HAS_PROP(DT_INST(1, nxp_imx_usdhc), cd_gpios)
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priv->detect_type = SD_DETECT_GPIO_CD;
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priv->board_cfg.detect_gpio =
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device_get_binding(
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DT_GPIO_LABEL(DT_INST(1, nxp_imx_usdhc), cd_gpios));
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if (!priv->board_cfg.detect_gpio) {
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return -ENODEV;
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}
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priv->board_cfg.detect_pin =
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DT_GPIO_PIN(DT_INST(1, nxp_imx_usdhc), cd_gpios);
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priv->board_cfg.detect_flags =
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DT_GPIO_FLAGS(DT_INST(1, nxp_imx_usdhc), cd_gpios);
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#endif
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} else {
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return -ENODEV;
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}
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if (priv->board_cfg.pwr_gpio) {
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ret = gpio_pin_configure(priv->board_cfg.pwr_gpio,
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priv->board_cfg.pwr_pin,
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if (priv->host_config.detect_name) {
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priv->detect_type = SD_DETECT_GPIO_CD;
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priv->detect_gpio =
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device_get_binding(priv->host_config.detect_name);
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if (!priv->detect_gpio) {
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return -ENODEV;
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}
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}
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if (priv->pwr_gpio) {
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ret = gpio_pin_configure(priv->pwr_gpio,
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priv->host_config.pwr_pin,
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GPIO_OUTPUT_ACTIVE |
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priv->board_cfg.pwr_flags);
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priv->host_config.pwr_flags);
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if (ret) {
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return ret;
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}
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@ -2666,20 +2627,19 @@ static int usdhc_board_access_init(struct usdhc_priv *priv)
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k_busy_wait(100000);
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}
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if (!priv->board_cfg.detect_gpio) {
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if (!priv->detect_gpio) {
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LOG_INF("USDHC detection other than GPIO not implemented!\r\n");
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return 0;
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}
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ret = usdhc_cd_gpio_init(priv->board_cfg.detect_gpio,
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priv->board_cfg.detect_pin,
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priv->board_cfg.detect_flags,
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&priv->board_cfg.detect_cb);
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ret = usdhc_cd_gpio_init(priv->detect_gpio,
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priv->host_config.detect_pin,
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priv->host_config.detect_flags,
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&priv->detect_cb);
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if (ret) {
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return ret;
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}
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ret = gpio_pin_get(priv->board_cfg.detect_gpio,
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priv->board_cfg.detect_pin);
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ret = gpio_pin_get(priv->detect_gpio, priv->host_config.detect_pin);
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if (ret < 0) {
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return ret;
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}
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@ -2701,43 +2661,19 @@ static int usdhc_board_access_init(struct usdhc_priv *priv)
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static int usdhc_access_init(const struct device *dev)
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{
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const struct usdhc_config *config = dev->config_info;
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struct usdhc_priv *priv = dev->driver_data;
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int ret;
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(void)k_mutex_lock(&z_usdhc_init_lock, K_FOREVER);
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memset((char *)priv, 0, sizeof(struct usdhc_priv));
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#if DT_NODE_HAS_STATUS(DT_INST(0, nxp_imx_usdhc), okay)
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if (!strcmp(dev->name, DT_LABEL(DT_INST(0, nxp_imx_usdhc)))) {
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priv->host_config.base =
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(USDHC_Type *)DT_REG_ADDR(DT_INST(0, nxp_imx_usdhc));
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priv->nusdhc = 0;
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priv->clock_dev = device_get_binding(
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DT_CLOCKS_LABEL(DT_INST(0, nxp_imx_usdhc)));
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if (priv->clock_dev == NULL) {
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return -EINVAL;
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}
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priv->clock_sys =
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(clock_control_subsys_t)
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DT_CLOCKS_CELL(DT_INST(0, nxp_imx_usdhc), name);
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}
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#endif
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priv->host_config = *config;
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#if DT_NODE_HAS_STATUS(DT_INST(1, nxp_imx_usdhc), okay)
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if (!strcmp(dev->name, DT_LABEL(DT_INST(1, nxp_imx_usdhc)))) {
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priv->host_config.base =
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(USDHC_Type *)DT_REG_ADDR(DT_INST(1, nxp_imx_usdhc));
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priv->nusdhc = 1;
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priv->clock_dev = device_get_binding(
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DT_CLOCKS_LABEL(DT_INST(1, nxp_imx_usdhc)));
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if (priv->clock_dev == NULL) {
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return -EINVAL;
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}
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priv->clock_sys =
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(clock_control_subsys_t)
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DT_CLOCKS_CELL(DT_INST(1, nxp_imx_usdhc), name);
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priv->clock_dev = device_get_binding(priv->host_config.clock_name);
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if (priv->clock_dev == NULL) {
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return -EINVAL;
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}
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#endif
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if (!priv->host_config.base) {
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k_mutex_unlock(&z_usdhc_init_lock);
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@ -2745,7 +2681,8 @@ static int usdhc_access_init(const struct device *dev)
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return -ENODEV;
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}
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if (clock_control_get_rate(priv->clock_dev, priv->clock_sys,
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if (clock_control_get_rate(priv->clock_dev,
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priv->host_config.clock_subsys,
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&priv->host_config.src_clk_hz)) {
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return -EINVAL;
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}
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@ -2757,13 +2694,6 @@ static int usdhc_access_init(const struct device *dev)
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return ret;
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}
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priv->host_config.data_timeout = USDHC_DATA_TIMEOUT;
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priv->host_config.endian = USDHC_LITTLE_ENDIAN;
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priv->host_config.read_watermark = USDHC_READ_WATERMARK_LEVEL;
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priv->host_config.write_watermark = USDHC_WRITE_WATERMARK_LEVEL;
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priv->host_config.read_burst_len = USDHC_READ_BURST_LEN;
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priv->host_config.write_burst_len = USDHC_WRITE_BURST_LEN;
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priv->op_context.dma_cfg.dma_mode = USDHC_DMA_ADMA2;
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priv->op_context.dma_cfg.burst_len = USDHC_INCR_BURST_LEN;
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/*No DMA used for this Version*/
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@ -2877,13 +2807,33 @@ static int disk_usdhc_init(struct device *dev)
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}
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#define DISK_ACCESS_USDHC_INIT(n) \
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static const struct usdhc_config usdhc_config_##n = { \
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.base = (USDHC_Type *) DT_INST_REG_ADDR(n), \
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.clock_name = DT_INST_CLOCKS_LABEL(n), \
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.clock_subsys = \
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(clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name), \
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.nusdhc = n, \
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.pwr_name = DT_INST_GPIO_LABEL(n, pwr_gpios), \
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.pwr_pin = DT_INST_GPIO_PIN(n, pwr_gpios), \
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.pwr_flags = DT_INST_GPIO_FLAGS(n, pwr_gpios), \
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.detect_name = DT_INST_GPIO_LABEL(n, cd_gpios), \
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.detect_pin = DT_INST_GPIO_PIN(n, cd_gpios), \
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.detect_flags = DT_INST_GPIO_FLAGS(n, cd_gpios), \
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.data_timeout = USDHC_DATA_TIMEOUT, \
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.endian = USDHC_LITTLE_ENDIAN, \
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.read_watermark = USDHC_READ_WATERMARK_LEVEL, \
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.write_watermark = USDHC_WRITE_WATERMARK_LEVEL, \
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.read_burst_len = USDHC_READ_BURST_LEN, \
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.write_burst_len = USDHC_WRITE_BURST_LEN, \
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}; \
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\
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static struct usdhc_priv usdhc_priv_##n; \
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\
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DEVICE_AND_API_INIT(usdhc_dev##n, \
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DT_INST_LABEL(n), \
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&disk_usdhc_init, \
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&usdhc_priv_##n, \
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NULL, \
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&usdhc_config_##n, \
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APPLICATION, \
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CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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NULL);
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