dts: arm: st: Remove use of CONFIG_SOC_* from STM32 F0 dts files

To move forward and remove use of Kconfig in dts files lets just create
SoC specific dtsi files that the boards can include.  We also seperate
out the F0 dtsi files into their own dir.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2018-09-25 22:06:34 -05:00 committed by Kumar Gala
commit ebd0ff9f28
19 changed files with 110 additions and 18 deletions

287
dts/arm/st/f0/stm32f0.dtsi Normal file
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@ -0,0 +1,287 @@
/*
* Copyright (c) 2017 RnDity Sp. z o.o.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <st/f0/stm32f0-pinctrl.dtsi>
#include <arm/armv6-m.dtsi>
#include <dt-bindings/clock/stm32_clock.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/gpio.h>
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-m0";
reg = <0>;
};
};
sram0: memory@20000000 {
device_type = "memory";
compatible = "mmio-sram";
};
soc {
flash-controller@40022000 {
compatible = "st,stm32f0-flash-controller";
label = "FLASH_CTRL";
reg = <0x40022000 0x400>;
interrupts = <3 0>;
#address-cells = <1>;
#size-cells = <1>;
flash0: flash@8000000 {
compatible = "soc-nv-flash";
label = "FLASH_STM32";
write-block-size = <2>;
};
};
rcc: rcc@40021000 {
compatible = "st,stm32-rcc";
clocks-controller;
#clock-cells = <2>;
reg = <0x40021000 0x400>;
label = "STM32_CLK_RCC";
};
pinctrl: pin-controller@48000000 {
compatible = "st,stm32-pinmux";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x48000000 0x1800>;
gpioa: gpio@48000000 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48000000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00020000>;
label = "GPIOA";
};
gpiob: gpio@48000400 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48000400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00040000>;
label = "GPIOB";
};
gpioc: gpio@48000800 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48000800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00080000>;
label = "GPIOC";
};
gpiod: gpio@48000c00 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48000c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00100000>;
label = "GPIOD";
};
gpiof: gpio@48001400 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48001400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00400000>;
label = "GPIOF";
};
};
usart1: serial@40013800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40013800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00004000>;
interrupts = <27 0>;
status = "disabled";
label = "UART_1";
};
usart2: serial@40004400 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00020000>;
interrupts = <28 0>;
status = "disabled";
label = "UART_2";
};
i2c1: i2c@40005400 {
compatible = "st,stm32-i2c-v2";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00200000>;
interrupts = <23 0>;
interrupt-names = "combined";
status = "disabled";
label= "I2C_1";
};
i2c2: i2c@40005800 {
compatible = "st,stm32-i2c-v2";
clock-frequency = <I2C_BITRATE_STANDARD>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>;
interrupts = <24 0>;
interrupt-names = "combined";
status = "disabled";
label= "I2C_2";
};
spi1: spi@40013000 {
compatible = "st,stm32-spi-fifo";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40013000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>;
interrupts = <25 3>;
status = "disabled";
label = "SPI_1";
};
timers1: timers@40012c00 {
compatible = "st,stm32-timers";
reg = <0x40012c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000800>;
status = "disabled";
label = "TIMERS_1";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_1";
};
};
timers3: timers@40000400 {
compatible = "st,stm32-timers";
reg = <0x40000400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000002>;
status = "disabled";
label = "TIMERS_3";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_3";
};
};
timers6: timers@40001000 {
compatible = "st,stm32-timers";
reg = <0x40001000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000010>;
status = "disabled";
label = "TIMERS_6";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_6";
};
};
timers7: timers@40001400 {
compatible = "st,stm32-timers";
reg = <0x40001400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000020>;
status = "disabled";
label = "TIMERS_7";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_7";
};
};
timers14: timers@40002000 {
compatible = "st,stm32-timers";
reg = <0x40002000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000100>;
status = "disabled";
label = "TIMERS_14";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_14";
};
};
timers15: timers@40014000 {
compatible = "st,stm32-timers";
reg = <0x40014000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00010000>;
status = "disabled";
label = "TIMERS_15";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_15";
};
};
timers16: timers@40014400 {
compatible = "st,stm32-timers";
reg = <0x40014400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00020000>;
status = "disabled";
label = "TIMERS_16";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_16";
};
};
timers17: timers@40014800 {
compatible = "st,stm32-timers";
reg = <0x40014800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00040000>;
status = "disabled";
label = "TIMERS_17";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
st,prescaler = <10000>;
label = "PWM_17";
};
};
};
};
&nvic {
arm,num-irq-priority-bits = <2>;
};