eth: dw: Add driver for Synopsys DesignWare Ethernet MAC
This patch adds a driver for a Synopsys DesignWare Ethernet MAC. The driver uses interrupts to handle received frames, but it uses a spinloop when transmitting to wait for the transmit descriptor to become available. Transmission is coordinated by a fiber, so this should not result in the system execution being blocked. Only a single descriptor is allocated for each of the transmit and receive directions to save memory and simplify the code. Another simplification is that none of the offload capabilities of the Ethernet device are used. The driver currently only supports a single instance of the Ethernet MAC, which is consistent with the limitation in the network stack that only a single network device is supported. Change-Id: I013b3d439a76e8ff91a775516f7035841b040870 Signed-off-by: Michael LeMay <michael.lemay@intel.com>
This commit is contained in:
Michael LeMay
Anas Nashif
parent
0927378a59
commit
ebba3bf38b
9 changed files with 745 additions and 0 deletions
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@ -25,6 +25,8 @@ source "drivers/bluetooth/Kconfig"
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source "drivers/console/Kconfig"
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source "drivers/console/Kconfig"
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source "drivers/ethernet/Kconfig"
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source "drivers/serial/Kconfig"
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source "drivers/serial/Kconfig"
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source "drivers/interrupt_controller/Kconfig"
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source "drivers/interrupt_controller/Kconfig"
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@ -17,3 +17,4 @@ obj-$(CONFIG_GPIO) += gpio/
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obj-$(CONFIG_I2C) += i2c/
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obj-$(CONFIG_I2C) += i2c/
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obj-$(CONFIG_PWM) += pwm/
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obj-$(CONFIG_PWM) += pwm/
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obj-$(CONFIG_ADC) += adc/
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obj-$(CONFIG_ADC) += adc/
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obj-$(CONFIG_ETHERNET) += ethernet/
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125
drivers/ethernet/Kconfig
Normal file
125
drivers/ethernet/Kconfig
Normal file
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@ -0,0 +1,125 @@
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# Kconfig - Synopsys DesignWare Ethernet driver configuration options
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#
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# Copyright (c) 2015 Intel Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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menuconfig ETH_DW
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bool
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prompt "Synopsys DesignWare Ethernet driver"
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depends on ETHERNET
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default n
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help
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Enable Synopsys DesignWare Ethernet driver.
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if ETH_DW
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config ETH_DW_SHARED_IRQ
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bool
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default n
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config ETH_DW_VENDOR_ID
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hex "PCI Vendor ID"
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depends on PCI
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default 0x8086
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config ETH_DW_DEVICE_ID
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hex "PCI Device ID"
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depends on PCI
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default 0x937
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config ETH_DW_CLASS
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hex "PCI class"
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depends on PCI
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default 0x02
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config ETH_DW_0
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bool "Synopsys DesignWare Ethernet port 0"
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default n
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help
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Include port 0 driver
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config ETH_DW_0_NAME
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string "Driver name"
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depends on ETH_DW_0
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default "ETH_0"
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config ETH_DW_0_BASE_ADDR
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hex "MAC base address"
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depends on ETH_DW_0
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default 0x00000000
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config ETH_DW_0_BUS
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int "Port 0 PCI bus number"
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depends on ETH_DW_0 && PCI
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default 0
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config ETH_DW_0_DEV
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int "Port 0 PCI device number"
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depends on ETH_DW_0 && PCI
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default 20
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config ETH_DW_0_FUNCTION
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int "Port 0 PCI function number"
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depends on ETH_DW_0 && PCI
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default 6
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config ETH_DW_0_BAR
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int "Port 0 PCI BAR slot"
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depends on ETH_DW_0 && PCI
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default 0
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choice
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prompt "Port 0 Interrupts via"
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default ETH_DW_0_IRQ_SHARED
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depends on ETH_DW_0
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config ETH_DW_0_IRQ_DIRECT
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bool "Direct Hardware Interrupt"
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help
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When interrupts fire, the driver's ISR function is being called directly.
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config ETH_DW_0_IRQ_SHARED
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bool "Shared IRQ"
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depends on SHARED_IRQ
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select ETH_DW_SHARED_IRQ
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help
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When interrupts fire, the shared IRQ driver is notified. Then the shared IRQ
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driver dispatches the interrupt to other drivers.
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endchoice
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config ETH_DW_0_IRQ_SHARED_NAME
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string "Device name for Shared IRQ"
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depends on ETH_DW_0 && ETH_DW_0_IRQ_SHARED
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help
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Specify the device name for the shared IRQ driver. It is used to register
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this driver with the shared IRQ driver, so interrupts can be dispatched
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correctly.
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config ETH_DW_0_IRQ
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int "Controller interrupt number"
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depends on ETH_DW_0 && ETH_DW_0_IRQ_DIRECT
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default 0
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help
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IRQ number for the controller
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config ETH_DW_0_PRI
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int "Controller interrupt priority"
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depends on ETH_DW_0 && ETH_DW_0_IRQ_DIRECT
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default 0
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help
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IRQ priority
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endif # ETH_DW
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7
drivers/ethernet/Makefile
Normal file
7
drivers/ethernet/Makefile
Normal file
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@ -0,0 +1,7 @@
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ccflags-y += ${PROJECTINCLUDE}
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ccflags-y += -I${srctree}/net/ip/contiki
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ccflags-y += -I${srctree}/net/ip/contiki/os/lib
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ccflags-y += -I${srctree}/net/ip/contiki/os
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ccflags-y += -I${srctree}
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obj-$(CONFIG_ETH_DW) += eth_dw.o eth_static_irq_stubs.o
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341
drivers/ethernet/eth_dw.c
Normal file
341
drivers/ethernet/eth_dw.c
Normal file
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@ -0,0 +1,341 @@
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/*
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* Copyright (c) 2015 Intel Corporation.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <nanokernel.h>
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#include <sys_io.h>
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#include <board.h>
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#include <init.h>
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#include <string.h>
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#include <stdio.h>
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#include <stdbool.h>
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#include "ethernet.h"
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#include "eth_dw_priv.h"
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#include <net/ip/net_driver_ethernet.h>
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#include <misc/__assert.h>
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#ifdef CONFIG_SHARED_IRQ
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#include <shared_irq.h>
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#endif
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static inline uint32_t eth_read(uint32_t base_addr, uint32_t offset)
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{
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return sys_read32(base_addr + offset);
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}
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static inline void eth_write(uint32_t base_addr, uint32_t offset,
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uint32_t val)
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{
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sys_write32(val, base_addr + offset);
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}
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static void eth_rx(struct device *port)
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{
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struct eth_runtime *context = port->driver_data;
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struct eth_config *config = port->config->config_info;
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uint32_t base_addr = config->base_addr;
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struct net_buf *buf;
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uint32_t frm_len = 0;
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/* Check whether the RX descriptor is still owned by the device. If not,
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* process the received frame or an error that may have occurred.
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*/
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if (context->rx_desc.own == 1) {
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ETH_ERR("Spurious receive interrupt from Ethernet MAC.\n");
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return;
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}
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if (!net_driver_ethernet_is_opened()) {
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goto release_desc;
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}
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if (context->rx_desc.err_summary) {
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ETH_ERR("Error receiving frame: RDES0 = %08x, RDES1 = %08x.\n",
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context->rx_desc.rdes0, context->rx_desc.rdes1);
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goto release_desc;
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}
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buf = net_buf_get_reserve_rx(0);
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if (buf == NULL) {
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ETH_ERR("Failed to obtain RX buffer.\n");
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goto release_desc;
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}
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frm_len = context->rx_desc.frm_len;
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if (frm_len > UIP_BUFSIZE) {
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ETH_ERR("Frame too large: %u.\n", frm_len);
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goto release_desc;
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}
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memcpy(uip_buf(buf), (void *)context->rx_buf, frm_len);
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uip_len(buf) = frm_len;
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net_driver_ethernet_recv(buf);
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release_desc:
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/* Return ownership of the RX descriptor to the device. */
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context->rx_desc.own = 1;
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/* Request that the device check for an available RX descriptor, since
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* ownership of the descriptor was just transferred to the device.
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*/
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eth_write(base_addr, REG_ADDR_RX_POLL_DEMAND, 1);
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}
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/* @brief Transmit the current Ethernet frame.
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*
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* This procedure will block indefinitely until the Ethernet device is
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* ready to accept a new outgoing frame. It then copies the current
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* Ethernet frame from the global uip_buf buffer to the device DMA
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* buffer and signals to the device that a new frame is available to be
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* transmitted.
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*/
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static int eth_tx(struct device *port, struct net_buf *buf)
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{
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struct eth_runtime *context = port->driver_data;
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struct eth_config *config = port->config->config_info;
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uint32_t base_addr = config->base_addr;
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/* Wait until the TX descriptor is no longer owned by the device. */
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while (context->tx_desc.own == 1) {
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}
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#ifdef CONFIG_ETHERNET_DEBUG
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/* Check whether an error occurred transmitting the previous frame. */
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if (context->tx_desc.err_summary) {
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ETH_ERR("Error transmitting frame: TDES0 = %08x, TDES1 = %08x.\n",
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context->tx_desc.tdes0, context->tx_desc.tdes1);
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}
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#endif
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/* Transmit the next frame. */
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if (uip_len(buf) > UIP_BUFSIZE) {
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ETH_ERR("Frame too large to TX: %u\n", uip_len(buf));
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return -1;
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}
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memcpy((void *)context->tx_buf, uip_buf(buf), uip_len(buf));
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context->tx_desc.tx_buf1_sz = uip_len(buf);
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context->tx_desc.own = 1;
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/* Request that the device check for an available TX descriptor, since
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* ownership of the descriptor was just transferred to the device.
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*/
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eth_write(base_addr, REG_ADDR_TX_POLL_DEMAND, 1);
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return 1;
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}
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void eth_dw_isr(struct device *port)
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{
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struct eth_config *config = port->config->config_info;
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uint32_t base_addr = config->base_addr;
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uint32_t int_status;
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int_status = eth_read(base_addr, REG_ADDR_STATUS);
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#ifdef CONFIG_SHARED_IRQ
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/* If using with shared IRQ, this function will be called
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* by the shared IRQ driver. So check here if the interrupt
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* is coming from the GPIO controller (or somewhere else).
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*/
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if ((int_status & STATUS_RX_INT) == 0) {
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return;
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}
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#endif
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eth_rx(port);
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/* Acknowledge the interrupt. */
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eth_write(base_addr, REG_ADDR_STATUS, STATUS_RX_INT);
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}
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#ifdef CONFIG_PCI
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static inline int eth_setup(struct device *dev)
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{
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struct eth_config *config = dev->config->config_info;
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pci_bus_scan_init();
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if (!pci_bus_scan(&config->pci_dev))
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return 0;
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#ifdef CONFIG_PCI_ENUMERATION
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config->base_addr = config->pci_dev.addr;
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config->irq_num = config->pci_dev.irq;
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#endif
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pci_enable_regs(&config->pci_dev);
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pci_enable_bus_master(&config->pci_dev);
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pci_show(&config->pci_dev);
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return 1;
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}
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#else
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#define eth_setup(_unused_) (1)
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#endif /* CONFIG_PCI */
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static int eth_net_tx(struct net_buf *buf);
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static int eth_initialize(struct device *port)
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{
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struct eth_runtime *context = port->driver_data;
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struct eth_config *config = port->config->config_info;
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uint32_t base_addr;
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union {
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struct {
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uint8_t bytes[6];
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uint8_t pad[2];
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} __attribute__((packed));
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uint32_t words[2];
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} mac_addr;
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if (!eth_setup(port))
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return DEV_NOT_CONFIG;
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base_addr = config->base_addr;
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/* Read the MAC address from the device. */
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mac_addr.words[1] = eth_read(base_addr, REG_ADDR_MACADDR_HI);
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mac_addr.words[0] = eth_read(base_addr, REG_ADDR_MACADDR_LO);
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net_set_mac(mac_addr.bytes, sizeof(mac_addr.bytes));
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/* Initialize transmit descriptor. */
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context->tx_desc.tdes0 = 0;
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context->tx_desc.tdes1 = 0;
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context->tx_desc.buf1_ptr = (uint8_t *)context->tx_buf;
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context->tx_desc.tx_end_of_ring = 1;
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context->tx_desc.first_seg_in_frm = 1;
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context->tx_desc.last_seg_in_frm = 1;
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context->tx_desc.tx_end_of_ring = 1;
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/* Initialize receive descriptor. */
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context->rx_desc.rdes0 = 0;
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context->rx_desc.rdes1 = 0;
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||||||
|
context->rx_desc.buf1_ptr = (uint8_t *)context->rx_buf;
|
||||||
|
context->rx_desc.own = 1;
|
||||||
|
context->rx_desc.first_desc = 1;
|
||||||
|
context->rx_desc.last_desc = 1;
|
||||||
|
context->rx_desc.rx_buf1_sz = UIP_BUFSIZE;
|
||||||
|
context->rx_desc.rx_end_of_ring = 1;
|
||||||
|
|
||||||
|
/* Install transmit and receive descriptors. */
|
||||||
|
eth_write(base_addr, REG_ADDR_RX_DESC_LIST, (uint32_t)&context->rx_desc);
|
||||||
|
eth_write(base_addr, REG_ADDR_TX_DESC_LIST, (uint32_t)&context->tx_desc);
|
||||||
|
|
||||||
|
eth_write(base_addr, REG_ADDR_MAC_CONF,
|
||||||
|
/* Set the RMII speed to 100Mbps */
|
||||||
|
MAC_CONF_14_RMII_100M |
|
||||||
|
/* Enable full-duplex mode */
|
||||||
|
MAC_CONF_11_DUPLEX |
|
||||||
|
/* Enable transmitter */
|
||||||
|
MAC_CONF_3_TX_EN |
|
||||||
|
/* Enable receiver */
|
||||||
|
MAC_CONF_2_RX_EN);
|
||||||
|
|
||||||
|
eth_write(base_addr, REG_ADDR_INT_ENABLE,
|
||||||
|
INT_ENABLE_NORMAL |
|
||||||
|
/* Enable receive interrupts */
|
||||||
|
INT_ENABLE_RX);
|
||||||
|
|
||||||
|
eth_write(base_addr, REG_ADDR_DMA_OPERATION,
|
||||||
|
/* Enable receive store-and-forward mode for simplicity. */
|
||||||
|
OP_MODE_25_RX_STORE_N_FORWARD |
|
||||||
|
/* Enable transmit store-and-forward mode for simplicity. */
|
||||||
|
OP_MODE_21_TX_STORE_N_FORWARD |
|
||||||
|
/* Place the transmitter state machine in the Running state. */
|
||||||
|
OP_MODE_13_START_TX |
|
||||||
|
/* Place the receiver state machine in the Running state. */
|
||||||
|
OP_MODE_1_START_RX);
|
||||||
|
|
||||||
|
ETH_INFO("Enabled 100M full-duplex mode.\n");
|
||||||
|
|
||||||
|
net_driver_ethernet_register_tx(eth_net_tx);
|
||||||
|
|
||||||
|
config->config_func(port);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Bindings to the plaform */
|
||||||
|
#if CONFIG_ETH_DW_0
|
||||||
|
static void eth_config_0_irq(struct device *port);
|
||||||
|
|
||||||
|
static struct eth_config eth_config_0 = {
|
||||||
|
.base_addr = CONFIG_ETH_DW_0_BASE_ADDR,
|
||||||
|
#ifdef CONFIG_ETH_DW_0_IRQ_DIRECT
|
||||||
|
.irq_num = CONFIG_ETH_DW_0_IRQ,
|
||||||
|
#endif
|
||||||
|
#if CONFIG_PCI
|
||||||
|
.pci_dev.class = CONFIG_ETH_DW_CLASS,
|
||||||
|
.pci_dev.bus = CONFIG_ETH_DW_0_BUS,
|
||||||
|
.pci_dev.dev = CONFIG_ETH_DW_0_DEV,
|
||||||
|
.pci_dev.vendor_id = CONFIG_ETH_DW_VENDOR_ID,
|
||||||
|
.pci_dev.device_id = CONFIG_ETH_DW_DEVICE_ID,
|
||||||
|
.pci_dev.function = CONFIG_ETH_DW_0_FUNCTION,
|
||||||
|
.pci_dev.bar = CONFIG_ETH_DW_0_BAR,
|
||||||
|
#endif
|
||||||
|
.config_func = eth_config_0_irq,
|
||||||
|
|
||||||
|
#ifdef CONFIG_ETH_DW_0_IRQ_SHARED
|
||||||
|
.shared_irq_dev_name = CONFIG_ETH_DW_0_IRQ_SHARED_NAME,
|
||||||
|
#endif
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct eth_runtime eth_0_runtime;
|
||||||
|
|
||||||
|
DECLARE_DEVICE_INIT_CONFIG(eth_dw_0, CONFIG_ETH_DW_0_NAME,
|
||||||
|
eth_initialize, ð_config_0);
|
||||||
|
nano_late_init(eth_dw_0, ð_0_runtime);
|
||||||
|
|
||||||
|
static int eth_net_tx(struct net_buf *buf)
|
||||||
|
{
|
||||||
|
return eth_tx(&__initconfig_eth_dw_0, buf);
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef CONFIG_ETH_DW_0_IRQ_DIRECT
|
||||||
|
IRQ_CONNECT_STATIC(eth_dw_0, CONFIG_ETH_DW_0_IRQ,
|
||||||
|
CONFIG_ETH_DW_0_PRI, eth_dw_isr, 0);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
static void eth_config_0_irq(struct device *port)
|
||||||
|
{
|
||||||
|
struct eth_config *config = port->config->config_info;
|
||||||
|
struct device *shared_irq_dev;
|
||||||
|
|
||||||
|
#ifdef CONFIG_ETH_DW_0_IRQ_DIRECT
|
||||||
|
ARG_UNUSED(shared_irq_dev);
|
||||||
|
IRQ_CONFIG(eth_dw_0, config->irq_num, 0);
|
||||||
|
irq_enable(config->irq_num);
|
||||||
|
#elif defined(CONFIG_ETH_DW_0_IRQ_SHARED)
|
||||||
|
shared_irq_dev = device_get_binding(config->shared_irq_dev_name);
|
||||||
|
__ASSERT(shared_irq_dev != NULL, "Failed to get eth_dw device binding");
|
||||||
|
shared_irq_isr_register(shared_irq_dev, (isr_t)eth_dw_isr, port);
|
||||||
|
shared_irq_enable(shared_irq_dev, port);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
#ifdef CONFIG_ETH_DW_0_IRQ_DIRECT
|
||||||
|
struct device *eth_dw_isr_0 = SYS_GET_DEVICE(eth_dw_0);
|
||||||
|
#endif /* CONFIG_ETH_DW_0_IRQ_DIRECT */
|
||||||
|
|
||||||
|
#endif /* CONFIG_ETH_DW_0 */
|
||||||
195
drivers/ethernet/eth_dw_priv.h
Normal file
195
drivers/ethernet/eth_dw_priv.h
Normal file
|
|
@ -0,0 +1,195 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2015 Intel Corporation.
|
||||||
|
*
|
||||||
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
* you may not use this file except in compliance with the License.
|
||||||
|
* You may obtain a copy of the License at
|
||||||
|
*
|
||||||
|
* http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
*
|
||||||
|
* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
* See the License for the specific language governing permissions and
|
||||||
|
* limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef DRIVERS_ETHERNET_ETH_DW_PRIV_H_
|
||||||
|
#define DRIVERS_ETHERNET_ETH_DW_PRIV_H_
|
||||||
|
|
||||||
|
#ifdef CONFIG_PCI
|
||||||
|
#include <pci/pci.h>
|
||||||
|
#include <pci/pci_mgr.h>
|
||||||
|
#endif /* CONFIG_PCI */
|
||||||
|
|
||||||
|
#include <misc/util.h>
|
||||||
|
|
||||||
|
#include "contiki/ip/uip.h"
|
||||||
|
|
||||||
|
typedef void (*eth_config_irq_t)(struct device *port);
|
||||||
|
|
||||||
|
struct eth_config {
|
||||||
|
uint32_t base_addr;
|
||||||
|
uint32_t irq_num;
|
||||||
|
#ifdef CONFIG_PCI
|
||||||
|
struct pci_dev_info pci_dev;
|
||||||
|
#endif /* CONFIG_PCI */
|
||||||
|
eth_config_irq_t config_func;
|
||||||
|
|
||||||
|
#ifdef CONFIG_ETH_DW_SHARED_IRQ
|
||||||
|
char *shared_irq_dev_name;
|
||||||
|
#endif /* CONFIG_ETH_DW_SHARED_IRQ */
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Refer to Intel Quark SoC X1000 Datasheet, Chapter 15 for more details on
|
||||||
|
* Ethernet device operation.
|
||||||
|
*
|
||||||
|
* This driver puts the Ethernet device into a very simple and space-efficient
|
||||||
|
* mode of operation. It only allocates a single packet descriptor for each of
|
||||||
|
* the transmit and receive directions, computes checksums on the CPU, and
|
||||||
|
* enables store-and-forward mode for both transmit and receive directions.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Transmit descriptor */
|
||||||
|
struct eth_tx_desc {
|
||||||
|
/* First word of transmit descriptor */
|
||||||
|
union {
|
||||||
|
struct {
|
||||||
|
/* Only valid in half-duplex mode. */
|
||||||
|
uint32_t deferred_bit : 1;
|
||||||
|
uint32_t err_underflow : 1;
|
||||||
|
uint32_t err_excess_defer : 1;
|
||||||
|
uint32_t coll_cnt_slot_num : 4;
|
||||||
|
uint32_t vlan_frm : 1;
|
||||||
|
uint32_t err_excess_coll : 1;
|
||||||
|
uint32_t err_late_coll : 1;
|
||||||
|
uint32_t err_no_carrier : 1;
|
||||||
|
uint32_t err_carrier_loss : 1;
|
||||||
|
uint32_t err_ip_payload : 1;
|
||||||
|
uint32_t err_frm_flushed : 1;
|
||||||
|
uint32_t err_jabber_tout : 1;
|
||||||
|
/* OR of all other error bits. */
|
||||||
|
uint32_t err_summary : 1;
|
||||||
|
uint32_t err_ip_hdr : 1;
|
||||||
|
uint32_t tx_timestamp_stat : 1;
|
||||||
|
uint32_t vlan_ins_ctrl : 2;
|
||||||
|
uint32_t addr2_chained : 1;
|
||||||
|
uint32_t tx_end_of_ring : 1;
|
||||||
|
uint32_t chksum_ins_ctrl : 2;
|
||||||
|
uint32_t replace_crc : 1;
|
||||||
|
uint32_t tx_timestamp_en : 1;
|
||||||
|
uint32_t dis_pad : 1;
|
||||||
|
uint32_t dis_crc : 1;
|
||||||
|
uint32_t first_seg_in_frm : 1;
|
||||||
|
uint32_t last_seg_in_frm : 1;
|
||||||
|
uint32_t intr_on_complete : 1;
|
||||||
|
/* When set, descriptor is owned by DMA. */
|
||||||
|
uint32_t own : 1;
|
||||||
|
};
|
||||||
|
uint32_t tdes0;
|
||||||
|
};
|
||||||
|
/* Second word of transmit descriptor */
|
||||||
|
union {
|
||||||
|
struct {
|
||||||
|
uint32_t tx_buf1_sz : 13;
|
||||||
|
uint32_t : 3;
|
||||||
|
uint32_t tx_buf2_sz : 13;
|
||||||
|
uint32_t src_addr_ins_ctrl : 3;
|
||||||
|
};
|
||||||
|
uint32_t tdes1;
|
||||||
|
};
|
||||||
|
/* Pointer to frame data buffer */
|
||||||
|
uint8_t *buf1_ptr;
|
||||||
|
/* Unused, since this driver initializes only a single descriptor for each
|
||||||
|
* direction.
|
||||||
|
*/
|
||||||
|
uint8_t *buf2_ptr;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Transmit descriptor */
|
||||||
|
struct eth_rx_desc {
|
||||||
|
/* First word of receive descriptor */
|
||||||
|
union {
|
||||||
|
struct {
|
||||||
|
uint32_t ext_stat : 1;
|
||||||
|
uint32_t err_crc : 1;
|
||||||
|
uint32_t err_dribble_bit : 1;
|
||||||
|
uint32_t err_rx_mii : 1;
|
||||||
|
uint32_t err_rx_wdt : 1;
|
||||||
|
uint32_t frm_type : 1;
|
||||||
|
uint32_t err_late_coll : 1;
|
||||||
|
uint32_t giant_frm : 1;
|
||||||
|
uint32_t last_desc : 1;
|
||||||
|
uint32_t first_desc : 1;
|
||||||
|
uint32_t vlan_tag : 1;
|
||||||
|
uint32_t err_overflow : 1;
|
||||||
|
uint32_t length_err : 1;
|
||||||
|
uint32_t s_addr_filt_fail : 1;
|
||||||
|
uint32_t err_desc : 1;
|
||||||
|
uint32_t err_summary : 1;
|
||||||
|
uint32_t frm_len : 14;
|
||||||
|
uint32_t d_addr_filt_fail : 1;
|
||||||
|
uint32_t own : 1;
|
||||||
|
};
|
||||||
|
uint32_t rdes0;
|
||||||
|
};
|
||||||
|
/* Second word of receive descriptor */
|
||||||
|
union {
|
||||||
|
struct {
|
||||||
|
uint32_t rx_buf1_sz : 13;
|
||||||
|
uint32_t : 1;
|
||||||
|
uint32_t addr2_chained : 1;
|
||||||
|
uint32_t rx_end_of_ring : 1;
|
||||||
|
uint32_t rx_buf2_sz : 13;
|
||||||
|
uint32_t : 2;
|
||||||
|
uint32_t dis_int_compl : 1;
|
||||||
|
};
|
||||||
|
uint32_t rdes1;
|
||||||
|
};
|
||||||
|
/* Pointer to frame data buffer */
|
||||||
|
uint8_t *buf1_ptr;
|
||||||
|
/* Unused, since this driver initializes only a single descriptor for each
|
||||||
|
* direction.
|
||||||
|
*/
|
||||||
|
uint8_t *buf2_ptr;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Driver metadata associated with each Ethernet device */
|
||||||
|
struct eth_runtime {
|
||||||
|
/* Transmit descriptor */
|
||||||
|
volatile struct eth_tx_desc tx_desc;
|
||||||
|
/* Transmit DMA packet buffer */
|
||||||
|
volatile uint8_t tx_buf[UIP_BUFSIZE];
|
||||||
|
/* Receive descriptor */
|
||||||
|
volatile struct eth_rx_desc rx_desc;
|
||||||
|
/* Receive DMA packet buffer */
|
||||||
|
volatile uint8_t rx_buf[UIP_BUFSIZE];
|
||||||
|
};
|
||||||
|
|
||||||
|
#define MAC_CONF_14_RMII_100M BIT(14)
|
||||||
|
#define MAC_CONF_11_DUPLEX BIT(11)
|
||||||
|
#define MAC_CONF_3_TX_EN BIT(3)
|
||||||
|
#define MAC_CONF_2_RX_EN BIT(2)
|
||||||
|
|
||||||
|
#define STATUS_RX_INT BIT(6)
|
||||||
|
|
||||||
|
#define OP_MODE_25_RX_STORE_N_FORWARD BIT(25)
|
||||||
|
#define OP_MODE_21_TX_STORE_N_FORWARD BIT(21)
|
||||||
|
#define OP_MODE_13_START_TX BIT(13)
|
||||||
|
#define OP_MODE_1_START_RX BIT(1)
|
||||||
|
|
||||||
|
#define INT_ENABLE_NORMAL BIT(16)
|
||||||
|
#define INT_ENABLE_RX BIT(6)
|
||||||
|
|
||||||
|
#define REG_ADDR_MAC_CONF 0x0000
|
||||||
|
#define REG_ADDR_MACADDR_HI 0x0040
|
||||||
|
#define REG_ADDR_MACADDR_LO 0x0044
|
||||||
|
#define REG_ADDR_TX_POLL_DEMAND 0x1004
|
||||||
|
#define REG_ADDR_RX_POLL_DEMAND 0x1008
|
||||||
|
#define REG_ADDR_RX_DESC_LIST 0x100C
|
||||||
|
#define REG_ADDR_TX_DESC_LIST 0x1010
|
||||||
|
#define REG_ADDR_STATUS 0x1014
|
||||||
|
#define REG_ADDR_DMA_OPERATION 0x1018
|
||||||
|
#define REG_ADDR_INT_ENABLE 0x101C
|
||||||
|
|
||||||
|
#endif /* DRIVERS_ETHERNET_ETH_DW_PRIV_H_ */
|
||||||
34
drivers/ethernet/eth_static_irq_stubs.S
Normal file
34
drivers/ethernet/eth_static_irq_stubs.S
Normal file
|
|
@ -0,0 +1,34 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2015, Intel Corporation
|
||||||
|
*
|
||||||
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
* you may not use this file except in compliance with the License.
|
||||||
|
* You may obtain a copy of the License at
|
||||||
|
*
|
||||||
|
* http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
*
|
||||||
|
* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
* See the License for the specific language governing permissions and
|
||||||
|
* limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @file
|
||||||
|
* @brief Ethernet interrupt stubs
|
||||||
|
* This module contains the static interrupt stubs for Ethernet drivers.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define _ASMLANGUAGE
|
||||||
|
|
||||||
|
#ifdef CONFIG_X86_32
|
||||||
|
#include <arch/x86/asm.h>
|
||||||
|
#include <drivers/ioapic.h>
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined(CONFIG_ETH_DW)
|
||||||
|
#if CONFIG_ETH_DW_0
|
||||||
|
ioapic_mkstub eth_dw_0 eth_dw_isr eth_dw_isr_0
|
||||||
|
#endif /* CONFIG_ETH_DW_0 */
|
||||||
|
#endif /* CONFIG_ETH_DW */
|
||||||
38
drivers/ethernet/ethernet.h
Normal file
38
drivers/ethernet/ethernet.h
Normal file
|
|
@ -0,0 +1,38 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2015 Intel Corporation.
|
||||||
|
*
|
||||||
|
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
* you may not use this file except in compliance with the License.
|
||||||
|
* You may obtain a copy of the License at
|
||||||
|
*
|
||||||
|
* http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
*
|
||||||
|
* Unless required by applicable law or agreed to in writing, software
|
||||||
|
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
* See the License for the specific language governing permissions and
|
||||||
|
* limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef DRIVERS_ETHERNET_ETHERNET_H_
|
||||||
|
#define DRIVERS_ETHERNET_ETHERNET_H_
|
||||||
|
|
||||||
|
#include <misc/printk.h>
|
||||||
|
|
||||||
|
#ifdef CONFIG_ETHERNET_DEBUG
|
||||||
|
|
||||||
|
#define ETH_DBG(fmt, ...) printk("ethernet: %s: " fmt, __func__, ##__VA_ARGS__)
|
||||||
|
#define ETH_ERR(fmt, ...) printk("ethernet: %s: " fmt, __func__, ##__VA_ARGS__)
|
||||||
|
#define ETH_INFO(fmt, ...) printk("ethernet: " fmt, ##__VA_ARGS__)
|
||||||
|
#define ETH_PRINT(fmt, ...) printk(fmt, ##__VA_ARGS__)
|
||||||
|
|
||||||
|
#else
|
||||||
|
|
||||||
|
#define ETH_DBG(fmt, ...)
|
||||||
|
#define ETH_ERR(fmt, ...)
|
||||||
|
#define ETH_INFO(fmt, ...)
|
||||||
|
#define ETH_PRINT(fmt, ...)
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* DRIVERS_ETHERNET_ETHERNET_H_ */
|
||||||
|
|
@ -77,6 +77,8 @@ static inline int is_power_of_two(unsigned int x)
|
||||||
#define KHZ(x) ((x) * 1000)
|
#define KHZ(x) ((x) * 1000)
|
||||||
#define MHZ(x) (KHZ(x) * 1000)
|
#define MHZ(x) (KHZ(x) * 1000)
|
||||||
|
|
||||||
|
#define BIT(n) (1UL << (n))
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
|
||||||
Loading…
Add table
Add a link
Reference in a new issue