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arch: arm: cortex_r: Add memory barriers for register accesses

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Cortex R has a write buffer that can cause reordering problems when
accessing memory mapped registers.  Use memory barries to make sure that
these accesses are performed in the desired order.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
This commit is contained in:
Bradley Bolen 2019-05-29 11:02:14 -04:00 • committed by Ioannis Glaropoulos
commit eb9515ab9c
2 changed files with 164 additions and 1 deletions
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3
include/arch/arm/arch.h
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@ -26,7 +26,6 @@
#include <arch/arm/irq.h>
#include <arch/arm/error.h>
#include <arch/arm/misc.h>
#include <arch/common/sys_io.h>
#include <arch/common/addr_types.h>
#include <arch/common/ffs.h>
#include <arch/arm/nmi.h>
@ -35,8 +34,10 @@
#ifdef CONFIG_CPU_CORTEX_M
#include <arch/arm/cortex_m/cpu.h>
#include <arch/arm/cortex_m/memory_map.h>
#include <arch/common/sys_io.h>
#elif defined(CONFIG_CPU_CORTEX_R)
#include <arch/arm/cortex_r/cpu.h>
#include <arch/arm/cortex_r/sys_io.h>
#endif
#ifdef __cplusplus