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drivers: pinctrl: silabs: add spi handling

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This commit adds pinctrl configuration for SPI on USART.

Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
This commit is contained in:
Pawel Czarnecki 2022-10-17 15:47:21 +02:00 • committed by Maureen Helm
commit eb4a0ae225
3 changed files with 55 additions and 11 deletions
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56
drivers/pinctrl/pinctrl_gecko.c
View file

@ -10,12 +10,17 @@
int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg) int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg)
{ {
#ifdef CONFIG_UART_GECKO
struct soc_gpio_pin rxpin = {0};
struct soc_gpio_pin txpin = {0};
USART_TypeDef *base = (USART_TypeDef *)reg; USART_TypeDef *base = (USART_TypeDef *)reg;
uint8_t loc;
int usart_num = USART_NUM(base); int usart_num = USART_NUM(base);
uint8_t loc;
#ifdef CONFIG_SPI_GECKO
struct soc_gpio_pin spi_pin_cfg = {0, 0, 0, 0};
#endif /* CONFIG_SPI_GECKO */
#ifdef CONFIG_UART_GECKO
struct soc_gpio_pin rxpin = {0, 0, 0, 0};
struct soc_gpio_pin txpin = {0, 0, 0, 0};
#endif /* CONFIG_UART_GECKO */ #endif /* CONFIG_UART_GECKO */
for (uint8_t i = 0U; i < pin_cnt; i++) { for (uint8_t i = 0U; i < pin_cnt; i++) {
@ -27,7 +32,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
rxpin.mode = gpioModeInput; rxpin.mode = gpioModeInput;
rxpin.out = 1; rxpin.out = 1;
GPIO_PinModeSet(rxpin.port, rxpin.pin, rxpin.mode, GPIO_PinModeSet(rxpin.port, rxpin.pin, rxpin.mode,
rxpin.out); rxpin.out);
break; break;
case GECKO_FUN_UART_TX: case GECKO_FUN_UART_TX:
txpin.port = GECKO_GET_PORT(pins[i]); txpin.port = GECKO_GET_PORT(pins[i]);
@ -35,12 +40,12 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
txpin.mode = gpioModePushPull; txpin.mode = gpioModePushPull;
txpin.out = 1; txpin.out = 1;
GPIO_PinModeSet(txpin.port, txpin.pin, txpin.mode, GPIO_PinModeSet(txpin.port, txpin.pin, txpin.mode,
txpin.out); txpin.out);
break; break;
case GECKO_FUN_UART_LOC: case GECKO_FUN_UART_LOC:
loc = GECKO_GET_LOC(pins[i]); loc = GECKO_GET_LOC(pins[i]);
#ifdef CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION #ifdef CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION
/* For SOCs with configurable pin locations (set in SOC Kconfig) */ /* For SOCs with configurable pin_cfg locations (set in SOC Kconfig) */
base->ROUTEPEN = USART_ROUTEPEN_RXPEN | USART_ROUTEPEN_TXPEN; base->ROUTEPEN = USART_ROUTEPEN_RXPEN | USART_ROUTEPEN_TXPEN;
base->ROUTELOC0 = (loc << _USART_ROUTELOC0_TXLOC_SHIFT) | base->ROUTELOC0 = (loc << _USART_ROUTELOC0_TXLOC_SHIFT) |
(loc << _USART_ROUTELOC0_RXLOC_SHIFT); (loc << _USART_ROUTELOC0_RXLOC_SHIFT);
@ -94,9 +99,46 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintp
#endif /* UART_GECKO_HW_FLOW_CONTROL */ #endif /* UART_GECKO_HW_FLOW_CONTROL */
break; break;
#endif /* CONFIG_UART_GECKO */ #endif /* CONFIG_UART_GECKO */
#ifdef CONFIG_SPI_GECKO
case GECKO_FUN_SPI_SCK:
spi_pin_cfg.port = GECKO_GET_PORT(pins[i]);
spi_pin_cfg.pin = GECKO_GET_PIN(pins[i]);
spi_pin_cfg.mode = gpioModePushPull;
spi_pin_cfg.out = 1;
GPIO->USARTROUTE[usart_num].ROUTEEN |= GPIO_USART_ROUTEEN_CLKPEN;
GPIO->USARTROUTE[usart_num].CLKROUTE =
(spi_pin_cfg.pin << _GPIO_USART_CLKROUTE_PIN_SHIFT) |
(spi_pin_cfg.port << _GPIO_USART_CLKROUTE_PORT_SHIFT);
break;
case GECKO_FUN_SPI_MOSI:
spi_pin_cfg.port = GECKO_GET_PORT(pins[i]);
spi_pin_cfg.pin = GECKO_GET_PIN(pins[i]);
spi_pin_cfg.mode = gpioModePushPull;
spi_pin_cfg.out = 1;
GPIO->USARTROUTE[usart_num].ROUTEEN |= GPIO_USART_ROUTEEN_TXPEN;
GPIO->USARTROUTE[usart_num].TXROUTE =
(spi_pin_cfg.pin << _GPIO_USART_TXROUTE_PIN_SHIFT) |
(spi_pin_cfg.port << _GPIO_USART_TXROUTE_PORT_SHIFT);
break;
case GECKO_FUN_SPI_MISO:
spi_pin_cfg.port = GECKO_GET_PORT(pins[i]);
spi_pin_cfg.pin = GECKO_GET_PIN(pins[i]);
spi_pin_cfg.mode = gpioModeInput;
spi_pin_cfg.out = 1;
GPIO->USARTROUTE[usart_num].ROUTEEN |= GPIO_USART_ROUTEEN_RXPEN;
GPIO->USARTROUTE[usart_num].RXROUTE =
(spi_pin_cfg.pin << _GPIO_USART_RXROUTE_PIN_SHIFT) |
(spi_pin_cfg.port << _GPIO_USART_RXROUTE_PORT_SHIFT);
break;
#endif /* CONFIG_SPI_GECKO */
default: default:
return -ENOTSUP; return -ENOTSUP;
} }
#ifdef CONFIG_SPI_GECKO
GPIO_PinModeSet(spi_pin_cfg.port, spi_pin_cfg.pin,
spi_pin_cfg.mode, spi_pin_cfg.out);
#endif /* CONFIG_SPI_GECKO */
} }
return 0; return 0;

5
dts/bindings/spi/silabs,gecko-spi-usart.yaml
View file

@ -2,7 +2,7 @@ description: GECKO USART SPI
compatible: "silabs,gecko-spi-usart" compatible: "silabs,gecko-spi-usart"
include: spi-controller.yaml include: [spi-controller.yaml, pinctrl-device.yaml]
properties: properties:
reg: reg:
@ -21,15 +21,12 @@ properties:
location-rx: location-rx:
type: array type: array
required: true
description: RX pin configuration defined as <location port pin> description: RX pin configuration defined as <location port pin>
location-tx: location-tx:
type: array type: array
required: true
description: TX pin configuration defined as <location port pin> description: TX pin configuration defined as <location port pin>
location-clk: location-clk:
type: array type: array
required: true
description: CLK pin configuration defined as <location port pin> description: CLK pin configuration defined as <location port pin>

5
include/zephyr/dt-bindings/pinctrl/gecko-pinctrl.h
View file

@ -61,6 +61,11 @@
/** UART LOCATION */ /** UART LOCATION */
#define GECKO_FUN_UART_LOC 4U #define GECKO_FUN_UART_LOC 4U
#define GECKO_FUN_SPI_MISO 5U
#define GECKO_FUN_SPI_MOSI 6U
#define GECKO_FUN_SPI_CSN 7U
#define GECKO_FUN_SPI_SCK 8U
/** @} */ /** @} */
/** /**