drivers: gpio: rename PCAL9535A to PCA95XX
PCA95XX is a series of compatible I2C-based GPIO expanders, with common registers on input/output, polarity and configuration. This renames the original PCAL9535A driver to PCA95XX to indicate that it can support this series. Additional features on variants are guarded by kconfigs. Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung
Carles Cufí
parent
dfce0617f4
commit
eafd0d9d21
6 changed files with 313 additions and 251 deletions
630
drivers/gpio/gpio_pca95xx.c
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630
drivers/gpio/gpio_pca95xx.c
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@ -0,0 +1,630 @@
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/*
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* Copyright (c) 2015 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file Driver for PCA95XX I2C-based GPIO driver.
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*/
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#include <errno.h>
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#include <kernel.h>
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#include <device.h>
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#include <init.h>
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#include <sys/util.h>
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#include <drivers/gpio.h>
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#include <drivers/i2c.h>
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#include "gpio_pca95xx.h"
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#define LOG_LEVEL CONFIG_GPIO_LOG_LEVEL
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#include <logging/log.h>
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LOG_MODULE_REGISTER(gpio_pca95xx);
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/* Register definitions */
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#define REG_INPUT_PORT0 0x00
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#define REG_INPUT_PORT1 0x01
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#define REG_OUTPUT_PORT0 0x02
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#define REG_OUTPUT_PORT1 0x03
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#define REG_POL_INV_PORT0 0x04
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#define REG_POL_INV_PORT1 0x05
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#define REG_CONF_PORT0 0x06
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#define REG_CONG_PORT1 0x07
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#define REG_OUT_DRV_STRENGTH_PORT0_L 0x40
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#define REG_OUT_DRV_STRENGTH_PORT0_H 0x41
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#define REG_OUT_DRV_STRENGTH_PORT1_L 0x42
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#define REG_OUT_DRV_STRENGTH_PORT1_H 0x43
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#define REG_INPUT_LATCH_PORT0 0x44
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#define REG_INPUT_LATCH_PORT1 0x45
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#define REG_PUD_EN_PORT0 0x46
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#define REG_PUD_EN_PORT1 0x47
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#define REG_PUD_SEL_PORT0 0x48
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#define REG_PUD_SEL_PORT1 0x49
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#define REG_INT_MASK_PORT0 0x4A
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#define REG_INT_MASK_PORT1 0x4B
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#define REG_INT_STATUS_PORT0 0x4C
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#define REG_INT_STATUS_PORT1 0x4D
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#define REG_OUTPUT_PORT_CONF 0x4F
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/* Driver flags */
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#define PCA_HAS_PUD BIT(0)
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/**
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* @brief Read both port 0 and port 1 registers of certain register function.
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*
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* Given the register in reg, read the pair of port 0 and port 1.
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*
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* @param dev Device struct of the PCA95XX.
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* @param reg Register to read (the PORT0 of the pair of registers).
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* @param buf Buffer to read data into.
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*
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* @return 0 if successful, failed otherwise.
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*/
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static int read_port_regs(struct device *dev, u8_t reg,
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union gpio_pca95xx_port_data *buf)
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{
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const struct gpio_pca95xx_config * const config =
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dev->config->config_info;
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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struct device * const i2c_master = drv_data->i2c_master;
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u16_t i2c_addr = config->i2c_slave_addr;
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int ret;
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ret = i2c_burst_read(i2c_master, i2c_addr, reg, buf->byte, 2);
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if (ret) {
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LOG_ERR("PCA95XX[0x%X]: error reading register 0x%X (%d)",
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i2c_addr, reg, ret);
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goto error;
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}
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LOG_DBG("PCA95XX[0x%X]: Read: REG[0x%X] = 0x%X, REG[0x%X] = 0x%X",
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i2c_addr, reg, buf->byte[0], (reg + 1), buf->byte[1]);
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error:
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return ret;
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}
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/**
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* @brief Write both port 0 and port 1 registers of certain register function.
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*
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* Given the register in reg, write the pair of port 0 and port 1.
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*
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* @param dev Device struct of the PCA95XX.
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* @param reg Register to write into (the PORT0 of the pair of registers).
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* @param buf Buffer to write data from.
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*
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* @return 0 if successful, failed otherwise.
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*/
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static int write_port_regs(struct device *dev, u8_t reg,
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union gpio_pca95xx_port_data *buf)
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{
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const struct gpio_pca95xx_config * const config =
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dev->config->config_info;
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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struct device * const i2c_master = drv_data->i2c_master;
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u16_t i2c_addr = config->i2c_slave_addr;
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int ret;
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LOG_DBG("PCA95XX[0x%X]: Write: REG[0x%X] = 0x%X, REG[0x%X] = "
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"0x%X", i2c_addr, reg, buf->byte[0], (reg + 1),
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buf->byte[1]);
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ret = i2c_reg_write_byte(i2c_master, i2c_addr, reg, buf->byte[0]);
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if (ret) {
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LOG_ERR("PCA95XX[0x%X]: error writing to register 0x%X "
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"(%d)", i2c_addr, reg, ret);
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}
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ret = i2c_reg_write_byte(i2c_master, i2c_addr, reg+1, buf->byte[1]);
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if (ret) {
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LOG_ERR("PCA95XX[0x%X]: error writing to register 0x%X "
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"(%d)", i2c_addr, reg, ret);
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}
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return ret;
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}
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/**
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* @brief Setup the pin direction (input or output)
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*
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* @param dev Device struct of the PCA95XX
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* @param access_op Access operation (pin or port)
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* @param pin The pin number
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* @param flags Flags of pin or port
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*
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* @return 0 if successful, failed otherwise
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*/
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static int setup_pin_dir(struct device *dev, int access_op,
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u32_t pin, int flags)
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{
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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union gpio_pca95xx_port_data *reg_dir = &drv_data->reg_cache.dir;
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union gpio_pca95xx_port_data *reg_out = &drv_data->reg_cache.output;
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int ret;
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/* For each pin, 0 == output, 1 == input */
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switch (access_op) {
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case GPIO_ACCESS_BY_PIN:
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if ((flags & GPIO_OUTPUT) != 0U) {
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if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0U) {
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reg_out->all |= BIT(pin);
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} else if ((flags & GPIO_OUTPUT_INIT_LOW) != 0U) {
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reg_out->all &= ~BIT(pin);
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}
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reg_dir->all &= ~BIT(pin);
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} else {
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reg_dir->all |= BIT(pin);
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}
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break;
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case GPIO_ACCESS_BY_PORT:
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if ((flags & GPIO_OUTPUT) != 0U) {
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if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0U) {
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reg_out->all = 0xFFFF;
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} else if ((flags & GPIO_OUTPUT_INIT_LOW) != 0U) {
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reg_out->all = 0x0;
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}
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reg_dir->all = 0x0;
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} else {
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reg_dir->all = 0xFFFF;
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}
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break;
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default:
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ret = -ENOTSUP;
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goto done;
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}
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ret = write_port_regs(dev, REG_OUTPUT_PORT0, reg_out);
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if (ret != 0) {
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goto done;
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}
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ret = write_port_regs(dev, REG_CONF_PORT0, reg_dir);
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done:
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return ret;
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}
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/**
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* @brief Setup the pin pull up/pull down status
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*
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* @param dev Device struct of the PCA95XX
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* @param access_op Access operation (pin or port)
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* @param pin The pin number
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* @param flags Flags of pin or port
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*
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* @return 0 if successful, failed otherwise
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*/
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static int setup_pin_pullupdown(struct device *dev, int access_op,
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u32_t pin, int flags)
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{
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const struct gpio_pca95xx_config * const config =
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dev->config->config_info;
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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union gpio_pca95xx_port_data *reg_pud;
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u16_t bit_mask;
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u16_t new_value = 0U;
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int ret;
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if ((config->capabilities & PCA_HAS_PUD) == 0) {
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/* Chip does not support pull up/pull down */
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if ((flags & (GPIO_PULL_UP | GPIO_PULL_DOWN)) != 0U) {
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ret = -ENOTSUP;
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goto done;
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}
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/* If both GPIO_PULL_UP and GPIO_PULL_DOWN are not set,
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* we should disable them in hardware. But need to skip
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* if the chip does not support pull up/pull down.
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*/
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ret = 0;
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goto done;
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}
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/* If disabling pull up/down, there is no need to set the selection
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* register. Just go straight to disabling.
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*/
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if ((flags & (GPIO_PULL_UP | GPIO_PULL_DOWN)) == 0U) {
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goto en_dis;
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}
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/* Setup pin pull up or pull down */
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reg_pud = &drv_data->reg_cache.pud_sel;
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switch (access_op) {
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case GPIO_ACCESS_BY_PIN:
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bit_mask = 1 << pin;
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/* pull down == 0, pull up == 1 */
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if ((flags & GPIO_PULL_UP) != 0U) {
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new_value = 1 << pin;
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}
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reg_pud->all &= ~bit_mask;
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reg_pud->all |= new_value;
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break;
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case GPIO_ACCESS_BY_PORT:
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/* pull down == 0, pull up == 1*/
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if ((flags & GPIO_PULL_UP) != 0U) {
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reg_pud->all = 0xFFFF;
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} else {
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reg_pud->all = 0x0;
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}
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break;
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default:
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ret = -ENOTSUP;
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goto done;
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}
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ret = write_port_regs(dev, REG_PUD_SEL_PORT0, reg_pud);
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if (ret) {
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goto done;
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}
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en_dis:
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/* enable/disable pull up/down */
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reg_pud = &drv_data->reg_cache.pud_en;
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switch (access_op) {
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case GPIO_ACCESS_BY_PIN:
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bit_mask = 1 << pin;
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if ((flags & (GPIO_PULL_UP | GPIO_PULL_DOWN)) != 0U) {
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new_value = 1 << pin;
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}
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reg_pud->all &= ~bit_mask;
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reg_pud->all |= new_value;
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break;
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case GPIO_ACCESS_BY_PORT:
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if ((flags & (GPIO_PULL_UP | GPIO_PULL_DOWN)) != 0U) {
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reg_pud->all = 0xFFFF;
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} else {
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reg_pud->all = 0x0;
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}
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break;
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default:
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ret = -ENOTSUP;
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goto done;
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}
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ret = write_port_regs(dev, REG_PUD_EN_PORT0, reg_pud);
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done:
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return ret;
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}
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/**
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* @brief Configure pin or port
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*
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* @param dev Device struct of the PCA95XX
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* @param access_op Access operation (pin or port)
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* @param pin The pin number
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* @param flags Flags of pin or port
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*
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* @return 0 if successful, failed otherwise
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*/
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static int gpio_pca95xx_config(struct device *dev, int access_op,
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u32_t pin, int flags)
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{
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int ret;
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#if (CONFIG_GPIO_LOG_LEVEL >= LOG_LEVEL_DEBUG)
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const struct gpio_pca95xx_config * const config =
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dev->config->config_info;
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u16_t i2c_addr = config->i2c_slave_addr;
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#endif
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/* Does not support disconnected pin */
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if ((flags & (GPIO_INPUT | GPIO_OUTPUT)) == GPIO_DISCONNECTED) {
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return -ENOTSUP;
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}
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/* Open-drain support is per port, not per pin.
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* So can't really support the API as-is.
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*/
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if ((flags & GPIO_SINGLE_ENDED) != 0U) {
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return -ENOTSUP;
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}
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ret = setup_pin_dir(dev, access_op, pin, flags);
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if (ret) {
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LOG_ERR("PCA95XX[0x%X]: error setting pin direction (%d)",
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i2c_addr, ret);
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goto done;
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}
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ret = setup_pin_pullupdown(dev, access_op, pin, flags);
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if (ret) {
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LOG_ERR("PCA95XX[0x%X]: error setting pin pull up/down "
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"(%d)", i2c_addr, ret);
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goto done;
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}
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done:
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return ret;
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}
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/**
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* @brief Set the pin or port output
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*
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* @param dev Device struct of the PCA95XX
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* @param access_op Access operation (pin or port)
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* @param pin The pin number
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* @param value Value to set (0 or 1)
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*
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* @return 0 if successful, failed otherwise
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*/
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static int gpio_pca95xx_write(struct device *dev, int access_op,
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u32_t pin, u32_t value)
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{
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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union gpio_pca95xx_port_data *reg_out = &drv_data->reg_cache.output;
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int ret;
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/* Invert input value for pins configurated as active low. */
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switch (access_op) {
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case GPIO_ACCESS_BY_PIN:
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if (value) {
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reg_out->all |= BIT(pin);
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} else {
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reg_out->all &= ~BIT(pin);
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}
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break;
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case GPIO_ACCESS_BY_PORT:
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reg_out->all = value;
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break;
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default:
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ret = -ENOTSUP;
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goto done;
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}
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ret = write_port_regs(dev, REG_OUTPUT_PORT0, reg_out);
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done:
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return ret;
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}
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/**
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* @brief Read the pin or port status
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*
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* @param dev Device struct of the PCA95XX
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* @param access_op Access operation (pin or port)
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* @param pin The pin number
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* @param value Value of input pin(s)
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*
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* @return 0 if successful, failed otherwise
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*/
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static int gpio_pca95xx_read(struct device *dev, int access_op,
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u32_t pin, u32_t *value)
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{
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union gpio_pca95xx_port_data buf;
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int ret;
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ret = read_port_regs(dev, REG_INPUT_PORT0, &buf);
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if (ret != 0) {
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goto done;
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}
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switch (access_op) {
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case GPIO_ACCESS_BY_PIN:
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*value = (buf.all >> pin) & 0x01;
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break;
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case GPIO_ACCESS_BY_PORT:
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*value = buf.all;
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break;
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default:
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ret = -ENOTSUP;
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break;
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}
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done:
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return ret;
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}
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static int gpio_pca95xx_port_get_raw(struct device *dev, u32_t *value)
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{
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union gpio_pca95xx_port_data buf;
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int ret;
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ret = read_port_regs(dev, REG_INPUT_PORT0, &buf);
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if (ret != 0) {
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goto done;
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}
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*value = buf.all;
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done:
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return ret;
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}
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static int gpio_pca95xx_port_set_masked_raw(struct device *dev,
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u32_t mask, u32_t value)
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{
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struct gpio_pca95xx_drv_data * const drv_data =
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(struct gpio_pca95xx_drv_data * const)dev->driver_data;
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union gpio_pca95xx_port_data *reg_out = &drv_data->reg_cache.output;
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reg_out->all = (reg_out->all & ~mask) | (mask & value);
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return write_port_regs(dev, REG_OUTPUT_PORT0, reg_out);
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}
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static int gpio_pca95xx_port_set_bits_raw(struct device *dev, u32_t mask)
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{
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return gpio_pca95xx_port_set_masked_raw(dev, mask, mask);
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}
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static int gpio_pca95xx_port_clear_bits_raw(struct device *dev, u32_t mask)
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{
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return gpio_pca95xx_port_set_masked_raw(dev, mask, 0);
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}
|
||||
|
||||
static int gpio_pca95xx_port_toggle_bits(struct device *dev, u32_t mask)
|
||||
{
|
||||
struct gpio_pca95xx_drv_data * const drv_data =
|
||||
(struct gpio_pca95xx_drv_data * const)dev->driver_data;
|
||||
union gpio_pca95xx_port_data *reg_out = &drv_data->reg_cache.output;
|
||||
|
||||
reg_out->all ^= mask;
|
||||
|
||||
return write_port_regs(dev, REG_OUTPUT_PORT0, reg_out);
|
||||
}
|
||||
|
||||
static int gpio_pca95xx_pin_interrupt_configure(struct device *dev,
|
||||
unsigned int pin,
|
||||
enum gpio_int_mode mode,
|
||||
enum gpio_int_trig trig)
|
||||
{
|
||||
return -ENOTSUP;
|
||||
}
|
||||
|
||||
static const struct gpio_driver_api gpio_pca95xx_drv_api_funcs = {
|
||||
.config = gpio_pca95xx_config,
|
||||
.write = gpio_pca95xx_write,
|
||||
.read = gpio_pca95xx_read,
|
||||
.port_get_raw = gpio_pca95xx_port_get_raw,
|
||||
.port_set_masked_raw = gpio_pca95xx_port_set_masked_raw,
|
||||
.port_set_bits_raw = gpio_pca95xx_port_set_bits_raw,
|
||||
.port_clear_bits_raw = gpio_pca95xx_port_clear_bits_raw,
|
||||
.port_toggle_bits = gpio_pca95xx_port_toggle_bits,
|
||||
.pin_interrupt_configure = gpio_pca95xx_pin_interrupt_configure,
|
||||
};
|
||||
|
||||
/**
|
||||
* @brief Initialization function of PCA95XX
|
||||
*
|
||||
* @param dev Device struct
|
||||
* @return 0 if successful, failed otherwise.
|
||||
*/
|
||||
static int gpio_pca95xx_init(struct device *dev)
|
||||
{
|
||||
const struct gpio_pca95xx_config * const config =
|
||||
dev->config->config_info;
|
||||
struct gpio_pca95xx_drv_data * const drv_data =
|
||||
(struct gpio_pca95xx_drv_data * const)dev->driver_data;
|
||||
struct device *i2c_master;
|
||||
|
||||
/* Find out the device struct of the I2C master */
|
||||
i2c_master = device_get_binding((char *)config->i2c_master_dev_name);
|
||||
if (!i2c_master) {
|
||||
return -EINVAL;
|
||||
}
|
||||
drv_data->i2c_master = i2c_master;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Initialization for PCA95XX_0 */
|
||||
#ifdef CONFIG_GPIO_PCA95XX_0
|
||||
static const struct gpio_pca95xx_config gpio_pca95xx_0_cfg = {
|
||||
.i2c_master_dev_name = CONFIG_GPIO_PCA95XX_0_I2C_MASTER_DEV_NAME,
|
||||
.i2c_slave_addr = CONFIG_GPIO_PCA95XX_0_I2C_ADDR,
|
||||
.capabilities =
|
||||
(CONFIG_GPIO_PCA95XX_0_HAS_PUD ? PCA_HAS_PUD : 0) |
|
||||
0,
|
||||
};
|
||||
|
||||
static struct gpio_pca95xx_drv_data gpio_pca95xx_0_drvdata = {
|
||||
/* Default for registers according to datasheet */
|
||||
.reg_cache.output = { .all = 0xFFFF },
|
||||
.reg_cache.dir = { .all = 0xFFFF },
|
||||
.reg_cache.pud_en = { .all = 0x0 },
|
||||
.reg_cache.pud_sel = { .all = 0xFFFF },
|
||||
};
|
||||
|
||||
/* This has to init after I2C master */
|
||||
DEVICE_AND_API_INIT(gpio_pca95xx_0, CONFIG_GPIO_PCA95XX_0_DEV_NAME,
|
||||
gpio_pca95xx_init,
|
||||
&gpio_pca95xx_0_drvdata, &gpio_pca95xx_0_cfg,
|
||||
POST_KERNEL, CONFIG_GPIO_PCA95XX_INIT_PRIORITY,
|
||||
&gpio_pca95xx_drv_api_funcs);
|
||||
|
||||
#endif /* CONFIG_GPIO_PCA95XX_0 */
|
||||
|
||||
/* Initialization for PCA95XX_1 */
|
||||
#ifdef CONFIG_GPIO_PCA95XX_1
|
||||
static const struct gpio_pca95xx_config gpio_pca95xx_1_cfg = {
|
||||
.i2c_master_dev_name = CONFIG_GPIO_PCA95XX_1_I2C_MASTER_DEV_NAME,
|
||||
.i2c_slave_addr = CONFIG_GPIO_PCA95XX_1_I2C_ADDR,
|
||||
.capabilities =
|
||||
(CONFIG_GPIO_PCA95XX_1_HAS_PUD ? PCA_HAS_PUD : 0) |
|
||||
0,
|
||||
};
|
||||
|
||||
static struct gpio_pca95xx_drv_data gpio_pca95xx_1_drvdata = {
|
||||
/* Default for registers according to datasheet */
|
||||
.reg_cache.output = { .all = 0xFFFF },
|
||||
.reg_cache.dir = { .all = 0xFFFF },
|
||||
.reg_cache.pud_en = { .all = 0x0 },
|
||||
.reg_cache.pud_sel = { .all = 0xFFFF },
|
||||
};
|
||||
|
||||
/* This has to init after I2C master */
|
||||
DEVICE_AND_API_INIT(gpio_pca95xx_1, CONFIG_GPIO_PCA95XX_1_DEV_NAME,
|
||||
gpio_pca95xx_init,
|
||||
&gpio_pca95xx_1_drvdata, &gpio_pca95xx_1_cfg,
|
||||
POST_KERNEL, CONFIG_GPIO_PCA95XX_INIT_PRIORITY,
|
||||
&gpio_pca95xx_drv_api_funcs);
|
||||
|
||||
#endif /* CONFIG_GPIO_PCA95XX_1 */
|
||||
|
||||
/* Initialization for PCA95XX_2 */
|
||||
#ifdef CONFIG_GPIO_PCA95XX_2
|
||||
static const struct gpio_pca95xx_config gpio_pca95xx_2_cfg = {
|
||||
.i2c_master_dev_name = CONFIG_GPIO_PCA95XX_2_I2C_MASTER_DEV_NAME,
|
||||
.i2c_slave_addr = CONFIG_GPIO_PCA95XX_2_I2C_ADDR,
|
||||
.capabilities =
|
||||
(CONFIG_GPIO_PCA95XX_2_HAS_PUD ? PCA_HAS_PUD : 0) |
|
||||
0,
|
||||
};
|
||||
|
||||
static struct gpio_pca95xx_drv_data gpio_pca95xx_2_drvdata = {
|
||||
/* Default for registers according to datasheet */
|
||||
.reg_cache.output = { .all = 0xFFFF },
|
||||
.reg_cache.dir = { .all = 0xFFFF },
|
||||
.reg_cache.pud_en = { .all = 0x0 },
|
||||
.reg_cache.pud_sel = { .all = 0xFFFF },
|
||||
};
|
||||
|
||||
/* This has to init after I2C master */
|
||||
DEVICE_AND_API_INIT(gpio_pca95xx_2, CONFIG_GPIO_PCA95XX_2_DEV_NAME,
|
||||
gpio_pca95xx_init,
|
||||
&gpio_pca95xx_2_drvdata, &gpio_pca95xx_2_cfg,
|
||||
POST_KERNEL, CONFIG_GPIO_PCA95XX_INIT_PRIORITY,
|
||||
&gpio_pca95xx_drv_api_funcs);
|
||||
|
||||
#endif /* CONFIG_GPIO_PCA95XX_2 */
|
||||
|
||||
/* Initialization for PCA95XX_3 */
|
||||
#ifdef CONFIG_GPIO_PCA95XX_3
|
||||
static const struct gpio_pca95xx_config gpio_pca95xx_3_cfg = {
|
||||
.i2c_master_dev_name = CONFIG_GPIO_PCA95XX_3_I2C_MASTER_DEV_NAME,
|
||||
.i2c_slave_addr = CONFIG_GPIO_PCA95XX_3_I2C_ADDR,
|
||||
.capabilities =
|
||||
(CONFIG_GPIO_PCA95XX_3_HAS_PUD ? PCA_HAS_PUD : 0) |
|
||||
0,
|
||||
};
|
||||
|
||||
static struct gpio_pca95xx_drv_data gpio_pca95xx_3_drvdata = {
|
||||
/* Default for registers according to datasheet */
|
||||
.reg_cache.output = { .all = 0xFFFF },
|
||||
.reg_cache.dir = { .all = 0xFFFF },
|
||||
.reg_cache.pud_en = { .all = 0x0 },
|
||||
.reg_cache.pud_sel = { .all = 0xFFFF },
|
||||
};
|
||||
|
||||
/* This has to init after I2C master */
|
||||
DEVICE_AND_API_INIT(gpio_pca95xx_3, CONFIG_GPIO_PCA95XX_3_DEV_NAME,
|
||||
gpio_pca95xx_init,
|
||||
&gpio_pca95xx_3_drvdata, &gpio_pca95xx_3_cfg,
|
||||
POST_KERNEL, CONFIG_GPIO_PCA95XX_INIT_PRIORITY,
|
||||
&gpio_pca95xx_drv_api_funcs);
|
||||
|
||||
#endif /* CONFIG_GPIO_PCA95XX_3 */
|
||||
Loading…
Add table
Add a link
Reference in a new issue