diff --git a/arch/riscv/core/fatal.c b/arch/riscv/core/fatal.c index 8efffd37371..31ead071eb9 100644 --- a/arch/riscv/core/fatal.c +++ b/arch/riscv/core/fatal.c @@ -4,6 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include #include #include #include @@ -79,7 +80,14 @@ FUNC_NORETURN void z_riscv_fatal_error_csf(unsigned int reason, const z_arch_esf #endif /* CONFIG_RISCV_ISA_RV32E */ LOG_ERR(" sp: " PR_REG, z_riscv_get_sp_before_exc(esf)); LOG_ERR(" ra: " PR_REG, esf->ra); +#ifndef CONFIG_SYMTAB LOG_ERR(" mepc: " PR_REG, esf->mepc); +#else + uint32_t offset = 0; + const char *name = symtab_find_symbol_name(esf->mepc, &offset); + + LOG_ERR(" mepc: " PR_REG " [%s+0x%x]", esf->mepc, name, offset); +#endif LOG_ERR("mstatus: " PR_REG, esf->mstatus); LOG_ERR(""); }