arch: arm: core: aarch32: limit ACTLR register access to Cortex-R
The configuration bits ATCMPCEN, B0TCMPCEN and B1TCMPCEN in the ACTLR register referenced in the function z_arm_tcm_disable_ecc are only de- fined for Cortex-R CPUs. For Cortex-A CPUs, those bits are declared as reserved. Comp.: https://arm-software.github.io/CMSIS_5/Core_A/html/group__CMSIS__ACTLR.html Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
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void z_arm_tcm_disable_ecc(void)
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{
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#if defined(CONFIG_ARMV7_R)
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uint32_t actlr;
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actlr = __get_ACTLR();
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actlr &= ~(ACTLR_ATCMPCEN_Msk | ACTLR_B0TCMPCEN_Msk |
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ACTLR_B1TCMPCEN_Msk);
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__set_ACTLR(actlr);
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#endif
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}
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