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ARC: nSIM: Make reorganization of board and SoC structure

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Change source tree organization for Synopsys nSIM platform.
Classical ARC architectures arc_v2 arc_v3 moved to arc_classic
SoC and boards family.
nSIM SoCs were separated regarding series: EM, HS, SEM, VPX2.
This PR sould be seeing as the preparation for
addition new nSIM platform based on the RISC-V architecture.

Signed-off-by: Nikolay Agishev <agishev@synopsys.com>
This commit is contained in:
Nikolay Agishev 2024-05-06 17:17:11 +03:00 • committed by Anas Nashif
commit ea7a876cff
141 changed files with 343 additions and 263 deletions
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3
tests/ztest/error_hook/src/main.c
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@ -60,7 +60,8 @@ __no_optimization static void trigger_fault_illegal_instruction(void)
*/
__no_optimization static void trigger_fault_access(void)
{
#if defined(CONFIG_SOC_ARC_IOT) || defined(CONFIG_SOC_NSIM) || defined(CONFIG_SOC_EMSK)
#if defined(CONFIG_SOC_ARC_IOT) || defined(CONFIG_SOC_FAMILY_NSIM_ARC_CLASSIC) || \
defined(CONFIG_SOC_EMSK)
/* For iotdk, em_starterkit and ARC/nSIM, nSIM simulates full address space of
* memory, iotdk has eflash at 0x0 address, em_starterkit has ICCM at 0x0 address,
* access to 0x0 address doesn't generate any exception. So we access to 0XFFFFFFFF