boards: seeed: Add XIAO MG24

Add the basic XIAO MG24 board definition.

Signed-off-by: Peter Johanson <peter@peterjohanson.com>

boards/seeed/xiao_mg24/Kconfig.defconfig

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+# Copyright (c) 2020 Piotr Mienkowski
+# Copyright (c) 2020 TriaGnoSys GmbH
+# Copyright (c) 2025 Pete Johanson
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_XIAO_MG24
+
+config LOG_BACKEND_SWO_FREQ_HZ
+	default 875000
+	depends on LOG_BACKEND_SWO
+
+if SOC_GECKO_USE_RAIL
+
+config FPU
+	default y
+
+endif # SOC_GECKO_USE_RAIL
+
+if BT
+
+# Used to enable RF switch and selection
+config GPIO_HOGS
+	default y
+
+config FPU
+	default y
+
+config COMMON_LIBC_MALLOC_ARENA_SIZE
+	default 8192
+
+config MAIN_STACK_SIZE
+	default 3072 if PM
+	default 2304
+
+endif # BT
+
+endif # BOARD_XIAO_MG24

boards/seeed/xiao_mg24/Kconfig.xiao_mg24

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+# Copyright (c) 2020 Piotr Mienkowski
+# Copyright (c) 2020 TriaGnoSys GmbH
+# Copyright (c) 2025 Pete Johanson
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_XIAO_MG24
+	select SOC_PART_NUMBER_EFR32MG24B220F1536IM48

boards/seeed/xiao_mg24/board.cmake

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+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(openocd)
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+
+board_runner_args(jlink "--device=EFR32MG24BxxxF1536")
+include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

boards/seeed/xiao_mg24/board.yml

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+board:
+  name: xiao_mg24
+  full_name: XIAO MG24
+  vendor: seeed
+  socs:
+    - name: efr32mg24b220f1536im48

boards/seeed/xiao_mg24/doc/index.rst

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+.. zephyr:board:: xiao_mg24
+
+Overview
+********
+
+Seeed Studio XIAO MG24 is a mini development board based on Silicon Labs' MG24. XIAO MG24 is based
+on ARM Cortex-M33 core, 32-bit RISC architecture with a maximum clock speed of 78MHz, supporting DSP
+instructions and FPU floating-point operations, possessing powerful computing power, and built-in
+AL/ML hardware accelerator MVP, which can efficiently process AI/machine learning algorithms.
+Secondly, it has excellent RF performance, with a transmission power of up to+19.5 dBm and a
+reception sensitivity as low as -105.4 dBm. It supports multiple IoT and wireless transmission
+protocols such as Matter, Thread, Zigbee, Bluetooth LE 5.3,Bluetooth mesh etc.
+
+Hardware
+********
+
+- EFR32MG24B220F1536IM48 Mighty Gecko SoC
+- CPU core: ARM Cortex®-M33 with FPU
+- Flash memory: 1536 kB
+- RAM: 256 kB
+- Transmit power: up to +20 dBm
+- Operation frequency: 2.4 GHz
+- Crystals for LFXO (32.768 kHz) and HFXO (39 MHz).
+- 3.7v LiPo power and charge support
+- User and battery charge LEDs
+
+For more information about the EFR32MG24 SoC and XIAO MG24 board, refer to these
+documents:
+
+- `EFR32MG24 Website`_
+- `EFR32MG24 Datasheet`_
+- `EFR32xG24 Reference Manual`_
+- `XIAO MG24 Wiki`_
+
+Supported Features
+==================
+
+.. zephyr:board-supported-hw::
+
+Connections and IOs
+===================
+
+In the following table, the column **Name** contains Pin names. For example, PA2
+means Pin number 2 on PORTA, as used in the board's datasheets and manuals.
+
++-------+-------------+------------------+
+| Name  | Function    | Usage            |
++=======+=============+==================+
+| PA7   | GPIO        | LED0             |
++-------+-------------+------------------+
+| PA8   | USART0_TX   | UART Console TX  |
++-------+-------------+------------------+
+| PA9   | USART0_RX   | UART Console RX  |
++-------+-------------+------------------+
+
+The default configuration can be found in
+:zephyr_file:`boards/seeed/xiao_mg24/xiao_mg24_defconfig`
+
+System Clock
+============
+
+The EFR32MG24 SoC is configured to use the 39 MHz external oscillator on the
+board.
+
+Serial Port
+===========
+
+The EFR32MG24 SoC has one USART and two EUSARTs.
+USART0 is connected to the board controller and is used for the console.
+
+Programming and Debugging
+*************************
+
+The XIAO MG24 contains an SAMD11 with CMSIS-DAP, allowing flashing, debugging, logging, etc. over
+the USB port. Doing so requires a version of OpenOCD that includes support for the flash on the MG24
+MCU. Until those changes are included in stock OpenOCD, the version bundled with Arduino can be
+used, or can be installed from the `OpenOCD Arduino Fork`_. When flashing, debugging, etc. you may
+need to include ``--openocd=/usr/local/bin/openocd
+--openocd-search=/usr/local/share/openocd/scripts/`` options to the command.
+
+Flashing
+========
+
+Connect the XIAO MG24 board to your host computer using the USB port. A USB CDC ACM serial port
+should appear on the host, that can be used to view logs from the flashed application.
+
+Here is an example for the :zephyr:code-sample:`hello_world` application.
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: xiao_mg24
+   :goals: flash
+
+Open a serial terminal (minicom, putty, etc.) connecting to the UCB CDC ACM serial port.
+
+Reset the board and you should see the following message in the terminal:
+
+.. code-block:: console
+
+   Hello World! xiao_mg24
+
+
+.. _XIAO MG24 Wiki:
+   https://wiki.seeedstudio.com/xiao_mg24_getting_started/
+
+.. _BRD4187C User Guide:
+   https://www.silabs.com/documents/public/user-guides/ug526-brd4187c-user-guide.pdf
+
+.. _EFR32MG24 Website:
+   https://www.silabs.com/wireless/zigbee/efr32mg24-series-2-socs
+
+.. _EFR32MG24 Datasheet:
+   https://www.silabs.com/documents/public/data-sheets/efr32mg24-datasheet.pdf
+
+.. _EFR32xG24 Reference Manual:
+   https://www.silabs.com/documents/public/reference-manuals/brd4187c-rm.pdf
+
+.. _OpenOCD Arduino Fork:
+   https://github.com/facchinm/OpenOCD/tree/arduino-0.12.0-rtx5

boards/seeed/xiao_mg24/pre_dt_board.cmake

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+# Copyright (c) 2021 Linaro Limited
+# SPDX-License-Identifier: Apache-2.0
+
+# SPI is implemented via usart so node name isn't spi@...
+list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge")

boards/seeed/xiao_mg24/seeed_xiao_connector.dtsi

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+/*
+ * Copyright (c) 2025 Peter Johanson
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	xiao_d: connector {
+		compatible = "seeed,xiao-gpio";
+		#gpio-cells = <2>;
+		gpio-map-mask = <0xffffffff 0xffffffc0>;
+		gpio-map-pass-thru = <0 0x3f>;
+		gpio-map = <0 0 &gpioc 0 0>, /* D0 */
+			   <1 0 &gpioc 1 0>, /* D1 */
+			   <2 0 &gpioc 2 0>, /* D2 */
+			   <3 0 &gpioc 3 0>, /* D3 */
+			   <4 0 &gpioc 4 0>, /* D4 */
+			   <5 0 &gpioc 5 0>, /* D5 */
+			   <6 0 &gpioc 6 0>, /* D6 */
+			   <7 0 &gpioc 7 0>, /* D7 */
+			   <8 0 &gpioa 3 0>, /* D8 */
+			   <9 0 &gpioa 4 0>, /* D9 */
+			   <10 0 &gpioa 5 0>; /* D10 */
+	};
+};
+
+xiao_spi: &eusart1 {};
+
+xiao_serial: &eusart0 {};
+
+xiao_i2c: &i2c0 {};

boards/seeed/xiao_mg24/support/openocd.cfg

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+if {[info exists env(OPENOCD_INTERFACE)]} {
+	set INTERFACE $env(OPENOCD_INTERFACE)
+} else {
+	# By default connect over Debug USB port using the CMSIS-DAP interface
+	set INTERFACE "cmsis-dap"
+}
+
+source [find interface/$INTERFACE.cfg]
+
+transport select swd
+
+set CHIPNAME efr32
+
+source [find target/efm32s2_g23.cfg]
+
+$_TARGETNAME configure -event gdb-attach {
+	echo "Debugger attaching: halting execution"
+	reset halt
+	gdb_breakpoint_override hard
+}
+
+$_TARGETNAME configure -event gdb-detach {
+	echo "Debugger detaching: resuming execution"
+	resume
+}

boards/seeed/xiao_mg24/xiao_mg24-pinctrl.dtsi

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+/*
+ * Copyright (c) 2025 Pete Johanson
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <dt-bindings/pinctrl/silabs/xg24-pinctrl.h>
+
+&pinctrl {
+	eusart0_default: eusart0_default {
+		group0 {
+			pins = <EUSART1_TX_PC6>;
+			drive-push-pull;
+			output-high;
+		};
+
+		group1 {
+			pins = <EUSART1_RX_PC7>;
+			input-enable;
+			silabs,input-filter;
+		};
+	};
+
+	eusart1_default: eusart1_default {
+		group0 {
+			pins = <EUSART1_TX_PA5>, <EUSART1_SCLK_PA3>;
+			drive-push-pull;
+			output-high;
+		};
+
+		group1 {
+			pins = <EUSART1_RX_PA4>;
+			input-enable;
+			silabs,input-filter;
+		};
+	};
+
+	usart0_default: usart0_default {
+		group0 {
+			pins = <USART0_TX_PA8>;
+			drive-push-pull;
+			output-high;
+		};
+
+		group1 {
+			pins = <USART0_RX_PA9>;
+			input-enable;
+			silabs,input-filter;
+		};
+	};
+
+	i2c0_default: i2c0_default {
+		group0 {
+			pins = <I2C0_SCL_PC4>, <I2C0_SDA_PC5>;
+			drive-open-drain;
+			bias-pull-up;
+		};
+	};
+};

boards/seeed/xiao_mg24/xiao_mg24.dts

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+/*
+ * Copyright (c) 2025 Pete Johanson
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <silabs/efr32mg24b220f1536im48.dtsi>
+#include "xiao_mg24-pinctrl.dtsi"
+#include "seeed_xiao_connector.dtsi"
+
+/ {
+	model = "Seeed XIAO MG24";
+	compatible = "seeed,xiao_mg24", "silabs,efr32mg24";
+
+	chosen {
+		zephyr,console = &usart0;
+		zephyr,shell-uart = &usart0;
+		zephyr,uart-pipe = &usart0;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+		zephyr,code-partition = &slot0_partition;
+		zephyr,bt-hci = &bt_hci_silabs;
+	};
+
+	/* These aliases are provided for compatibility with samples */
+	aliases {
+		led0 = &led0;
+		watchdog0 = &wdog0;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led0: led_0 {
+			gpios = <&gpioa 7 GPIO_ACTIVE_LOW>;
+			label = "LED 0";
+		};
+	};
+};
+
+&cpu0 {
+	clock-frequency = <78000000>;
+};
+
+&pstate_em3 {
+	status = "disabled";
+};
+
+&hfxo {
+	status = "okay";
+	ctune = <95>;
+	precision = <50>;
+};
+
+&lfxo {
+	status = "okay";
+	ctune = <44>;
+	precision = <50>;
+};
+
+&hfrcodpll {
+	clock-frequency = <DT_FREQ_M(78)>;
+	clocks = <&hfxo>;
+	dpll-n = <3839>;
+	dpll-m = <1919>;
+	dpll-edge = "fall";
+	dpll-lock = "phase";
+	dpll-autorecover;
+};
+
+&em23grpaclk {
+	clocks = <&lfxo>;
+};
+
+&em4grpaclk {
+	clocks = <&lfxo>;
+};
+
+&sysrtcclk {
+	clocks = <&lfxo>;
+};
+
+&wdog0clk {
+	clocks = <&lfxo>;
+};
+
+&wdog1clk {
+	clocks = <&lfxo>;
+};
+
+&usart0 {
+	current-speed = <115200>;
+	pinctrl-0 = <&usart0_default>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
+&eusart0 {
+	compatible = "silabs,eusart-uart";
+	pinctrl-0 = <&eusart0_default>;
+	pinctrl-names = "default";
+	current-speed = <115200>;
+};
+
+&eusart1 {
+	compatible = "silabs,eusart-spi";
+	pinctrl-0 = <&eusart1_default>;
+	pinctrl-names = "default";
+	cs-gpios = <&gpioc 7 GPIO_ACTIVE_LOW>;
+	clock-frequency = <4000000>;
+	#address-cells = <1>;
+	#size-cells = <0>;
+};
+
+&i2c0 {
+	pinctrl-0 = <&i2c0_default>;
+	pinctrl-names = "default";
+};
+
+&gpio {
+	location-swo = <0>;
+	status = "okay";
+};
+
+&gpioa {
+	status = "okay";
+};
+
+&gpiob {
+	status = "okay";
+
+	rf_sw: rf_sw {
+		gpio-hog;
+		gpios = <4 GPIO_ACTIVE_HIGH>;
+		output-low;
+	};
+
+	rf_sw_enable: rf_sw_enable {
+		gpio-hog;
+		gpios = <5 GPIO_ACTIVE_HIGH>;
+		output-high;
+	};
+};
+
+&gpioc {
+	status = "okay";
+
+};
+
+&gpiod {
+	status = "okay";
+};
+
+&wdog0 {
+	status = "okay";
+};
+
+&sysrtc0 {
+	status = "okay";
+};
+
+&se {
+	status = "okay";
+};
+
+&flash0 {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		/* Reserve 48 kB for the bootloader */
+		boot_partition: partition@0 {
+			label = "mcuboot";
+			reg = <0x0 DT_SIZE_K(48)>;
+			read-only;
+		};
+
+		/* Reserve 720 kB for the application in slot 0 */
+		slot0_partition: partition@c000 {
+			label = "image-0";
+			reg = <0x0000c000 0x000B8000>;
+		};
+
+		/* Reserve 720 kB for the application in slot 1 */
+		slot1_partition: partition@C4000 {
+			label = "image-1";
+			reg = <0x000C0000 0x000B8000>;
+		};
+
+		/* Set 16 kB of storage at the end of the 1536 kB of flash */
+		storage_partition: partition@17c000 {
+			label = "storage";
+			reg = <0x0017c000 DT_SIZE_K(16)>;
+		};
+	};
+};
+
+&bt_hci_silabs {
+	status = "okay";
+};

boards/seeed/xiao_mg24/xiao_mg24.yaml

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+identifier: xiao_mg24
+name: XIAO MG24
+type: mcu
+arch: arm
+ram: 256
+flash: 1536
+toolchain:
+  - zephyr
+  - gnuarmemb
+supported:
+  - bluetooth
+  - gpio
+  - uart
+  - dma
+  - watchdog
+  - comparator
+testing:
+  ignore_tags:
+    - pm
+vendor: seeed

boards/seeed/xiao_mg24/xiao_mg24_defconfig

@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_ARM_MPU=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_GPIO=y