dts: arm: silabs: Move efr32bg27 to xg27 directory
Introduce subdirectory for xg27 socs. Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
This commit is contained in:
Aksel Skauge Mellbye
Benjamin Cabé
parent
96df30829e
commit
ea383dee9c
6 changed files with 156 additions and 179 deletions
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@ -5,7 +5,7 @@
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*/
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/dts-v1/;
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#include <silabs/efr32bg27.dtsi>
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#include <silabs/xg27/efr32bg27c140f768im40.dtsi>
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#include "xg27_dk2602a-pinctrl.dtsi"
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#include "thunderboard.dtsi"
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#include <zephyr/dt-bindings/regulator/silabs_dcdc.h>
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@ -1,163 +0,0 @@
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/*
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* Copyright (c) 2023 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "efr32bg2x.dtsi"
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#include <dt-bindings/clock/silabs/xg27-clock.h>
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#include <dt-bindings/dma/silabs/xg27-dma.h>
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#include <mem.h>
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/ {
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clocks {
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hfxort: hfxort {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&hfxo>;
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};
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hfrcodpllrt: hfrcodpllrt {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&hfrcodpll>;
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};
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eusart0clk: eusart0clk {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&em01grpaclk>;
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};
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};
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soc {
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clkin0: clkin0@5003c460 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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reg = <0x5003c460 0x4>;
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clock-frequency = <DT_FREQ_M(38)>;
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};
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acmp0: acmp@5a008000 {
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compatible = "silabs,acmp";
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reg = <0x5a008000 0x4000>;
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interrupts = <48 2>;
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clocks = <&cmu CLOCK_ACMP0 CLOCK_BRANCH_EM01GRPACLK>;
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status = "disabled";
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};
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};
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};
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&cmu {
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interrupts = <52 2>;
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};
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&hfxo {
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interrupts = <50 2>;
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interrupt-names = "hfxo";
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};
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&msc {
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flash0: flash@8000000 {
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compatible = "soc-nv-flash";
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write-block-size = <4>;
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erase-block-size = <8192>;
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reg = <0x08000000 DT_SIZE_K(768)>;
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};
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(64)>;
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};
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&gpio {
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interrupts = <30 2>, <31 2>;
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interrupt-names = "gpio_odd", "gpio_even";
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clocks = <&cmu CLOCK_GPIO CLOCK_BRANCH_PCLK>;
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gpioa: gpio@5003c030 {
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compatible = "silabs,gecko-gpio-port";
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reg = <0x5003C030 0x30>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpiob: gpio@5003c060 {
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compatible = "silabs,gecko-gpio-port";
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reg = <0x5003C060 0x30>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpioc: gpio@5003c090 {
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compatible = "silabs,gecko-gpio-port";
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reg = <0x5003C090 0x30>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpiod: gpio@5003c0c0 {
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compatible = "silabs,gecko-gpio-port";
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reg = <0x5003C0C0 0x30>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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};
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&i2c0 {
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interrupts = <32 2>;
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clocks = <&cmu CLOCK_I2C0 CLOCK_BRANCH_LSPCLK>;
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};
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&i2c1 {
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interrupts = <33 2>;
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clocks = <&cmu CLOCK_I2C1 CLOCK_BRANCH_PCLK>;
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};
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&usart0 {
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interrupts = <16 2>, <17 2>;
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clocks = <&cmu CLOCK_USART0 CLOCK_BRANCH_PCLK>;
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};
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&usart1 {
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interrupts = <18 2>, <19 2>;
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clocks = <&cmu CLOCK_USART1 CLOCK_BRANCH_PCLK>;
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};
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&burtc0 {
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interrupts = <23 2>;
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clocks = <&cmu CLOCK_BURTC CLOCK_BRANCH_EM4GRPACLK>;
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};
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&rtcc0 {
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interrupts = <15 2>;
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interrupt-names = "rtcc";
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clocks = <&cmu CLOCK_RTCC CLOCK_BRANCH_RTCCCLK>;
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};
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&adc0 {
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interrupts = <54 2>;
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clocks = <&cmu CLOCK_IADC0 CLOCK_BRANCH_IADCCLK>;
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};
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&dcdc {
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interrupts = <8 2>;
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};
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&dma0 {
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interrupts = <26 0>;
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};
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&wdog0 {
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interrupts = <49 2>;
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clocks = <&cmu CLOCK_WDOG0 CLOCK_BRANCH_WDOG0CLK>;
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};
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&radio {
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interrupts = <36 1>, <37 1>, <38 1>, <39 1>, <40 1>, <41 1>,
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<42 1>, <43 1>, <44 1>, <45 1>, <46 1>, <47 1>;
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interrupt-names = "agc", "bufc", "frc_pri", "frc", "modem", "protimer",
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"rac_rsm", "rac_seq", "rdmailbox", "rfsense", "synth",
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"prortc";
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};
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7
dts/arm/silabs/xg27/efr32bg27.dtsi
Normal file
7
dts/arm/silabs/xg27/efr32bg27.dtsi
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@ -0,0 +1,7 @@
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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <silabs/xg27/efr32xg27.dtsi>
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23
dts/arm/silabs/xg27/efr32bg27c140f768im40.dtsi
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23
dts/arm/silabs/xg27/efr32bg27c140f768im40.dtsi
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@ -0,0 +1,23 @@
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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <silabs/xg27/efr32bg27.dtsi>
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#include <mem.h>
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/ {
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soc {
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compatible = "silabs,efr32bg27c140f768im40", "silabs,efr32mg27", "silabs,xg27",
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"silabs,efr32", "simple-bus";
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};
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};
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&flash0 {
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reg = <0x08000000 DT_SIZE_K(768)>;
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};
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&sram0 {
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reg = <0x20000000 DT_SIZE_K(64)>;
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};
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30
dts/arm/silabs/xg27/efr32xg27.dtsi
Normal file
30
dts/arm/silabs/xg27/efr32xg27.dtsi
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@ -0,0 +1,30 @@
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/*
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* Copyright (c) 2025 Silicon Laboratories Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <silabs/xg27/xg27.dtsi>
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/ {
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soc {
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radio: radio@b0000000 {
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compatible = "silabs,series2-radio";
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reg = <0xb0000000 0x1000000>;
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interrupts = <36 1>, <37 1>, <38 1>, <39 1>, <40 1>, <41 1>,
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<42 1>, <43 1>, <44 1>, <45 1>, <46 1>, <47 1>;
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interrupt-names = "agc", "bufc", "frc_pri", "frc", "modem", "protimer",
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"rac_rsm", "rac_seq", "rdmailbox", "rfsense", "synth",
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"prortc";
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pa-initial-power-dbm = <10>;
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pa-ramp-time-us = <2>;
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pa-voltage-mv = <3300>;
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pa-2p4ghz = "highest";
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bt_hci_silabs: bt_hci_silabs {
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compatible = "silabs,bt-hci-efr32";
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status = "disabled";
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};
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};
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};
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};
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@ -5,6 +5,8 @@
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*/
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#include <arm/armv8-m.dtsi>
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#include <dt-bindings/clock/silabs/xg27-clock.h>
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#include <dt-bindings/dma/silabs/xg27-dma.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/pinctrl/gecko-pinctrl.h>
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@ -18,6 +20,16 @@
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};
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clocks {
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hfxort: hfxort {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&hfxo>;
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};
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hfrcodpllrt: hfrcodpllrt {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&hfrcodpll>;
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};
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sysclk: sysclk {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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@ -98,6 +110,11 @@
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compatible = "fixed-factor-clock";
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clocks = <&hclk>;
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};
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eusart0clk: eusart0clk {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&em01grpaclk>;
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};
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};
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cpus {
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@ -173,6 +190,7 @@
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cmu: clock@50008000 {
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compatible = "silabs,series-clock";
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reg = <0x50008000 0x4000>;
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interrupts = <52 2>;
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interrupt-names = "cmu";
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status = "okay";
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#clock-cells = <2>;
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@ -189,6 +207,8 @@
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#clock-cells = <0>;
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compatible = "silabs,hfxo";
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reg = <0x5000c000 0x4000>;
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interrupts = <50 2>;
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interrupt-names = "hfxo";
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clock-frequency = <DT_FREQ_K(38400)>;
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ctune = <140>;
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precision = <50>;
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@ -231,15 +251,22 @@
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compatible = "silabs,series2-flash-controller";
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reg = <0x50030000 0xC69>;
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interrupts = <49 2>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@8000000 {
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compatible = "soc-nv-flash";
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write-block-size = <4>;
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erase-block-size = <8192>;
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};
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};
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usart0: usart@5005c000 {
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compatible = "silabs,usart-spi";
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reg = <0x5005C000 0x400>;
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interrupts = <16 2>, <17 2>;
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interrupt-names = "rx", "tx";
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clocks = <&cmu CLOCK_USART0 CLOCK_BRANCH_PCLK>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -248,19 +275,26 @@
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usart1: usart@50060000 {
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compatible = "silabs,usart-uart";
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reg = <0x50060000 0x400>;
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interrupts = <18 2>, <19 2>;
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interrupt-names = "rx", "tx";
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clocks = <&cmu CLOCK_USART1 CLOCK_BRANCH_PCLK>;
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status = "disabled";
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};
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burtc0: burtc@50064000 {
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compatible = "silabs,gecko-burtc";
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reg = <0x50064000 0x3034>;
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interrupts = <23 2>;
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clocks = <&cmu CLOCK_BURTC CLOCK_BRANCH_EM4GRPACLK>;
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status = "disabled";
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};
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rtcc0: stimer0: rtcc@58000000 {
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compatible = "silabs,gecko-stimer";
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reg = <0x58000000 0x3054>;
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interrupts = <15 2>;
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interrupt-names = "rtcc";
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clocks = <&cmu CLOCK_RTCC CLOCK_BRANCH_RTCCCLK>;
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clock-frequency = <32768>;
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prescaler = <1>;
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status = "disabled";
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@ -277,6 +311,8 @@
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compatible = "silabs,gecko-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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reg = <0x5a010000 0x3044>;
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interrupts = <32 2>;
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clocks = <&cmu CLOCK_I2C0 CLOCK_BRANCH_LSPCLK>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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@ -286,6 +322,8 @@
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compatible = "silabs,gecko-i2c";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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reg = <0x50068000 0x3044>;
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interrupts = <33 2>;
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clocks = <&cmu CLOCK_I2C1 CLOCK_BRANCH_PCLK>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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gpio: gpio@5003c000 {
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compatible = "silabs,gecko-gpio";
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reg = <0x5003C000 0x440>;
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interrupts = <30 2>, <31 2>;
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interrupt-names = "gpio_odd", "gpio_even";
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clocks = <&cmu CLOCK_GPIO CLOCK_BRANCH_PCLK>;
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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gpioa: gpio@5003c030 {
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compatible = "silabs,gecko-gpio-port";
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reg = <0x5003C030 0x30>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpiob: gpio@5003c060 {
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compatible = "silabs,gecko-gpio-port";
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reg = <0x5003C060 0x30>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpioc: gpio@5003c090 {
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compatible = "silabs,gecko-gpio-port";
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reg = <0x5003C090 0x30>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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gpiod: gpio@5003c0c0 {
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compatible = "silabs,gecko-gpio-port";
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reg = <0x5003C0C0 0x30>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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};
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pinctrl: pin-controller@5003c440 {
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@ -305,9 +378,17 @@
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reg-names = "dbus", "abus";
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};
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clkin0: clkin0@5003c460 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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reg = <0x5003c460 0x4>;
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clock-frequency = <DT_FREQ_M(38)>;
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};
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dma0: dma@40040000{
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compatible = "silabs,ldma";
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reg = <0x40040000 0x4000>;
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interrupts = <26 0>;
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#dma-cells = <1>;
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dma-channels = <8>;
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status = "disabled";
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@ -316,6 +397,8 @@
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wdog0: wdog@4a018000 {
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compatible = "silabs,gecko-wdog";
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reg = <0x4A018000 0x3028>;
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interrupts = <49 2>;
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clocks = <&cmu CLOCK_WDOG0 CLOCK_BRANCH_WDOG0CLK>;
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peripheral-id = <0>;
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status = "disabled";
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};
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@ -323,29 +406,26 @@
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adc0: adc@5a004000 {
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compatible = "silabs,gecko-iadc";
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reg = <0x5a004000 0x4000>;
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interrupts = <54 2>;
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clocks = <&cmu CLOCK_IADC0 CLOCK_BRANCH_IADCCLK>;
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status = "disabled";
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#io-channel-cells = <1>;
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};
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acmp0: acmp@5a008000 {
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compatible = "silabs,acmp";
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reg = <0x5a008000 0x4000>;
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interrupts = <48 2>;
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clocks = <&cmu CLOCK_ACMP0 CLOCK_BRANCH_EM01GRPACLK>;
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status = "disabled";
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};
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dcdc: dcdc@50094000 {
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compatible = "silabs,series2-dcdc";
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reg = <0x50094000 0x4000>;
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interrupts = <8 2>;
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||||
status = "disabled";
|
||||
};
|
||||
|
||||
radio: radio@b0000000 {
|
||||
compatible = "silabs,series2-radio";
|
||||
reg = <0xb0000000 0x1000000>;
|
||||
pa-initial-power-dbm = <10>;
|
||||
pa-ramp-time-us = <2>;
|
||||
pa-voltage-mv = <3300>;
|
||||
pa-2p4ghz = "highest";
|
||||
|
||||
bt_hci_silabs: bt_hci_silabs {
|
||||
compatible = "silabs,bt-hci-efr32";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
Loading…
Add table
Add a link
Reference in a new issue