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doxygen: change comment style to match javadoc

Browse source 
The change replaces multiple asterisks to ** at
the beginning of comments and adds a space before
the asterisks at the beginning of lines.

Change-Id: I7656bde3bf4d9a31e38941e43b580520432dabc1
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2015-07-01 17:22:39 -04:00
commit ea0d0b220c
305 changed files with 11249 additions and 11249 deletions
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24
arch/arc/core/atomic.S
View file

@ -60,7 +60,7 @@ GTEXT(atomic_cas)
.section .TEXT._Atomic, "ax"
.balign 2
/*******************************************************************************
/**
*
* atomic_clear - atomically clear a memory location
*
@ -83,7 +83,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_clear_set, atomic_clear)
mov_s r1, 0
/* fall through into atomic_set */
/*******************************************************************************
/**
*
* atomic_set - atomically set a memory location
*
@ -111,7 +111,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_clear_set, atomic_set)
j_s.d [blink]
mov_s r0, r1 /* return old value */
/******************************************************************************
/**
*
* atomic_get - Get the value of a shared memory atomically
*
@ -130,7 +130,7 @@ SECTION_FUNC(TEXT, atomic_get)
ld_s r0, [r0, 0]
j_s [blink]
/*******************************************************************************
/**
*
* atomic_inc - atomically increment a memory location
*
@ -156,7 +156,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_inc_add, atomic_inc)
mov_s r1, 1
/* fall through into atomic_add */
/*******************************************************************************
/**
*
* atomic_add - atomically add a value to a memory location
*
@ -191,7 +191,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_inc_add, atomic_add)
j_s.d [blink]
mov_s r0, r2 /* return old value */
/*******************************************************************************
/**
*
* atomic_dec - atomically decrement a memory location
*
@ -217,7 +217,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_dec_sub, atomic_dec)
mov_s r1, 1
/* fall through into atomic_sub */
/*******************************************************************************
/**
*
* atomic_sub - atomically subtract a value from a memory location
*
@ -253,7 +253,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_dec_sub, atomic_sub)
j_s.d [blink]
mov_s r0, r2 /* return old value */
/******************************************************************************
/**
*
* atomic_nand - atomically perform a bitwise NAND on a memory location
*
@ -290,7 +290,7 @@ SECTION_FUNC(TEXT, atomic_nand)
j_s.d [blink]
mov_s r0, r2 /* return old value */
/******************************************************************************
/**
*
* atomic_and - atomically perform a bitwise AND on a memory location
*
@ -326,7 +326,7 @@ SECTION_FUNC(TEXT, atomic_and)
j_s.d [blink]
mov_s r0, r2 /* return old value */
/*******************************************************************************
/**
*
* atomic_or - atomically perform a bitwise OR on memory location
*
@ -362,7 +362,7 @@ SECTION_FUNC(TEXT, atomic_or)
j_s.d [blink]
mov_s r0, r2 /* return old value */
/*******************************************************************************
/**
*
* atomic_xor - atomically perform a bitwise XOR on a memory location
*
@ -398,7 +398,7 @@ SECTION_FUNC(TEXT, atomic_xor)
j_s.d [blink]
mov_s r0, r2 /* return old value */
/*******************************************************************************
/**
*
* atomic_cas - atomically compare-and-swap the contents of a memory location
*

6
arch/arc/core/fast_irq.S
View file

@ -53,7 +53,7 @@ GDATA(_firq_stack)
SECTION_VAR(NOINIT, _firq_stack)
.space CONFIG_FIRQ_STACK_SIZE
/*******************************************************************************
/**
*
* _firq_enter - work to be done before handing control to a FIRQ ISR
*
@ -97,7 +97,7 @@ SECTION_FUNC(TEXT, _firq_enter)
j @_isr_demux
/*******************************************************************************
/**
*
* _firq_exit - work to be done exiting a FIRQ
*
@ -256,7 +256,7 @@ _firq_no_reschedule:
/* LP registers are already restored, just switch back to bank 0 */
rtie
/*******************************************************************************
/**
*
* _firq_stack_setup - install the FIRQ stack in register bank 1
*

2
arch/arc/core/fatal.c
View file

@ -52,7 +52,7 @@ const NANO_ESF _default_esf = {
0xdeaddead, /* placeholder */
};
/*******************************************************************************
/**
*
* _NanoFatalErrorHandler - nanokernel fatal error handler
*

4
arch/arc/core/ffs.S
View file

@ -46,7 +46,7 @@ most and least significant bit set respectively.
GTEXT(nanoFfsMsb)
GTEXT(nanoFfsLsb)
/*******************************************************************************
/**
*
* nanoFfsMsb - find first set bit (searching from the most significant bit)
*
@ -69,7 +69,7 @@ SECTION_FUNC(TEXT, nanoFfsMsb)
j_s.d [blink]
add.nz r0, r0, 1
/*******************************************************************************
/**
*
* nanoFfsLsb - find first set bit (searching from the least significant bit)
*

4
arch/arc/core/irq_lock.S
View file

@ -40,7 +40,7 @@
#include <toolchain.h>
#include <arch/cpu.h>
/*******************************************************************************
/**
*
* irq_lock - disable all interrupts on the local CPU
*
@ -75,7 +75,7 @@ SECTION_FUNC(TEXT, irq_lock)
j_s.d [blink]
clri r0
/*******************************************************************************
/**
*
* irq_unlock - enable all interrupts on the local CPU
*

4
arch/arc/core/regular_irq.S
View file

@ -49,7 +49,7 @@ See isr_wrapper.S for details.
GTEXT(_rirq_enter)
GTEXT(_rirq_exit)
/*******************************************************************************
/**
*
* _rirq_enter - work to be done before handing control to an IRQ ISR
*
@ -75,7 +75,7 @@ SECTION_FUNC(TEXT, _rirq_enter)
j _isr_demux
/*******************************************************************************
/**
*
* _rirq_exit - work to be done exiting an IRQ
*

2
arch/arc/core/swap.S
View file

@ -51,7 +51,7 @@ GTEXT(_Swap)
GDATA(_nanokernel)
/*******************************************************************************
/**
*
* _Swap - initiate a cooperative context switch
*

2
arch/arc/fatal_error.c
View file

@ -61,7 +61,7 @@ static inline void nonEssentialTaskAbort(void)
} while ((0))
#endif
/*******************************************************************************
/**
*
* _SysFatalErrorHandler - fatal error handler
*

4
arch/arc/include/nano_private.h
View file

@ -238,7 +238,7 @@ static ALWAYS_INLINE void nanoArchInit(void)
_irq_setup();
}
/*******************************************************************************
/**
*
* fiberRtnValueSet - set the return value for the specified fiber (inline)
*
@ -256,7 +256,7 @@ static ALWAYS_INLINE void fiberRtnValueSet(tCCS *fiber, unsigned int value)
fiber->return_value = value;
}
/*******************************************************************************
/**
*
* _IS_IN_ISR - indicates if kernel is handling interrupt
*

6
arch/arc/prep_c.c
View file

@ -44,7 +44,7 @@ initialization is performed.
#include <toolchain.h>
#include <linker-defs.h>
/*******************************************************************************
/**
*
* bssZero - clear BSS
*
@ -63,7 +63,7 @@ static void bssZero(void)
}
}
/*******************************************************************************
/**
*
* dataCopy - copy the data section from ROM to RAM
*
@ -90,7 +90,7 @@ static void dataCopy(void)
#endif
extern FUNC_NORETURN void _Cstart(void);
/*******************************************************************************
/**
*
* _PrepC - prepare to and run C code
*

2
arch/arc/reset.S
View file

@ -46,7 +46,7 @@ Reset handler that prepares the system for running C code.
GTEXT(__reset)
/*******************************************************************************
/**
*
* __reset - reset vector
*

8
arch/arm/bsp/CortexM/nmi.c
View file

@ -52,7 +52,7 @@ extern void _SysNmiOnReset(void);
typedef void (*_NmiHandler_t)(void);
static _NmiHandler_t handler = _SysNmiOnReset;
/*******************************************************************************
/**
*
* _DefaultHandler - default NMI handler installed when kernel is up
*
@ -68,7 +68,7 @@ static void _DefaultHandler(void)
_ScbSystemReset();
}
/*******************************************************************************
/**
*
* _NmiInit - install default runtime NMI handler
*
@ -84,7 +84,7 @@ void _NmiInit(void)
handler = _DefaultHandler;
}
/*******************************************************************************
/**
*
* _NmiHandlerSet - install a custom runtime NMI handler
*
@ -101,7 +101,7 @@ void _NmiHandlerSet(void (*pHandler)(void))
}
#endif /* CONFIG_RUNTIME_NMI */
/*******************************************************************************
/**
*
* __nmi - handler installed in the vector table
*

6
arch/arm/bsp/CortexM/prep_c.c
View file

@ -44,7 +44,7 @@ initialization is performed.
#include <toolchain.h>
#include <linker-defs.h>
/*******************************************************************************
/**
*
* bssZero - clear BSS
*
@ -63,7 +63,7 @@ static void bssZero(void)
}
}
/*******************************************************************************
/**
*
* dataCopy - copy the data section from ROM to RAM
*
@ -90,7 +90,7 @@ static void dataCopy(void)
#endif
extern FUNC_NORETURN void _Cstart(void);
/*******************************************************************************
/**
*
* _PrepC - prepare to and run C code
*

2
arch/arm/bsp/CortexM/reset.S
View file

@ -47,7 +47,7 @@ _ASM_FILE_PROLOGUE
GTEXT(__reset)
/*******************************************************************************
/**
*
* __reset - reset vector
*

4
arch/arm/bsp/CortexM/scb.c
View file

@ -44,7 +44,7 @@ definitions and more complex routines, if needed.
#define SCB_AIRCR_VECTKEY_EN_W 0x05FA
/*******************************************************************************
/**
*
* _ScbSystemReset - reset the system
*
@ -63,7 +63,7 @@ void _ScbSystemReset(void)
__scs.scb.aircr.val = reg.val;
}
/*******************************************************************************
/**
*
* _ScbNumPriGroupSet - set the number of priority groups based on the number
* of exception priorities desired

2
arch/arm/bsp/sysFatalErrorHandler.c
View file

@ -61,7 +61,7 @@ static inline void nonEssentialTaskAbort(void)
} while ((0))
#endif
/*******************************************************************************
/**
*
* _SysFatalErrorHandler - fatal error handler
*

24
arch/arm/core/atomic.S
View file

@ -59,7 +59,7 @@ GTEXT(atomic_inc)
GTEXT(atomic_sub)
GTEXT(atomic_cas)
/*******************************************************************************
/**
*
* atomic_clear - atomically clear a memory location
*
@ -82,7 +82,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_clear_set, atomic_clear)
MOV r1, #0
/* fall through into atomic_set */
/*******************************************************************************
/**
*
* atomic_set - atomically set a memory location
*
@ -114,7 +114,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_clear_set, atomic_set)
MOV r0, r2 /* return old value */
MOV pc, lr
/******************************************************************************
/**
*
* atomic_get - Get the value of a shared memory atomically
*
@ -133,7 +133,7 @@ SECTION_FUNC(TEXT, atomic_get)
LDR r0, [r0]
MOV pc, lr
/*******************************************************************************
/**
*
* atomic_inc - atomically increment a memory location
*
@ -159,7 +159,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_inc_add, atomic_inc)
MOV r1, #1
/* fall through into atomic_add */
/*******************************************************************************
/**
*
* atomic_add - atomically add a value to a memory location
*
@ -193,7 +193,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_inc_add, atomic_add)
MOV r0, r2 /* return old value */
MOV pc, lr
/*******************************************************************************
/**
*
* atomic_dec - atomically decrement a memory location
*
@ -219,7 +219,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_decSub, atomic_dec)
MOV r1, #1
/* fall through into atomic_sub */
/*******************************************************************************
/**
*
* atomic_sub - atomically subtract a value from a memory location
*
@ -253,7 +253,7 @@ SECTION_SUBSEC_FUNC(TEXT, atomic_decSub, atomic_sub)
MOV r0, r2 /* return old value */
MOV pc, lr
/******************************************************************************
/**
*
* atomic_nand - atomically perform a bitwise NAND on a memory location
*
@ -288,7 +288,7 @@ SECTION_FUNC(TEXT, atomic_nand)
MOV r0, r2 /* return old value */
MOV pc, lr
/******************************************************************************
/**
*
* atomic_and - atomically perform a bitwise AND on a memory location
*
@ -322,7 +322,7 @@ SECTION_FUNC(TEXT, atomic_and)
MOV r0, r2 /* return old value */
MOV pc, lr
/*******************************************************************************
/**
*
* atomic_or - atomically perform a bitwise OR on memory location
*
@ -356,7 +356,7 @@ SECTION_FUNC(TEXT, atomic_or)
MOV r0, r2 /* return old value */
MOV pc, lr
/*******************************************************************************
/**
*
* atomic_xor - atomically perform a bitwise XOR on a memory location
*
@ -390,7 +390,7 @@ SECTION_FUNC(TEXT, atomic_xor)
MOV r0, r2 /* return old value */
MOV pc, lr
/*******************************************************************************
/**
*
* atomic_cas - atomically compare-and-swap the contents of a memory location
*

4
arch/arm/core/basepri.S
View file

@ -59,7 +59,7 @@ _ASM_FILE_PROLOGUE
GTEXT(irq_lock)
GTEXT(irq_unlock)
/*******************************************************************************
/**
*
* irq_lock - lock interrupts
*
@ -78,7 +78,7 @@ SECTION_FUNC(TEXT,irq_lock)
msr BASEPRI, r1
bx lr
/*******************************************************************************
/**
*
* irq_unlock - unlock interrupts
*

4
arch/arm/core/context.c
View file

@ -53,7 +53,7 @@ tNANO _nanokernel = {0};
#endif
#if defined(CONFIG_CONTEXT_MONITOR)
/*******************************************************************************
/**
*
* _context_monitor_init - initialize context monitoring support
*
@ -81,7 +81,7 @@ static ALWAYS_INLINE void _context_monitor_init(struct ccs *pCcs /* context */
}
#endif /* CONFIG_CONTEXT_MONITOR */
/*******************************************************************************
/**
*
* _NewContext - intialize a new context (thread) from its stack space
*

10
arch/arm/core/cpu_idle.S
View file

@ -56,7 +56,7 @@ GTEXT(nano_cpu_atomic_idle)
#define _SCR_INIT_BITS _SCB_SCR_SEVONPEND
/*******************************************************************************
/**
*
* _CpuIdleInit - initialization of CPU idle
*
@ -78,7 +78,7 @@ SECTION_FUNC(TEXT, _CpuIdleInit)
#ifdef CONFIG_ADVANCED_POWER_MANAGEMENT
/*******************************************************************************
/**
*
* _NanoIdleValGet - get the kernel idle setting
*
@ -96,7 +96,7 @@ SECTION_FUNC(TEXT, _NanoIdleValGet)
ldr r0, [r0, #__tNANO_idle_OFFSET]
bx lr
/*******************************************************************************
/**
*
* _NanoIdleValClear - clear the kernel idle setting
*
@ -117,7 +117,7 @@ SECTION_FUNC(TEXT, _NanoIdleValClear)
#endif /* CONFIG_ADVANCED_POWER_MANAGEMENT */
/*******************************************************************************
/**
*
* nano_cpu_idle - power save idle routine for ARM Cortex-M
*
@ -142,7 +142,7 @@ SECTION_FUNC(TEXT, nano_cpu_idle)
bx lr
/*******************************************************************************
/**
*
* nano_cpu_atomic_idle - atomically re-enable interrupts and enter low power mode
*

4
arch/arm/core/exc_exit.S
View file

@ -61,7 +61,7 @@ GDATA(_nanokernel)
#endif
#define _EXIT_EXC_IF_FIBER_NOT_READY _EXIT_EXC_IF_FIBER_PREEMPTED
/*******************************************************************************
/**
*
* _IntExit - kernel housekeeping when exiting interrupt handler installed
* directly in vector table
@ -92,7 +92,7 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, _IntExit)
/* _IntExit falls through to _ExcExit (they are aliases of each other) */
/*******************************************************************************
/**
*
* _ExcExit - kernel housekeeping when exiting exception handler installed
* directly in vector table

2
arch/arm/core/fatal.c
View file

@ -62,7 +62,7 @@ const NANO_ESF _default_esf = {0xdeaddead, /* a1 */
0xdeaddead, /* xpsr */
};
/*******************************************************************************
/**
*
* _NanoFatalErrorHandler - nanokernel fatal error handler
*

22
arch/arm/core/fault.c
View file

@ -59,7 +59,7 @@ Common fault handler for ARM Cortex-M processors.
#endif
#if (CONFIG_FAULT_DUMP == 1)
/*******************************************************************************
/**
*
* _FaultDump - dump information regarding fault (FAULT_DUMP == 1)
*
@ -118,7 +118,7 @@ void _FaultDump(const NANO_ESF *esf, int fault)
#endif
#if (CONFIG_FAULT_DUMP == 2)
/*******************************************************************************
/**
*
* _FaultContextShow - dump context information
*
@ -137,7 +137,7 @@ static void _FaultContextShow(const NANO_ESF *esf)
esf->pc);
}
/*******************************************************************************
/**
*
* _MpuFault - dump MPU fault information
*
@ -172,7 +172,7 @@ static void _MpuFault(const NANO_ESF *esf,
}
}
/*******************************************************************************
/**
*
* _BusFault - dump bus fault information
*
@ -213,7 +213,7 @@ static void _BusFault(const NANO_ESF *esf,
}
}
/*******************************************************************************
/**
*
* _UsageFault - dump usage fault information
*
@ -253,7 +253,7 @@ static void _UsageFault(const NANO_ESF *esf)
_ScbUsageFaultAllFaultsReset();
}
/*******************************************************************************
/**
*
* _HardFault - dump hard fault information
*
@ -281,7 +281,7 @@ static void _HardFault(const NANO_ESF *esf)
}
}
/*******************************************************************************
/**
*
* _DebugMonitor - dump debug monitor exception information
*
@ -297,7 +297,7 @@ static void _DebugMonitor(const NANO_ESF *esf)
PR_EXC("***** Debug monitor exception (not implemented) *****\n");
}
/*******************************************************************************
/**
*
* _ReservedException - dump reserved exception information
*
@ -316,7 +316,7 @@ static void _ReservedException(const NANO_ESF *esf,
fault - 16);
}
/*******************************************************************************
/**
*
* _FaultDump - dump information regarding fault (FAULT_DUMP == 2)
*
@ -363,7 +363,7 @@ static void _FaultDump(const NANO_ESF *esf, int fault)
}
#endif /* FAULT_DUMP == 2 */
/*******************************************************************************
/**
*
* _Fault - fault handler
*
@ -394,7 +394,7 @@ void _Fault(
_SysFatalErrorHandler(_NANO_ERR_HW_EXCEPTION, esf);
}
/*******************************************************************************
/**
*
* _FaultInit - initialization of fault handling
*

2
arch/arm/core/fault_s.S
View file

@ -52,7 +52,7 @@ GTEXT(__usage_fault)
GTEXT(__debug_monitor)
GTEXT(__reserved)
/*******************************************************************************
/**
*
* __fault - fault handler installed in the fault and reserved vectors
*

4
arch/arm/core/ffs.S
View file

@ -48,7 +48,7 @@ _ASM_FILE_PROLOGUE
GTEXT(find_last_set)
GTEXT(find_first_set)
/*******************************************************************************
/**
*
* find_last_set - find first set bit (searching from the most significant bit)
*
@ -69,7 +69,7 @@ SECTION_FUNC(TEXT, find_last_set)
mov pc, lr
/*******************************************************************************
/**
*
* find_first_set - find first set bit (searching from the least significant bit)
*

2
arch/arm/core/fiber_abort.c
View file

@ -51,7 +51,7 @@ the PendSV exception.
#include <nanokernel.h>
#include <arch/cpu.h>
/*******************************************************************************
/**
*
* fiber_abort - abort the currently executing fiber
*

6
arch/arm/core/gdb_stub.S
View file

@ -51,7 +51,7 @@ anymore.
_ASM_FILE_PROLOGUE
/*******************************************************************************
/**
*
* _GdbStubExcEntry - exception entry extra work when GDB_INFO is enabled
*
@ -95,7 +95,7 @@ SECTION_FUNC(TEXT, _GdbStubExcEntry)
bx lr
/*******************************************************************************
/**
*
* _GdbStubExcExit - exception exit extra clean up when GDB_INFO is enabled
*
@ -129,7 +129,7 @@ SECTION_FUNC(TEXT, _GdbStubExcExit)
bx lr
/*******************************************************************************
/**
*
* _irq_vector_table_entry_with_gdb_stub - stub for ISRs installed directly in
* vector table

2
arch/arm/core/irq_init.c
View file

@ -45,7 +45,7 @@ the PendSV exception.
#include <nanokernel.h>
#include <arch/cpu.h>
/*******************************************************************************
/**
*
* _IntLibInit - initialize interrupts
*

14
arch/arm/core/irq_manage.c
View file

@ -46,7 +46,7 @@ SW_ISR_TABLE_DYNAMIC has to be enabled for connecting ISRs at runtime.
extern void __reserved(void);
/*******************************************************************************
/**
*
* irq_handler_set - replace an interrupt handler by another
*
@ -76,7 +76,7 @@ void irq_handler_set(unsigned int irq,
irq_unlock_inline(key);
}
/*******************************************************************************
/**
*
* irq_enable - enable an interrupt line
*
@ -94,7 +94,7 @@ void irq_enable(unsigned int irq)
_NvicIrqEnable(irq);
}
/*******************************************************************************
/**
*
* irq_disable - disable an interrupt line
*
@ -109,7 +109,7 @@ void irq_disable(unsigned int irq)
_NvicIrqDisable(irq);
}
/*******************************************************************************
/**
*
* irq_priority_set - set an interrupt's priority
*
@ -131,7 +131,7 @@ void irq_priority_set(unsigned int irq,
_NvicIrqPrioSet(irq, _EXC_PRIO(prio));
}
/*******************************************************************************
/**
*
* _irq_spurious - spurious interrupt handler
*
@ -149,7 +149,7 @@ void _irq_spurious(void *unused)
__reserved();
}
/*******************************************************************************
/**
*
* irq_connect - connect an ISR to an interrupt line
*
@ -172,7 +172,7 @@ int irq_connect(unsigned int irq,
return irq;
}
/*******************************************************************************
/**
*
* irq_disconnect - disconnect an ISR from an interrupt line
*

2
arch/arm/core/isr_wrapper.S
View file

@ -53,7 +53,7 @@ GDATA(_sw_isr_table)
GTEXT(_isr_wrapper)
GTEXT(_IntExit)
/*******************************************************************************
/**
*
* _isr_wrapper - wrapper around ISRs when inserted in software ISR table
*

6
arch/arm/core/swap.S
View file

@ -51,7 +51,7 @@ GTEXT(__pendsv)
GDATA(_nanokernel)
/*******************************************************************************
/**
*
* __pendsv - PendSV exception handler, handling context switches
*
@ -146,7 +146,7 @@ SECTION_FUNC(TEXT, __pendsv)
/* exc return */
bx lr
/*******************************************************************************
/**
*
* __svc - service call handler
*
@ -178,7 +178,7 @@ SECTION_FUNC(TEXT, __svc)
/* handler mode exit, to PendSV */
bx lr
/*******************************************************************************
/**
*
* _Swap - initiate a cooperative context switch
*

2
arch/arm/core/task_abort.c
View file

@ -52,7 +52,7 @@ PendSV exception and cause the immediate context switch to K_swapper.
static struct k_args cmd_packet;
/*******************************************************************************
/**
*
* _TaskAbort - abort the current task
*

6
arch/arm/fsl_frdm_k64f/system.c
View file

@ -94,7 +94,7 @@ uint8_t __security_frdm_k64f_section __security_frdm_k64f[] = {
/* Reserved for FlexNVM feature (unsupported by this MCU) */
0xFF, 0xFF};
/*******************************************************************************
/**
*
* clkInit - initialize the system clock
*
@ -247,7 +247,7 @@ static void clkInit(void)
#if defined(DO_CONSOLE_INIT)
/*******************************************************************************
/**
*
* consoleInit - initialize target-only console
*
@ -298,7 +298,7 @@ static void consoleInit(void)
} while ((0))
#endif /* DO_CONSOLE_INIT */
/*******************************************************************************
/**
*
* _InitHardware - perform basic hardware initialization
*

2
arch/arm/fsl_frdm_k64f/wdog.S
View file

@ -53,7 +53,7 @@ GTEXT(_WdogInit)
#define WDOG_UNLOCK_1_CMD 0xC520
#define WDOG_UNLOCK_2_CMD 0xD928
/*******************************************************************************
/**
*
* _WdogInit - Watchdog timer disable routine
*

4
arch/arm/include/CortexM/asm_inline_gcc.h
View file

@ -40,7 +40,7 @@
#ifndef _ASMLANGUAGE
/*******************************************************************************
/**
*
* _IpsrGet - obtain value of IPSR register
*
@ -59,7 +59,7 @@ static ALWAYS_INLINE uint32_t _IpsrGet(void)
return vector;
}
/*******************************************************************************
/**
*
* _MspSet - set the value of the Main Stack Pointer register
*

4
arch/arm/include/CortexM/exc.h
View file

@ -47,7 +47,7 @@ Exception/interrupt context helpers.
#else
/*******************************************************************************
/**
*
* _IsInIsr - find out if running in an ISR context
*
@ -68,7 +68,7 @@ static ALWAYS_INLINE int _IsInIsr(void)
return (vector > 13) || (vector && _ScbIsNestedExc());
}
/*******************************************************************************
/**
* _ExcSetup - setup system exceptions
*
* Set exception priorities to conform with the BASEPRI locking mechanism.

2
arch/arm/include/CortexM/stack.h
View file

@ -68,7 +68,7 @@ Stack helper functions.
extern char _interrupt_stack[CONFIG_ISR_STACK_SIZE];
/*******************************************************************************
/**
*
* _InterruptStackSetup - setup interrupt stack
*

2
arch/arm/include/nano_private.h
View file

@ -184,7 +184,7 @@ static ALWAYS_INLINE void nanoArchInit(void)
_CpuIdleInit();
}
/*******************************************************************************
/**
*
* fiberRtnValueSet - set the return value for the specified fiber (inline)
*

2
arch/arm/ti_lm3s6965/scp.c
View file

@ -49,7 +49,7 @@ Currently, only enabling the main OSC with default value is implemented.
volatile struct __scp __scp_section __scp;
/*******************************************************************************
/**
*
* _ScpMainOscEnable - enable main oscillator with default frequency of 6MHz
*

6
arch/arm/ti_lm3s6965/system.c
View file

@ -59,7 +59,7 @@ extern void _NmiInit(void);
#if defined(DO_CONSOLE_INIT)
/*******************************************************************************
/**
*
* uart_generic_info_init - initialize generic information for one UART
*
@ -79,7 +79,7 @@ inline void uart_generic_info_init(struct uart_init_info *pInfo)
#if defined(DO_CONSOLE_INIT)
/*******************************************************************************
/**
*
* consoleInit - initialize target-only console
*
@ -132,7 +132,7 @@ static void bluetooth_init(void)
} while ((0))
#endif /* CONFIG_BLUETOOTH */
/*******************************************************************************
/**
*
* _InitHardware - perform basic hardware initialization
*

2
arch/x86/cache.c
View file

@ -44,7 +44,7 @@ This module contains functions for manipulation caches.
#error Cannot use this implementation with a cache line size of 0
#endif
/*******************************************************************************
/**
*
* _SysCacheFlush - flush a page to main memory
*

2
arch/x86/cache_s.S
View file

@ -42,7 +42,7 @@ This module contains functions for manipulating caches.
/* externs (internal APIs) */
GTEXT(_SysCacheFlush)
/*******************************************************************************
/**
*
* _SysCacheFlush - flush a page to main memory
*

24
arch/x86/core/atomic.S
View file

@ -66,7 +66,7 @@ as there is no requirement for this capability.
GTEXT(atomic_and)
GTEXT(atomic_nand)
/*******************************************************************************
/**
*
* atomic_cas - atomic compare-and-set primitive
*
@ -113,7 +113,7 @@ BRANCH_LABEL(atomic_cas1)
ret
/*******************************************************************************
/**
*
* atomic_add - atomic add primitive
*
@ -145,7 +145,7 @@ SECTION_FUNC(TEXT, atomic_add)
ret
/*******************************************************************************
/**
*
* atomic_sub - atomic subtraction primitive
*
@ -178,7 +178,7 @@ SECTION_FUNC(TEXT, atomic_sub)
ret
/*******************************************************************************
/**
*
* atomic_inc - atomic increment primitive
*
@ -210,7 +210,7 @@ SECTION_FUNC(TEXT, atomic_inc)
ret
/*******************************************************************************
/**
*
* atomic_dec - atomic decrement primitive
*
@ -240,7 +240,7 @@ SECTION_FUNC(TEXT, atomic_dec)
ret
/*******************************************************************************
/**
*
* atomic_get - atomic get primitive
*
@ -264,7 +264,7 @@ SECTION_FUNC(TEXT, atomic_get)
ret
/*******************************************************************************
/**
*
* atomic_set - atomic get-and-set primitive
*
@ -304,7 +304,7 @@ SECTION_FUNC(TEXT, atomic_set)
ret
/*******************************************************************************
/**
*
* atomic_clear - atomic clear primitive
*
@ -341,7 +341,7 @@ SECTION_FUNC(TEXT, atomic_clear)
ret
/*******************************************************************************
/**
*
* atomic_or - atomic bitwise inclusive OR primitive
*
@ -379,7 +379,7 @@ BRANCH_LABEL(atomic_or_retry)
ret
/*******************************************************************************
/**
*
* atomic_xor - atomic bitwise exclusive OR (XOR) primitive
*
@ -417,7 +417,7 @@ BRANCH_LABEL(atomic_xor_retry)
ret
/*******************************************************************************
/**
*
* atomic_and - atomic bitwise AND primitive
*
@ -455,7 +455,7 @@ BRANCH_LABEL(atomic_and_retry)
ret
/*******************************************************************************
/**
*
* atomic_nand - atomic bitwise NAND primitive
*

24
arch/x86/core/atomic_nolock.c
View file

@ -50,7 +50,7 @@ as there is no requirement for this capability.
#include <nanokernel.h>
#include <arch/cpu.h>
/*******************************************************************************
/**
*
* atomic_cas - atomic compare-and-set primitive
*
@ -88,7 +88,7 @@ int atomic_cas(
return 1;
}
/*******************************************************************************
/**
*
* atomic_add - atomic addition primitive
*
@ -114,7 +114,7 @@ atomic_val_t atomic_add(
return ovalue;
}
/*******************************************************************************
/**
*
* atomic_sub - atomic subtraction primitive
*
@ -140,7 +140,7 @@ atomic_val_t atomic_sub(
return ovalue;
}
/*******************************************************************************
/**
*
* atomic_inc - atomic increment primitive
*
@ -164,7 +164,7 @@ atomic_val_t atomic_inc(
return ovalue;
}
/*******************************************************************************
/**
*
* atomic_dec - atomic decrement primitive
*
@ -188,7 +188,7 @@ atomic_val_t atomic_dec(
return ovalue;
}
/*******************************************************************************
/**
*
* atomic_get - atomic get primitive
*
@ -205,7 +205,7 @@ atomic_val_t atomic_get(const atomic_t *target /* memory location to read from *
return *target;
}
/*******************************************************************************
/**
*
* atomic_set - atomic get-and-set primitive
*
@ -230,7 +230,7 @@ atomic_val_t atomic_set(
return ovalue;
}
/*******************************************************************************
/**
*
* atomic_clear - atomic clear primitive
*
@ -255,7 +255,7 @@ atomic_val_t atomic_clear(
return ovalue;
}
/*******************************************************************************
/**
*
* atomic_or - atomic bitwise inclusive OR primitive
*
@ -281,7 +281,7 @@ atomic_val_t atomic_or(
return ovalue;
}
/*******************************************************************************
/**
*
* atomic_xor - atomic bitwise exclusive OR (XOR) primitive
*
@ -307,7 +307,7 @@ atomic_val_t atomic_xor(
return ovalue;
}
/*******************************************************************************
/**
*
* atomic_and - atomic bitwise AND primitive
*
@ -333,7 +333,7 @@ atomic_val_t atomic_and(
return ovalue;
}
/*******************************************************************************
/**
*
* atomic_nand - atomic bitwise NAND primitive
*

6
arch/x86/core/context.c
View file

@ -57,7 +57,7 @@ tNANO _nanokernel = {0};
void _ContextEntryWrapper(_ContextEntry, _ContextArg, _ContextArg, _ContextArg);
#endif /* CONFIG_GDB_INFO */
/*******************************************************************************
/**
*
* _NewContextInternal - initialize a new execution context
*
@ -206,7 +206,7 @@ static void _NewContextInternal(
}
#ifdef CONFIG_GDB_INFO
/*******************************************************************************
/**
*
* _ContextEntryWrapper - adjust stack before invoking _context_entry
*
@ -273,7 +273,7 @@ __asm__("\t.globl _context_entry\n"
"\tjmp _context_entry\n");
#endif /* CONFIG_GDB_INFO */
/*******************************************************************************
/**
*
* _NewContext - create a new kernel execution context
*

4
arch/x86/core/cpuhalt.S
View file

@ -64,7 +64,7 @@ by nano_cpu_atomic_idle().
#ifndef CONFIG_NO_ISRS
/*******************************************************************************
/**
*
* nano_cpu_idle - power save idle routine for IA-32
*
@ -94,7 +94,7 @@ SECTION_FUNC(TEXT, nano_cpu_idle)
ret /* return after processing ISR */
/*******************************************************************************
/**
*
* nano_cpu_atomic_idle - atomically re-enable interrupts and enter low power mode
*

4
arch/x86/core/excconnect.c
View file

@ -86,7 +86,7 @@ void _NanoCpuExcConnectAtDpl(unsigned int vector,
NANO_EXC_STUB pExcStubMem,
unsigned int dpl);
/*******************************************************************************
/**
*
* nanoCpuExcConnect - connect a C routine to an exception
*
@ -126,7 +126,7 @@ void nanoCpuExcConnect(unsigned int vector, /* interrupt vector: 0 to 255 on
_NanoCpuExcConnectAtDpl(vector, routine, pExcStubMem, 0);
}
/*******************************************************************************
/**
*
* _NanoCpuExcConnectAtDpl - connect a C routine to an exception
*

4
arch/x86/core/excstub.S
View file

@ -57,7 +57,7 @@ and exiting a C exception handler.
/*******************************************************************************
/**
*
* _ExcEnt - inform the kernel of an exception
*
@ -215,7 +215,7 @@ BRANCH_LABEL(allDone)
jmp *%eax /* "return" back to stub */
/*******************************************************************************
/**
*
* _ExcExit - inform the kernel of an exception exit
*

2
arch/x86/core/fatal.c
View file

@ -65,7 +65,7 @@ const NANO_ESF _default_esf = {
0xdeaddead /* SS */
};
/*******************************************************************************
/**
*
* _NanoFatalErrorHandler - nanokernel fatal error handler
*

4
arch/x86/core/ffs.S
View file

@ -51,7 +51,7 @@ are defined in arch.h.
GTEXT(find_last_set)
GTEXT(find_first_set)
/*******************************************************************************
/**
*
* find_first_set - find first set bit searching from the LSB
*
@ -94,7 +94,7 @@ BRANCH_LABEL(ffsLsb_argNotZero) /* this label serves find_first_set() & find_las
#endif /* !CONFIG_CMOV_UNSUPPORTED */
/*******************************************************************************
/**
*
* find_last_set - find first set bit searching from the MSB
*

18
arch/x86/core/float.c
View file

@ -112,7 +112,7 @@ enable FP resource sharing on its behalf.
extern uint32_t _sse_mxcsr_default_value; /* SSE control/status register default value */
#endif /* CONFIG_SSE */
/*******************************************************************************
/**
*
* _FpCtxSave - save non-integer context information
*
@ -128,7 +128,7 @@ static void _FpCtxSave(tCCS *ccs)
_do_fp_ctx_save(ccs->flags & USE_SSE, &ccs->preempFloatReg);
}
/*******************************************************************************
/**
*
* _FpCtxInit - initialize non-integer context information
*
@ -142,7 +142,7 @@ static inline void _FpCtxInit(tCCS *ccs)
_do_fp_ctx_init(ccs->flags & USE_SSE);
}
/*******************************************************************************
/**
*
* _FpEnable - enable preservation of non-integer context information
*
@ -287,7 +287,7 @@ void _FpEnable(tCCS *ccs,
irq_unlock_inline(imask);
}
/*******************************************************************************
/**
*
* fiber_float_enable - enable preservation of non-integer context information
*
@ -301,7 +301,7 @@ void _FpEnable(tCCS *ccs,
FUNC_ALIAS(_FpEnable, fiber_float_enable, void);
/*******************************************************************************
/**
*
* task_float_enable - enable preservation of non-integer context information
*
@ -315,7 +315,7 @@ FUNC_ALIAS(_FpEnable, fiber_float_enable, void);
FUNC_ALIAS(_FpEnable, task_float_enable, void);
/*******************************************************************************
/**
*
* _FpDisable - disable preservation of non-integer context information
*
@ -376,7 +376,7 @@ void _FpDisable(tCCS *ccs)
irq_unlock_inline(imask);
}
/*******************************************************************************
/**
*
* fiber_float_disable - disable preservation of non-integer context
*information
@ -394,7 +394,7 @@ void _FpDisable(tCCS *ccs)
FUNC_ALIAS(_FpDisable, fiber_float_disable, void);
/*******************************************************************************
/**
*
* task_float_disable - disable preservation of non-integer context information
*
@ -413,7 +413,7 @@ FUNC_ALIAS(_FpDisable, task_float_disable, void);
#ifdef CONFIG_AUTOMATIC_FP_ENABLING
/*******************************************************************************
/**
*
* _FpNotAvailableExcHandler - handler for "device not available" exception
*

2
arch/x86/core/intboiexit.S
View file

@ -64,7 +64,7 @@ _IntBoiExit() is present.
GTEXT(_IntExit)
/*******************************************************************************
/**
*
* _IntBoiExit - exit interrupt handler stub without invoking ISR
*

12
arch/x86/core/intconnect.c
View file

@ -159,7 +159,7 @@ static NANO_INT_STUB dynamic_stubs[ALL_DYNAMIC_STUBS] = {
[0 ... (ALL_DYNAMIC_STUBS - 1)] = { _STUB_AVAIL, }
};
/*******************************************************************************
/**
* _int_stub_alloc - allocate dynamic interrupt stub
*
* RETURNS: index of the first available element of the STUB array or -1
@ -179,7 +179,7 @@ static int _int_stub_alloc(void)
}
#endif /* ALL_DYNAMIC_STUBS > 0 */
/*******************************************************************************
/**
*
* _IntVecSet - connect a routine to an interrupt vector
*
@ -233,7 +233,7 @@ void _IntVecSet(
* generates an error
*/
#if ALL_DYNAMIC_STUBS > 0
/*******************************************************************************
/**
*
* irq_connect - connect a C routine to a hardware interrupt
*
@ -478,7 +478,7 @@ int irq_connect(
}
#endif /* ALL_DYNAMIC_STUBS > 0 */
/*******************************************************************************
/**
*
* _IntVecAlloc - allocate a free interrupt vector given <priority>
*
@ -601,7 +601,7 @@ int _IntVecAlloc(unsigned int priority)
return vector;
}
/*******************************************************************************
/**
*
* _IntVecMarkAllocated - mark interrupt vector as allocated
*
@ -625,7 +625,7 @@ void _IntVecMarkAllocated(unsigned int vector)
irq_unlock(imask);
}
/*******************************************************************************
/**
*
* _IntVecMarkFree - mark interrupt vector as free
*

2
arch/x86/core/inthndlset.c
View file

@ -57,7 +57,7 @@ extern unsigned char _idt_base_address[];
#define FIRST_OPT_OPCODE_OFF 5
/*******************************************************************************
/**
*
* irq_handler_set - set the handler in an already connected stub
*

10
arch/x86/core/intstub.S
View file

@ -74,7 +74,7 @@ entering and exiting a C interrupt handler.
GTEXT(_int_latency_start)
GTEXT(_int_latency_stop)
#endif
/*******************************************************************************
/**
*
* _IntEnt - inform the kernel of an interrupt
*
@ -240,7 +240,7 @@ BRANCH_LABEL(_HandleIdle)
#endif /* CONFIG_ADVANCED_POWER_MANAGEMENT */
/*******************************************************************************
/**
*
* _IntExit - inform the kernel of an interrupt exit
*
@ -388,7 +388,7 @@ BRANCH_LABEL(nestedInterrupt)
iret
/*******************************************************************************
/**
*
* _SpuriousIntHandler -
* _SpuriousIntNoErrCodeHandler - spurious interrupt handler stubs
@ -462,7 +462,7 @@ BRANCH_LABEL(callFatalHandler)
jmp callFatalHandler
/*******************************************************************************
/**
*
* irq_lock - disable interrupts on the local CPU
*
@ -501,7 +501,7 @@ SECTION_FUNC(TEXT, irq_lock)
ret
/*******************************************************************************
/**
*
* irq_unlock - enable interrupts on the local CPU
*

4
arch/x86/core/msr.S
View file

@ -45,7 +45,7 @@ utilities.
GTEXT(_MsrWrite)
GTEXT(_MsrRead)
/*******************************************************************************
/**
*
* _MsrWrite - write to a model specific register (MSR)
*
@ -76,7 +76,7 @@ SECTION_FUNC(TEXT, _MsrWrite)
ret
/*******************************************************************************
/**
*
* _MsrRead - read from a model specific register (MSR)
*

2
arch/x86/core/swap.S
View file

@ -54,7 +54,7 @@ save frame on the stack.
/* externs */
/*******************************************************************************
/**
*
* _Swap - initiate a cooperative context switch
*

4
arch/x86/core/unaligned.S
View file

@ -49,7 +49,7 @@ performed byte-by-byte.
GTEXT(_Unaligned32Write)
GTEXT(_Unaligned32Read)
/*******************************************************************************
/**
*
* _Unaligned32Write - perform an unaligned 32-bit write operation
*
@ -86,7 +86,7 @@ SECTION_FUNC(TEXT, _Unaligned32Write)
ret
/*******************************************************************************
/**
*
* _Unaligned32Read - perform an unaligned 32-bit read operation
*

6
arch/x86/generic_pc/system.c
View file

@ -86,7 +86,7 @@ static inline void ioapicInit(void)
#ifdef DO_CONSOLE_INIT
/*******************************************************************************
/**
*
* uart_generic_info_init - initialize initialization information for one UART
*
@ -106,7 +106,7 @@ void uart_generic_info_init(struct uart_init_info *p_info)
#if defined(DO_CONSOLE_INIT)
/*******************************************************************************
/**
*
* consoleInit - initialize target-only console
*
@ -149,7 +149,7 @@ static void bluetooth_init(void)
} while ((0))
#endif /* CONFIG_BLUETOOTH */
/*******************************************************************************
/**
*
* _InitHardware - perform basic hardware initialization
*

4
arch/x86/include/asmPrv.h
View file

@ -63,7 +63,7 @@ extern "C" {
call h; \
jmp _ExcExit;
/*******************************************************************************
/**
*
* NANO_CPU_EXC_CONNECT - to generate and register an exception stub
*
@ -79,7 +79,7 @@ extern "C" {
NANO_CPU_INT_REGISTER_ASM(h, v, d) GTEXT(MK_STUB_NAME(h)); \
SECTION_FUNC(TEXT, MK_STUB_NAME(h)) NANO_CPU_EXC_CONNECT_CODE(h)
/*******************************************************************************
/**
*
* NANO_CPU_EXC_CONNECT_NO_ERR - to generate and register an exception stub
*

8
arch/x86/include/asm_inline_gcc.h
View file

@ -45,7 +45,7 @@ NANO_CPU_EXC_CONNECT_NO_ERR(handler,vector,0)
#else /* !_ASMLANGUAGE */
/*******************************************************************************
/**
*
* EflagsGet - return the current value of the EFLAGS register
*
@ -70,7 +70,7 @@ static inline unsigned int EflagsGet(void)
#ifdef CONFIG_FP_SHARING
/*******************************************************************************
/**
*
* _FpAccessDisable - disallow use of floating point capabilities
*
@ -94,7 +94,7 @@ static inline void _FpAccessDisable(void)
}
/*******************************************************************************
/**
*
* _do_fp_ctx_save - save non-integer context information
*
@ -126,7 +126,7 @@ static inline void _do_fp_ctx_save(int flags, void *preemp_float_reg)
}
}
/*******************************************************************************
/**
*
* _do_fp_ctx_init - initialize non-integer context information
*

4
arch/x86/include/nano_private.h
View file

@ -760,7 +760,7 @@ extern tNANO _nanokernel;
/* inline function definitions */
/*******************************************************************************
/**
*
* nanoArchInit - performs architecture-specific initialization
*
@ -809,7 +809,7 @@ static inline void nanoArchInit(void)
}
/*******************************************************************************
/**
*
* fiberRtnValueSet - set the return value for the specified fiber (inline)
*

16
arch/x86/quark/board.h
View file

@ -152,7 +152,7 @@ the 'Quark' BSP.
sys_out8(data, (unsigned int)address)
#define PLB_BYTE_REG_READ(address) sys_in8((unsigned int)address)
/*******************************************************************************
/**
*
* outByte - output byte to memory location
*
@ -166,7 +166,7 @@ static inline void outByte(uint8_t data, uint32_t addr)
*(volatile uint8_t *)addr = data;
}
/*******************************************************************************
/**
*
* inByte - obtain byte value from memory location
*
@ -194,7 +194,7 @@ static inline uint8_t inByte(uint32_t addr)
sys_out16(data, (unsigned int)address)
#define PLB_WORD_REG_READ(address) sys_in16((unsigned int)address)
/*******************************************************************************
/**
*
* outWord - output word to memory location
*
@ -208,7 +208,7 @@ static inline void outWord(uint16_t data, uint32_t addr)
*(volatile uint16_t *)addr = data;
}
/*******************************************************************************
/**
*
* inWord - obtain word value from memory location
*
@ -236,7 +236,7 @@ static inline uint16_t inWord(uint32_t addr)
sys_out32(data, (unsigned int)address)
#define PLB_LONG_REG_READ(address) sys_in32((unsigned int)address)
/*******************************************************************************
/**
*
* outLong - output long word to memory location
*
@ -250,7 +250,7 @@ static inline void outLong(uint32_t data, uint32_t addr)
*(volatile uint32_t *)addr = data;
}
/*******************************************************************************
/**
*
* inLong - obtain long word value from memory location
*
@ -268,7 +268,7 @@ static inline uint32_t inLong(uint32_t addr)
}
#endif /* !_ASMLANGUAGE */
/*******************************************************************************
/**
*
* pci_pin2irq - convert PCI interrupt PIN to IRQ
*
@ -289,7 +289,7 @@ static inline int pci_pin2irq(int pin)
return N_PIC_IRQS + pin - 1;
}
/*******************************************************************************
/**
*
* pci_irq2pin - convert IRQ to PCI interrupt pin
*

6
arch/x86/quark/system.c
View file

@ -55,7 +55,7 @@ Handlers for the secondary serial port have not been added.
#if defined(DO_CONSOLE_INIT)
/*******************************************************************************
/**
*
* uart_generic_info_init - initialize initialization information for one UART
*
@ -74,7 +74,7 @@ void uart_generic_info_init(struct uart_init_info *p_info)
#if defined(DO_CONSOLE_INIT)
/*******************************************************************************
/**
*
* consoleInit - initialize target-only console
*
@ -101,7 +101,7 @@ static void consoleInit(void)
} while ((0))
#endif /* DO_CONSOLE_INIT */
/*******************************************************************************
/**
*
* _InitHardware - perform basic hardware initialization
*

2
arch/x86/sys_fatal_error_handler.c
View file

@ -47,7 +47,7 @@ supported BSPs.
#define PRINTK(...)
#endif /* CONFIG_PRINTK */
/*******************************************************************************
/**
*
* _SysFatalErrorHandler - fatal error handler
*

2
arch/x86/task/strtask.c
View file

@ -51,7 +51,7 @@ Intel-specific parts of start_task(). Only FP functionality currently.
#define SSE_GROUP 0x10
/*******************************************************************************
/**
*
* _StartTaskArch - Intel-specifc parts of task initialization
*

6
drivers/console/uart_console.c
View file

@ -56,7 +56,7 @@
#endif
#if 0 /* NOTUSED */
/******************************************************************************
/**
*
* consoleIn - get a character from UART
*
@ -74,7 +74,7 @@ static int consoleIn(void)
#endif
#if defined(CONFIG_PRINTK) || defined(CONFIG_STDOUT_CONSOLE)
/******************************************************************************
/**
*
* consoleOut - output one character to UART
*
@ -209,7 +209,7 @@ void uart_register_input(struct nano_fifo *avail, struct nano_fifo *lines)
} while ((0))
#endif
/******************************************************************************
/**
*
* uart_console_init - initialize one UART as the console/debug port
*

12
drivers/interrupt_controller/i8259.c
View file

@ -116,7 +116,7 @@ FUNC_ALIAS(_i8259_irq_enable, irq_enable, void);
FUNC_ALIAS(_i8259_irq_disable, irq_disable, void);
#endif /* CONFIG_SHUTOFF_PIC */
/*******************************************************************************
/**
*
* _i8259_init - initialize the Intel 8259A PIC device driver
*
@ -185,7 +185,7 @@ void _i8259_init(void)
}
#ifndef CONFIG_SHUTOFF_PIC
/*******************************************************************************
/**
*
* _i8259_eoi_master - send EOI(end of interrupt) signal to the master PIC.
*
@ -207,7 +207,7 @@ void _i8259_eoi_master(unsigned int irq /* IRQ number to
PLB_BYTE_REG_WRITE(I8259_EOI, PIC_IACK(PIC_MASTER_BASE_ADRS));
}
/*******************************************************************************
/**
*
* _i8259_eoi_slave - send EOI(end of interrupt) signal to the slave PIC.
*
@ -239,7 +239,7 @@ void _i8259_eoi_slave(unsigned int irq /* IRQ number to
__asm__ volatile("popfl;\n\t");
}
/*******************************************************************************
/**
*
* __I8259IntEnable - enable/disable a specified PIC interrupt input line
*
@ -290,7 +290,7 @@ static void __I8259IntEnable(
}
/*******************************************************************************
/**
*
* _i8259_irq_disable - disable a specified PIC interrupt input line
*
@ -307,7 +307,7 @@ void _i8259_irq_disable(unsigned int irq /* IRQ number to disable */
return __I8259IntEnable(irq, 0);
}
/*******************************************************************************
/**
*
* _i8259_irq_enable - enable a specified PIC interrupt input line
*

4
drivers/interrupt_controller/i8259_boi.S
View file

@ -59,7 +59,7 @@ a real IRQ has been inserted.
GDATA(_i8259_spurious_interrupt_count)
/*******************************************************************************
/**
*
* _i8259_boi_master - detect whether it is spurious interrupt or not
*
@ -93,7 +93,7 @@ SECTION_FUNC(TEXT, _i8259_boi_master)
ret
/*******************************************************************************
/**
*
* _i8259_boi_slave - detect whether it is spurious interrupt or not
*

30
drivers/interrupt_controller/ioapic_intr.c
View file

@ -209,7 +209,7 @@ static void _IoApicRedUpdateLo(unsigned int irq, uint32_t value,
* IRQ virtualization imposed by the BSP.
*/
/*******************************************************************************
/**
*
* _ioapic_init - initialize the IO APIC or xAPIC
*
@ -261,7 +261,7 @@ void _ioapic_init(void)
}
}
/*******************************************************************************
/**
*
* _ioapic_eoi - send EOI (End Of Interrupt) signal to IO APIC
*
@ -277,7 +277,7 @@ void _ioapic_eoi(unsigned int irq /* INT number to send EOI */
*(volatile unsigned int *)(LOAPIC_BASE_ADRS + LOAPIC_EOI) = 0;
}
/*******************************************************************************
/**
*
* _ioapic_eoi_get - get EOI (End Of Interrupt) information
*
@ -317,7 +317,7 @@ void *_ioapic_eoi_get(unsigned int irq, /* INTIN number of interest */
return _ioapic_eoi;
}
/*******************************************************************************
/**
*
* _ioapic_irq_enable - enable a specified APIC interrupt input line
*
@ -332,7 +332,7 @@ void _ioapic_irq_enable(unsigned int irq /* INTIN number to enable */
_IoApicRedUpdateLo(irq, 0, IOAPIC_INT_MASK);
}
/*******************************************************************************
/**
*
* _ioapic_irq_disable - disable a specified APIC interrupt input line
*
@ -347,7 +347,7 @@ void _ioapic_irq_disable(unsigned int irq /* INTIN number to disable */
_IoApicRedUpdateLo(irq, IOAPIC_INT_MASK, IOAPIC_INT_MASK);
}
/*******************************************************************************
/**
*
* _ioapic_irq_set - programs the interrupt redirection table
*
@ -368,7 +368,7 @@ void _ioapic_irq_set(unsigned int irq, /* virtualized IRQ */
ioApicRedSetLo(irq, rteValue);
}
/*******************************************************************************
/**
*
* _ioapic_int_vec_set - program interrupt vector for specified irq
*
@ -386,7 +386,7 @@ void _ioapic_int_vec_set(unsigned int irq, /* INT number */
#ifndef XIOAPIC_DIRECT_ADDRESSING
/*******************************************************************************
/**
*
* __IoApicGet - read a 32 bit IO APIC register
*
@ -414,7 +414,7 @@ static uint32_t __IoApicGet(
return value;
}
/*******************************************************************************
/**
*
* __IoApicSet - write a 32 bit IO APIC register
*
@ -442,7 +442,7 @@ static void __IoApicSet(
#endif
/*******************************************************************************
/**
*
* ioApicRedGetLo - get low 32 bits of Redirection Table entry
*
@ -468,7 +468,7 @@ static uint32_t ioApicRedGetLo(unsigned int irq /* INTIN number */
#endif
}
/*******************************************************************************
/**
*
* ioApicRedSetLo - set low 32 bits of Redirection Table entry
*
@ -495,7 +495,7 @@ static void ioApicRedSetLo(unsigned int irq, /* INTIN number */
#endif
}
/*******************************************************************************
/**
*
* ioApicRedSetHi - set high 32 bits of Redirection Table entry
*
@ -522,7 +522,7 @@ static void ioApicRedSetHi(unsigned int irq, /* INTIN number */
#endif
}
/*******************************************************************************
/**
*
* _IoApicRedUpdateLo - modify low 32 bits of Redirection Table entry
*
@ -548,7 +548,7 @@ static void _IoApicRedUpdateLo(
* macro if the I/O APIC supports the MSI redirect capability.
*/
/*******************************************************************************
/**
*
* _IoApicRteConfigSet - write to the RTE config register for specified IRQ
*
@ -576,7 +576,7 @@ static void _IoApicRteConfigSet(unsigned int irq, /* INTIN number */
*((volatile uint32_t *)(IOAPIC_BASE_ADRS + offset)) = value;
}
/*******************************************************************************
/**
*
* _IoApicRedirRegSet - write to the specified MSI redirection register
*

14
drivers/interrupt_controller/loapic_intr.c
View file

@ -198,7 +198,7 @@ INCLUDE FILES: loapic.h
#define IMCR_IOAPIC_OFF 0x00 /* IMCR IOAPIC route disable */
/*******************************************************************************
/**
*
* _loapic_init - initialize the Local APIC or xAPIC
*
@ -260,7 +260,7 @@ void _loapic_init(void)
*(volatile int *)(LOAPIC_BASE_ADRS + LOAPIC_EOI) = 0;
}
/*******************************************************************************
/**
*
* _loapic_enable - enable the Local xAPIC
*
@ -278,7 +278,7 @@ void _loapic_enable(void)
irq_unlock(oldLevel); /* UNLOCK INTERRUPTS */
}
/*******************************************************************************
/**
*
* _loapic_disable - disable the Local xAPIC
*
@ -296,7 +296,7 @@ void _loapic_disable(void)
irq_unlock(oldLevel); /* UNLOCK INTERRUPTS */
}
/*******************************************************************************
/**
*
* _loapic_eoi - send EOI (End Of Interrupt) signal to Local APIC
*
@ -311,7 +311,7 @@ void _loapic_eoi(unsigned int irq)
*(volatile int *)(LOAPIC_BASE_ADRS + LOAPIC_EOI) = 0;
}
/*******************************************************************************
/**
*
* _loapic_int_vec_set - set the vector field in the specified RTE
*
@ -354,7 +354,7 @@ void _loapic_int_vec_set(unsigned int irq, /* IRQ number of the
irq_unlock(oldLevel);
}
/*******************************************************************************
/**
*
* _loapic_irq_enable - enable an individual LOAPIC interrupt (IRQ)
*
@ -384,7 +384,7 @@ void _loapic_irq_enable(unsigned int irq /* IRQ number of
irq_unlock(oldLevel);
}
/*******************************************************************************
/**
*
* _loapic_irq_disable - disable an individual LOAPIC interrupt (IRQ)
*

8
drivers/interrupt_controller/system_apic.c
View file

@ -43,7 +43,7 @@ for the atom_n28xx variant of generic_pc BSP.
#include <drivers/ioapic.h>
#include <drivers/loapic.h>
/*******************************************************************************
/**
*
* _SysIntVecAlloc - allocate interrupt vector
*
@ -170,7 +170,7 @@ int _SysIntVecAlloc(
return vector;
}
/*******************************************************************************
/**
*
* _SysIntVecProgram - program interrupt controller
*
@ -205,7 +205,7 @@ void _SysIntVecProgram(unsigned int vector, /* vector number */
}
/*******************************************************************************
/**
*
* irq_enable - enable an individual interrupt (IRQ)
*
@ -231,7 +231,7 @@ void irq_enable(unsigned int irq)
}
}
/*******************************************************************************
/**
*
* irq_disable - disable an individual interrupt (IRQ)
*

4
drivers/interrupt_controller/system_pic.c
View file

@ -45,7 +45,7 @@ for the pentium4 and minuteia variants of the generic_pc BSP.
IRQ_CONNECT_STATIC(pic_master, PIC_MASTER_STRAY_INT_LVL, 0, _i8259_boi_master, 0);
IRQ_CONNECT_STATIC(pic_slave, PIC_SLAVE_STRAY_INT_LVL, 0, _i8259_boi_slave, 0);
/*******************************************************************************
/**
*
* _SysIntVecAlloc - allocate interrupt vector
*
@ -147,7 +147,7 @@ int _SysIntVecAlloc(
return vector;
}
/*******************************************************************************
/**
*
* _SysIntVecProgram - program interrupt controller
*

10
drivers/pci/pci.c
View file

@ -167,7 +167,7 @@ struct lookup_data {
static struct bus_dev class_bd[PCI_CLASS_MAX] = {};
static struct lookup_data __noinit lookup;
/******************************************************************************
/**
*
* pci_get_bar_config - return the configuration for the specified BAR
*
@ -212,7 +212,7 @@ static inline int pci_bar_config_get(union pci_addr_reg pci_ctrl_addr,
return -1;
}
/******************************************************************************
/**
*
* pci_bar_params_get - retrieve the I/O address and IRQ of the specified BAR
*
@ -263,7 +263,7 @@ static inline int pci_bar_params_get(union pci_addr_reg pci_ctrl_addr,
return 0;
}
/******************************************************************************
/**
*
* pci_dev_scan - scan the specified PCI device for all sub functions
*
@ -374,7 +374,7 @@ void pci_bus_scan_init(void)
lookup.bar = 0;
}
/******************************************************************************
/**
*
* pci_bus_scan - scans PCI bus for devices
*
@ -428,7 +428,7 @@ int pci_bus_scan(struct pci_dev_info *dev_info)
}
#ifdef CONFIG_PCI_DEBUG
/******************************************************************************
/**
*
* pci_show - Show PCI device
*

14
drivers/pci/pci_config.c
View file

@ -52,7 +52,7 @@ This module implements the PCI config space access functions
} while (0)
#endif
/*******************************************************************************
/**
*
* pci_config_out_long - write a 32bit data to pci reg in offset
*
@ -82,7 +82,7 @@ void pci_config_out_long(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
pci_write(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(uint32_t), data);
}
/*******************************************************************************
/**
*
* pci_config_out_word - write a 16bit data to pci reg in offset
*
@ -112,7 +112,7 @@ void pci_config_out_word(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
pci_write(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(uint16_t), data);
}
/*******************************************************************************
/**
*
* pci_config_out_byte - write a 8bit data to pci reg in offset
*
@ -142,7 +142,7 @@ void pci_config_out_byte(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
pci_write(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(uint8_t), data);
}
/*******************************************************************************
/**
*
* pci_config_in_long - read a 32bit data from pci reg in offset
*
@ -173,7 +173,7 @@ void pci_config_in_long(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
pci_read(DEFAULT_PCI_CONTROLLER, pci_addr, sizeof(uint32_t), data);
}
/*******************************************************************************
/**
*
* pci_config_in_word - read in a 16bit data from a pci reg in offset
*
@ -210,7 +210,7 @@ void pci_config_in_word(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
*data = (uint16_t)pci_data;
}
/*******************************************************************************
/**
*
* pci_config_in_byte - read in a 8bit data from a pci reg in offset
*
@ -247,7 +247,7 @@ void pci_config_in_byte(uint32_t bus_no, uint32_t device_no, uint32_t func_no,
*data = (uint8_t)pci_data;
}
/*******************************************************************************
/**
*
* pci_config_ext_cap_ptr_find - find extended capability in ECP linked list
*

16
drivers/pci/pci_interface.c
View file

@ -52,7 +52,7 @@ This module implements the PCI H/W access functions.
#error "PCI_CTRL_DATA_REG cannot be zero"
#endif
/******************************************************************************
/**
*
* pci_ctrl_read - read a PCI controller register
*
@ -86,7 +86,7 @@ static void pci_ctrl_read(uint32_t reg, /* PCI register to read */
}
}
/******************************************************************************
/**
*
* pci_ctrl_write - write a PCI controller register
*
@ -121,7 +121,7 @@ static void pci_ctrl_write(uint32_t reg, /* PCI register to write */
}
}
/******************************************************************************
/**
*
* pci_ctrl_data_read - read the PCI controller data register
*
@ -147,7 +147,7 @@ static int pci_ctrl_data_read(uint32_t controller, /* controller number */
return 0;
}
/******************************************************************************
/**
*
* pci_ctrl_data_write - write the PCI controller data register
*
@ -174,7 +174,7 @@ static int pci_ctrl_data_write(uint32_t controller, /* controller number */
return 0;
}
/******************************************************************************
/**
*
* pci_ctrl_addr_write - write the PCI controller address register
*
@ -200,7 +200,7 @@ static int pci_ctrl_addr_write(uint32_t controller, /* controller number */
return 0;
}
/*******************************************************************************
/**
*
* pci_read - read a PCI register from a device
*
@ -290,7 +290,7 @@ void pci_read(uint32_t controller, /* PCI controller to use */
pci_ctrl_data_read(controller, access_offset, data, access_size);
}
/*******************************************************************************
/**
*
* pci_write - write a to a PCI register
*
@ -379,7 +379,7 @@ void pci_write(uint32_t controller, /* controller to use */
pci_ctrl_data_write(controller, access_offset, data, access_size);
}
/*******************************************************************************
/**
*
* pci_header_get - get the PCI header for a device
*

4
drivers/random/rand32-timer.c
View file

@ -53,7 +53,7 @@ static atomic_val_t _rand32_counter = 0;
#define _RAND32_INC 1000000013
/*******************************************************************************
/**
*
* sys_rand32_init - initialize the random number generator
*
@ -69,7 +69,7 @@ void sys_rand32_init(void)
{
}
/*******************************************************************************
/**
*
* sys_rand32_get - get a 32 bit random number
*

4
drivers/random/rand32-timestamp.c
View file

@ -42,7 +42,7 @@ number generator.
#include <arch/cpu.h>
#include <drivers/rand32.h>
/*******************************************************************************
/**
*
* sys_rand32_init - initialize the random number generator
*
@ -56,7 +56,7 @@ void sys_rand32_init(void)
{
}
/*******************************************************************************
/**
*
* sys_rand32_get - get a 32 bit random number
*

32
drivers/serial/k20UartDrv.c
View file

@ -59,7 +59,7 @@ typedef struct {
UART_PORTS_CONFIGURE(_k20Uart_t, uart);
/*******************************************************************************
/**
*
* uart_init - initialize UART channel
*
@ -107,7 +107,7 @@ void uart_init(int port, /* UART channel to initialize */
irq_unlock(oldLevel);
}
/*******************************************************************************
/**
*
* uart_poll_in - poll the device for input.
*
@ -129,7 +129,7 @@ int uart_poll_in(int port, /* UART channel to select for input */
return 0;
}
/*******************************************************************************
/**
*
* uart_poll_out - output a character in polled mode.
*
@ -159,7 +159,7 @@ unsigned char uart_poll_out(
#if CONFIG_UART_INTERRUPT_DRIVEN
/*******************************************************************************
/**
*
* uart_fifo_fill - fill FIFO with data
@ -181,7 +181,7 @@ int uart_fifo_fill(int port, /* UART on port to send */
return numTx;
}
/*******************************************************************************
/**
*
* uart_fifo_read - read data from FIFO
*
@ -203,7 +203,7 @@ int uart_fifo_read(int port, /* UART to receive from */
return numRx;
}
/*******************************************************************************
/**
*
* uart_irq_tx_enable - enable TX interrupt
*
@ -219,7 +219,7 @@ void uart_irq_tx_enable(int port /* UART to enable Tx
uart_p->c2.field.txInt_DmaTx_en = 1;
}
/*******************************************************************************
/**
*
* uart_irq_tx_disable - disable TX interrupt in IER
*
@ -235,7 +235,7 @@ void uart_irq_tx_disable(
uart_p->c2.field.txInt_DmaTx_en = 0;
}
/*******************************************************************************
/**
*
* uart_irq_tx_ready - check if Tx IRQ has been raised
*
@ -250,7 +250,7 @@ int uart_irq_tx_ready(int port /* UART to check */
return uart_p->s1.field.txDataEmpty;
}
/*******************************************************************************
/**
*
* uart_irq_rx_enable - enable RX interrupt in IER
*
@ -266,7 +266,7 @@ void uart_irq_rx_enable(int port /* UART to enable Rx
uart_p->c2.field.rxFullInt_dmaTx_en = 1;
}
/*******************************************************************************
/**
*
* uart_irq_rx_disable - disable RX interrupt in IER
*
@ -282,7 +282,7 @@ void uart_irq_rx_disable(
uart_p->c2.field.rxFullInt_dmaTx_en = 0;
}
/*******************************************************************************
/**
*
* uart_irq_rx_ready - check if Rx IRQ has been raised
*
@ -297,7 +297,7 @@ int uart_irq_rx_ready(int port /* UART to check */
return uart_p->s1.field.rxDataFull;
}
/*******************************************************************************
/**
*
* uart_irq_err_enable - enable error interrupt
*
@ -316,7 +316,7 @@ void uart_irq_err_enable(int port)
uart_p->c3 = c3;
}
/*******************************************************************************
/**
*
* uart_irq_err_disable - disable error interrupt
*
@ -336,7 +336,7 @@ void uart_irq_err_disable(int port /* UART to disable Rx interrupt */
uart_p->c3 = c3;
}
/*******************************************************************************
/**
*
* uart_irq_is_pending - check if Tx or Rx IRQ is pending
*
@ -355,7 +355,7 @@ int uart_irq_is_pending(int port /* UART to check */
: 0);
}
/*******************************************************************************
/**
*
* uart_irq_update - update IRQ status
*
@ -367,7 +367,7 @@ int uart_irq_update(int port)
return 1;
}
/*******************************************************************************
/**
*
* uart_irq_get - returns UART interrupt number
*

32
drivers/serial/ns16550.c
View file

@ -257,7 +257,7 @@ UART_PORTS_CONFIGURE(struct ns16550, uart);
#endif /* UART_PORTS_CONFIGURE */
/*******************************************************************************
/**
*
* uart_init - initialize the chip
*
@ -310,7 +310,7 @@ void uart_init(int port, /* UART channel to initialize */
irq_unlock(oldLevel);
}
/*******************************************************************************
/**
*
* uart_poll_in - poll the device for input.
*
@ -330,7 +330,7 @@ int uart_poll_in(int port, /* UART channel to select for input */
return 0;
}
/*******************************************************************************
/**
*
* uart_poll_out - output a character in polled mode.
*
@ -357,7 +357,7 @@ unsigned char uart_poll_out(
}
#if CONFIG_UART_INTERRUPT_DRIVEN
/*******************************************************************************
/**
*
* uart_fifo_fill - fill FIFO with data
*
@ -377,7 +377,7 @@ int uart_fifo_fill(int port, /* UART on port to send */
return i;
}
/*******************************************************************************
/**
*
* uart_fifo_read - read data from FIFO
*
@ -398,7 +398,7 @@ int uart_fifo_read(int port, /* UART to receive from */
return i;
}
/*******************************************************************************
/**
*
* uart_irq_tx_enable - enable TX interrupt in IER
*
@ -412,7 +412,7 @@ void uart_irq_tx_enable(int port /* UART to enable Tx
OUTBYTE(IER(port), INBYTE(IER(port)) | IER_TBE);
}
/*******************************************************************************
/**
*
* uart_irq_tx_disable - disable TX interrupt in IER
*
@ -425,7 +425,7 @@ void uart_irq_tx_disable(int port /* UART to disable Tx interrupt */
OUTBYTE(IER(port), INBYTE(IER(port)) & (~IER_TBE));
}
/*******************************************************************************
/**
*
* uart_irq_tx_ready - check if Tx IRQ has been raised
*
@ -438,7 +438,7 @@ int uart_irq_tx_ready(int port /* UART to check */
return ((IIRC(port) & IIR_ID) == IIR_THRE);
}
/*******************************************************************************
/**
*
* _uart_irq_rx_enable - enable RX interrupt in IER
*
@ -452,7 +452,7 @@ void uart_irq_rx_enable(int port /* UART to enable Rx
OUTBYTE(IER(port), INBYTE(IER(port)) | IER_RXRDY);
}
/*******************************************************************************
/**
*
* uart_irq_rx_disable - disable RX interrupt in IER
*
@ -465,7 +465,7 @@ void uart_irq_rx_disable(int port /* UART to disable Rx interrupt */
OUTBYTE(IER(port), INBYTE(IER(port)) & (~IER_RXRDY));
}
/*******************************************************************************
/**
*
* uart_irq_rx_ready - check if Rx IRQ has been raised
*
@ -478,7 +478,7 @@ int uart_irq_rx_ready(int port /* UART to check */
return ((IIRC(port) & IIR_ID) == IIR_RBRF);
}
/*******************************************************************************
/**
*
* uart_irq_err_enable - enable error interrupt in IER
*
@ -491,7 +491,7 @@ void uart_irq_err_enable(int port /* UART to enable Rx interrupt */
OUTBYTE(IER(port), INBYTE(IER(port)) | IER_LSR);
}
/*******************************************************************************
/**
*
* uart_irq_err_disable - disable error interrupt in IER
*
@ -504,7 +504,7 @@ void uart_irq_err_disable(int port /* UART to disable Rx interrupt */
OUTBYTE(IER(port), INBYTE(IER(port)) & (~IER_LSR));
}
/*******************************************************************************
/**
*
* uart_irq_is_pending - check if any IRQ is pending
*
@ -517,7 +517,7 @@ int uart_irq_is_pending(int port /* UART to check */
return (!(IIRC(port) & IIR_IP));
}
/*******************************************************************************
/**
*
* uart_irq_update - update cached contents of IIR
*
@ -532,7 +532,7 @@ int uart_irq_update(int port /* UART to update */
return 1;
}
/*******************************************************************************
/**
*
* uart_irq_get - returns UART interrupt number
*

42
drivers/serial/stellarisUartDrv.c
View file

@ -153,7 +153,7 @@ struct _StellarisUartPort {
UART_PORTS_CONFIGURE(struct _StellarisUartPort, ports);
/*******************************************************************************
/**
*
* baudrateSet - set the baud rate
*
@ -184,7 +184,7 @@ static void baudrateSet(int port, uint32_t baudrate, uint32_t sysClkFreqInHz)
pUart->fbrd = (uint8_t)(brdf & 0x3f); /* 6 bits */
}
/*******************************************************************************
/**
*
* enable - enable the UART
*
@ -200,7 +200,7 @@ static inline void enable(int port)
pUart->ctl |= UARTCTL_UARTEN;
}
/*******************************************************************************
/**
*
* disable - disable the UART
*
@ -233,7 +233,7 @@ static inline void disable(int port)
*/
#define LINE_CONTROL_DEFAULTS UARTLCRH_WLEN
/*******************************************************************************
/**
*
* lineControlDefaultsSet - set the default UART line controls
*
@ -249,7 +249,7 @@ static inline void lineControlDefaultsSet(int port)
pUart->lcrh = LINE_CONTROL_DEFAULTS;
}
/*******************************************************************************
/**
*
* uart_init - initialize UART channel
*
@ -270,7 +270,7 @@ void uart_init(int port, /* UART channel to initialize */
enable(port);
}
/*******************************************************************************
/**
*
* pollTxReady - get the UART transmit ready status
*
@ -286,7 +286,7 @@ static int pollTxReady(int port)
return (pUart->fr & UARTFR_TXFE);
}
/*******************************************************************************
/**
*
* uart_poll_in - poll the device for input.
*
@ -308,7 +308,7 @@ int uart_poll_in(int port, /* UART channel to select for input */
return 0;
}
/*******************************************************************************
/**
*
* uart_poll_out - output a character in polled mode.
*
@ -331,7 +331,7 @@ unsigned char uart_poll_out(int port, unsigned char c)
#if CONFIG_UART_INTERRUPT_DRIVEN
/*******************************************************************************
/**
*
* uart_fifo_fill - fill FIFO with data
*
@ -353,7 +353,7 @@ int uart_fifo_fill(int port, /* UART on which to send */
return (int)numTx;
}
/*******************************************************************************
/**
*
* uart_fifo_read - read data from FIFO
*
@ -375,7 +375,7 @@ int uart_fifo_read(int port, /* UART to receive from */
return numRx;
}
/*******************************************************************************
/**
*
* uart_irq_tx_enable - enable TX interrupt
*
@ -430,7 +430,7 @@ void uart_irq_tx_enable(int port /* UART to enable Tx interrupt */
pUart->im |= UARTTIM_TXIM;
}
/*******************************************************************************
/**
*
* uart_irq_tx_disable - disable TX interrupt in IER
*
@ -445,7 +445,7 @@ void uart_irq_tx_disable(int port /* UART to disable Tx interrupt */
pUart->im &= ~UARTTIM_TXIM;
}
/*******************************************************************************
/**
*
* uart_irq_tx_ready - check if Tx IRQ has been raised
*
@ -460,7 +460,7 @@ int uart_irq_tx_ready(int port /* UART to check */
return ((pUart->mis & UARTMIS_TXMIS) == UARTMIS_TXMIS);
}
/*******************************************************************************
/**
*
* uart_irq_rx_enable - enable RX interrupt in IER
*
@ -475,7 +475,7 @@ void uart_irq_rx_enable(int port /* UART to enable Rx interrupt */
pUart->im |= UARTTIM_RXIM;
}
/*******************************************************************************
/**
*
* uart_irq_rx_disable - disable RX interrupt in IER
*
@ -490,7 +490,7 @@ void uart_irq_rx_disable(int port /* UART to disable Rx interrupt */
pUart->im &= ~UARTTIM_RXIM;
}
/*******************************************************************************
/**
*
* uart_irq_rx_ready - check if Rx IRQ has been raised
*
@ -505,7 +505,7 @@ int uart_irq_rx_ready(int port /* UART to check */
return ((pUart->mis & UARTMIS_RXMIS) == UARTMIS_RXMIS);
}
/*******************************************************************************
/**
*
* uart_irq_err_enable - enable error interrupts
*
@ -521,7 +521,7 @@ void uart_irq_err_enable(int port /* UART to enable interrupts for */
UARTTIM_BEIM | UARTTIM_OEIM);
}
/*******************************************************************************
/**
*
* uart_irq_err_disable - disable error interrupts
*
@ -537,7 +537,7 @@ void uart_irq_err_disable(int port /* UART to disable interrupts for */
UARTTIM_BEIM | UARTTIM_OEIM);
}
/*******************************************************************************
/**
*
* uart_irq_is_pending - check if Tx or Rx IRQ is pending
*
@ -553,7 +553,7 @@ int uart_irq_is_pending(int port /* UART to check */
return ((pUart->mis & (UARTMIS_RXMIS | UARTMIS_TXMIS)) ? 1 : 0);
}
/*******************************************************************************
/**
*
* uart_irq_update - update IRQ status
*
@ -565,7 +565,7 @@ int uart_irq_update(int port)
return 1;
}
/*******************************************************************************
/**
*
* uart_irq_get - returns UART interrupt number
*

14
drivers/timer/arcv2_timer0.c
View file

@ -68,7 +68,7 @@ The ARCv2 processor timer provides a 32-bit incrementing, wrap-to-zero counter.
static uint32_t clock_accumulated_count = 0;
/*******************************************************************************
/**
*
* enable - enable the timer with the given limit/countup value
*
@ -95,7 +95,7 @@ static ALWAYS_INLINE void enable(
_arc_v2_aux_reg_write(_ARC_V2_TMR0_COUNT, 0); /* write the start value */
}
/*******************************************************************************
/**
*
* count_get - get the current counter value
*
@ -111,7 +111,7 @@ static ALWAYS_INLINE uint32_t count_get(void)
return _arc_v2_aux_reg_read(_ARC_V2_TMR0_COUNT);
}
/*******************************************************************************
/**
*
* limit_get - get the limit/countup value
*
@ -127,7 +127,7 @@ static ALWAYS_INLINE uint32_t limit_get(void)
return _arc_v2_aux_reg_read(_ARC_V2_TMR0_LIMIT);
}
/*******************************************************************************
/**
*
* _timer_int_handler - system clock periodic tick handler
*
@ -153,7 +153,7 @@ void _timer_int_handler(void *unused)
_sys_clock_tick_announce();
}
/*******************************************************************************
/**
*
* timer_driver - initialize and enable the system clock
*
@ -189,7 +189,7 @@ void timer_driver(
irq_enable(CONFIG_ARCV2_TIMER0_INT_LVL);
}
/*******************************************************************************
/**
*
* timer_read - read the BSP timer hardware
*
@ -204,7 +204,7 @@ uint32_t timer_read(void)
}
#if defined(CONFIG_SYSTEM_TIMER_DISABLE)
/*******************************************************************************
/**
*
* timer_disable - stop announcing ticks into the kernel
*

24
drivers/timer/cortex_m_timer.c
View file

@ -127,7 +127,7 @@ static unsigned char idle_mode = IDLE_NOT_TICKLESS;
#if defined(CONFIG_TICKLESS_IDLE) || \
defined(CONFIG_SYSTEM_TIMER_DISABLE)
/*******************************************************************************
/**
*
* sysTickStop - stop the timer
*
@ -156,7 +156,7 @@ static ALWAYS_INLINE void sysTickStop(void)
#ifdef CONFIG_TICKLESS_IDLE
/*******************************************************************************
/**
*
* sysTickStart - start the timer
*
@ -183,7 +183,7 @@ static ALWAYS_INLINE void sysTickStart(void)
__scs.systick.stcsr.val = reg.val;
}
/*******************************************************************************
/**
*
* sysTickCurrentGet - get the current counter value
*
@ -200,7 +200,7 @@ static ALWAYS_INLINE uint32_t sysTickCurrentGet(void)
return __scs.systick.stcvr;
}
/*******************************************************************************
/**
*
* sysTickReloadGet - get the reload/countdown value
*
@ -217,7 +217,7 @@ static ALWAYS_INLINE uint32_t sysTickReloadGet(void)
#endif /* CONFIG_TICKLESS_IDLE */
/*******************************************************************************
/**
*
* sysTickReloadSet - set the reload/countdown value
*
@ -244,7 +244,7 @@ static ALWAYS_INLINE void sysTickReloadSet(
__scs.systick.stcvr = 0; /* also clears the countflag */
}
/*******************************************************************************
/**
*
* _TIMER_INT_HANDLER - system clock tick handler
*
@ -377,7 +377,7 @@ void _TIMER_INT_HANDLER(void *unused)
#ifdef CONFIG_TICKLESS_IDLE
/*******************************************************************************
/**
*
* sysTickTicklessIdleInit - initialize the tickless idle feature
*
@ -458,7 +458,7 @@ static void sysTickTicklessIdleInit(void)
sysTickReloadSet(default_load_value);
}
/*******************************************************************************
/**
*
* _timer_idle_enter - Place the system timer into idle state
*
@ -514,7 +514,7 @@ void _timer_idle_enter(int32_t ticks /* system ticks */
sysTickStart();
}
/*******************************************************************************
/**
*
* _timer_idle_exit - handling of tickless idle when interrupted
*
@ -606,7 +606,7 @@ void _timer_idle_exit(void)
#endif /* CONFIG_TICKLESS_IDLE */
/*******************************************************************************
/**
*
* timer_driver - initialize and enable the system clock
*
@ -646,7 +646,7 @@ void timer_driver(int priority /* priority parameter is ignored by this driver
__scs.systick.stcsr.val = stcsr.val;
}
/*******************************************************************************
/**
*
* timer_read - read the BSP timer hardware
*
@ -668,7 +668,7 @@ uint32_t timer_read(void)
#ifdef CONFIG_SYSTEM_TIMER_DISABLE
/*******************************************************************************
/**
*
* timer_disable - stop announcing ticks into the kernel
*

14
drivers/timer/hpet.c
View file

@ -219,7 +219,7 @@ static int32_t programmed_ticks =
static int stale_irq_check =
0; /* is stale interrupt possible? */
/*******************************************************************************
/**
*
* _hpetMainCounterAtomic - safely read the main HPET up counter
*
@ -248,7 +248,7 @@ static uint64_t _hpetMainCounterAtomic(void)
#endif /* TIMER_SUPPORTS_TICKLESS */
/*******************************************************************************
/**
*
* _timer_int_handler - system clock tick handler
*
@ -349,7 +349,7 @@ void _timer_int_handler(void *unused)
#error Tickless idle threshold is too small (must be at least 2)
#endif
/*******************************************************************************
/**
*
* _timer_idle_enter - Place system timer into idle state
*
@ -378,7 +378,7 @@ void _timer_idle_enter(int32_t ticks /* system ticks */
programmed_ticks = ticks;
}
/*******************************************************************************
/**
*
* _timer_idle_exit - Take system timer out of idle state
*
@ -487,7 +487,7 @@ void _timer_idle_exit(void)
#endif /* TIMER_SUPPORTS_TICKLESS */
/*******************************************************************************
/**
*
* timer_driver - initialize and enable the system clock
*
@ -620,7 +620,7 @@ void timer_driver(int priority /* priority parameter is ignored by this driver
*_HPET_TIMER0_CONFIG_CAPS |= HPET_Tn_INT_ENB_CNF;
}
/*******************************************************************************
/**
*
* timer_read - read the BSP timer hardware
*
@ -640,7 +640,7 @@ uint32_t timer_read(void)
#ifdef CONFIG_SYSTEM_TIMER_DISABLE
/*******************************************************************************
/**
*
* timer_disable - stop announcing ticks into the kernel
*

24
drivers/timer/i8253.c
View file

@ -142,7 +142,7 @@ static uint32_t old_accumulated_count = 0; /* previous accumulated value value *
extern struct nano_stack _k_command_stack;
#endif /* CONFIG_MICROKERNEL */
/*******************************************************************************
/**
*
* _i8253CounterRead - read the i8253 counter register's value
*
@ -169,7 +169,7 @@ static inline uint16_t _i8253CounterRead(void)
return count;
}
/*******************************************************************************
/**
*
* _i8253CounterSet - set the i8253 counter register's value
*
@ -192,7 +192,7 @@ static inline void _i8253CounterSet(
_currentLoadVal = count;
}
/*******************************************************************************
/**
*
* _i8253CounterPeriodic - set the i8253 timer to fire periodically
*
@ -212,7 +212,7 @@ static inline void _i8253CounterPeriodic(
}
#if defined(TIMER_SUPPORTS_TICKLESS)
/*******************************************************************************
/**
*
* _i8253CounterOneShot - set the i8253 timer to fire once only
*
@ -232,7 +232,7 @@ static inline void _i8253CounterOneShot(
}
#endif /* !TIMER_SUPPORTS_TICKLESS */
/*******************************************************************************
/**
*
* _timer_int_handler - system clock periodic tick handler
*
@ -305,7 +305,7 @@ void _timer_int_handler(void *unusedArg /* not used */
}
#if defined(TIMER_SUPPORTS_TICKLESS)
/*******************************************************************************
/**
*
* _i8253TicklessIdleInit - initialize the tickless idle feature
*
@ -328,7 +328,7 @@ static void _i8253TicklessIdleInit(void)
max_load_value = max_system_ticks * counterLoadVal;
}
/*******************************************************************************
/**
*
* _i8253TicklessIdleSkew -
*
@ -343,7 +343,7 @@ static void _i8253TicklessIdleSkew(void)
timer_idle_skew = 0;
}
/*******************************************************************************
/**
*
* _timer_idle_enter - Place system timer into idle state
*
@ -400,7 +400,7 @@ void _timer_idle_enter(int32_t ticks /* system ticks */
irq_enable(PIT_INT_LVL);
}
/*******************************************************************************
/**
*
* _timer_idle_exit - handling of tickless idle when interrupted
*
@ -466,7 +466,7 @@ void _timer_idle_exit(void)
}
#endif /* !TIMER_SUPPORTS_TICKLESS */
/*******************************************************************************
/**
*
* timer_driver - initialize and enable the system clock
*
@ -501,7 +501,7 @@ void timer_driver(int priority /* priority parameter ignored by this driver */
irq_enable(PIT_INT_LVL);
}
/*******************************************************************************
/**
*
* timer_read - read the BSP timer hardware
*
@ -556,7 +556,7 @@ uint32_t timer_read(void)
}
#if defined(CONFIG_SYSTEM_TIMER_DISABLE)
/*******************************************************************************
/**
*
* timer_disable - stop announcing ticks into the kernel
*

32
drivers/timer/loapic_timer.c
View file

@ -132,7 +132,7 @@ static unsigned char timer_mode = TIMER_MODE_PERIODIC;
extern struct nano_stack _k_command_stack;
#endif /* CONFIG_MICROKERNEL */
/*******************************************************************************
/**
*
* _loApicTimerPeriodic - set the timer for periodic mode
*
@ -151,7 +151,7 @@ static inline void _loApicTimerPeriodic(void)
#if defined(TIMER_SUPPORTS_TICKLESS) || \
defined(LOAPIC_TIMER_PERIODIC_WORKAROUND) || \
defined(CONFIG_SYSTEM_TIMER_DISABLE)
/*******************************************************************************
/**
*
* _loApicTimerStop - stop the timer
*
@ -170,7 +170,7 @@ static inline void _loApicTimerStop(void)
#if defined(TIMER_SUPPORTS_TICKLESS) || \
defined(LOAPIC_TIMER_PERIODIC_WORKAROUND)
/*******************************************************************************
/**
*
* _loApicTimerStart - start the timer
*
@ -187,7 +187,7 @@ static inline void _loApicTimerStart(void)
}
#endif
/*******************************************************************************
/**
*
* _loApicTimerSetCount - set countdown value
*
@ -206,7 +206,7 @@ static inline void _loApicTimerSetCount(
}
#if defined(TIMER_SUPPORTS_TICKLESS)
/*******************************************************************************
/**
*
* _loApicTimerOneShot - set the timer for one shot mode
*
@ -223,7 +223,7 @@ static inline void _loApicTimerOneShot(void)
}
#endif /* TIMER_SUPPORTS_TICKLESS */
/*******************************************************************************
/**
*
* _loApicTimerSetDivider - set the rate at which the timer is decremented
*
@ -240,7 +240,7 @@ static inline void _loApicTimerSetDivider(void)
*_REG_TIMER_CFG = (*_REG_TIMER_CFG & ~0xf) | LOAPIC_TIMER_DIVBY_1;
}
/*******************************************************************************
/**
*
* _loApicTimerGetRemaining - get the value from the current count register
*
@ -258,7 +258,7 @@ static inline uint32_t _loApicTimerGetRemaining(void)
}
#if defined(TIMER_SUPPORTS_TICKLESS)
/*******************************************************************************
/**
*
* _loApicTimerGetCount - get the value from the initial count register
*
@ -274,7 +274,7 @@ static inline uint32_t _loApicTimerGetCount(void)
}
#endif /* TIMER_SUPPORTS_TICKLESS */
/*******************************************************************************
/**
*
* _timer_int_handler - system clock tick handler
*
@ -350,7 +350,7 @@ void _timer_int_handler(void *unused /* parameter is not used */
}
#if defined(TIMER_SUPPORTS_TICKLESS)
/*******************************************************************************
/**
*
* _loApicTimerTicklessIdleInit - initialize the tickless idle feature
*
@ -373,7 +373,7 @@ static void _loApicTimerTicklessIdleInit(void)
max_load_value = max_system_ticks * counterLoadVal;
}
/*******************************************************************************
/**
*
* _i8253TicklessIdleSkew - calculate the skew from idle mode switching
*
@ -407,7 +407,7 @@ static void _loApicTimerTicklessIdleSkew(void)
timer_idle_skew -= _loApicTimerGetRemaining();
}
/*******************************************************************************
/**
*
* _timer_idle_enter - Place system timer into idle state
*
@ -460,7 +460,7 @@ void _timer_idle_enter(int32_t ticks /* system ticks */
_loApicTimerStart();
}
/*******************************************************************************
/**
*
* _timer_idle_exit - handling of tickless idle when interrupted
*
@ -530,7 +530,7 @@ void _timer_idle_exit(void)
}
#endif /* TIMER_SUPPORTS_TICKLESS */
/*******************************************************************************
/**
*
* timer_driver - initialize and enable the system clock
*
@ -570,7 +570,7 @@ void timer_driver(int priority /* priority parameter ignored by this driver */
irq_enable(LOAPIC_TIMER_IRQ);
}
/*******************************************************************************
/**
*
* timer_read - read the BSP timer hardware
*
@ -599,7 +599,7 @@ uint32_t timer_read(void)
}
#if defined(CONFIG_SYSTEM_TIMER_DISABLE)
/*******************************************************************************
/**
*
* timer_disable - stop announcing ticks into the kernel
*

4
include/arch/arc/v2/ffs.h
View file

@ -45,7 +45,7 @@ GTEXT(nanoFfsMsb);
extern unsigned nanoFfsLsb(unsigned int);
extern unsigned nanoFfsMsb(unsigned int);
/*******************************************************************************
/**
*
* nanoFfsMsb_inline - Find First Set bit (searching from most significant bit)
*
@ -74,7 +74,7 @@ static ALWAYS_INLINE unsigned int nanoFfsMsb_inline(unsigned int op)
}
#endif
/*******************************************************************************
/**
*
* nanoFfsLsb - find first set bit (searching from the least significant bit)
*

4
include/arch/arc/v2/irq.h
View file

@ -71,7 +71,7 @@ extern void irq_priority_set(unsigned int irq, unsigned int prio);
extern void _irq_exit(void);
/*******************************************************************************
/**
*
* irq_lock_inline - disable all interrupts on the CPU (inline)
*
@ -91,7 +91,7 @@ static ALWAYS_INLINE unsigned int irq_lock_inline(void)
return key;
}
/*******************************************************************************
/**
*
* irq_unlock_inline - enable all interrupts on the CPU (inline)
*

8
include/arch/arm/CortexM/asm_inline_gcc.h
View file

@ -52,7 +52,7 @@
#include <stdint.h>
#include <arch/arm/CortexM/nvic.h>
/*******************************************************************************
/**
*
* find_last_set_inline - find first set bit (searching from most significant bit)
*
@ -80,7 +80,7 @@ static ALWAYS_INLINE unsigned int find_last_set_inline(unsigned int op)
}
/*******************************************************************************
/**
*
* find_first_set_inline - find first set bit (from the least significant bit)
*
@ -109,7 +109,7 @@ static ALWAYS_INLINE unsigned int find_first_set_inline(unsigned int op)
}
/*******************************************************************************
/**
*
* irq_lock_inline - disable all interrupts on the CPU (inline)
*
@ -156,7 +156,7 @@ static ALWAYS_INLINE unsigned int irq_lock_inline(void)
}
/*******************************************************************************
/**
*
* irq_unlock_inline - enable all interrupts on the CPU (inline)
*

4
include/arch/arm/CortexM/irq.h
View file

@ -80,7 +80,7 @@ extern void _IntExit(void);
#define DO_CONCAT(x, y) x ## y
#define CONCAT(x, y) DO_CONCAT(x, y)
/*******************************************************************************
/**
*
* IRQ_CONNECT_STATIC - connect a routine to interrupt number
*
@ -97,7 +97,7 @@ extern void _IntExit(void);
__attribute__ ((section (TOSTR(CONCAT(.gnu.linkonce.isr_irq, irq))))) = \
{parameter, isr}
/*******************************************************************************
/**
*
* IRQ_CONFIG - configure interrupt for the device
*

18
include/arch/arm/CortexM/nvic.h
View file

@ -85,7 +85,7 @@ Supports up to 240 IRQs and 256 priority levels.
#include <stdint.h>
#include <misc/__assert.h>
/*******************************************************************************
/**
*
* _NvicIrqEnable - enable an IRQ
*
@ -100,7 +100,7 @@ static inline void _NvicIrqEnable(unsigned int irq /* IRQ number */
__scs.nvic.iser[REG_FROM_IRQ(irq)] = 1 << BIT_FROM_IRQ(irq);
}
/*******************************************************************************
/**
*
* _NvicIsIrqEnabled - find out if an IRQ is enabled
*
@ -115,7 +115,7 @@ static inline int _NvicIsIrqEnabled(unsigned int irq /* IRQ number */
return __scs.nvic.iser[REG_FROM_IRQ(irq)] & (1 << BIT_FROM_IRQ(irq));
}
/*******************************************************************************
/**
*
* _NvicIrqEnable - disable an IRQ
*
@ -130,7 +130,7 @@ static inline void _NvicIrqDisable(unsigned int irq /* IRQ number */
__scs.nvic.icer[REG_FROM_IRQ(irq)] = 1 << BIT_FROM_IRQ(irq);
}
/*******************************************************************************
/**
*
* _NvicIrqPend - pend an IRQ
*
@ -147,7 +147,7 @@ static inline void _NvicIrqPend(unsigned int irq /* IRQ number */
__scs.nvic.ispr[REG_FROM_IRQ(irq)] = 1 << BIT_FROM_IRQ(irq);
}
/*******************************************************************************
/**
*
* _NvicIsIrqPending - find out if an IRQ is pending
*
@ -162,7 +162,7 @@ static inline int _NvicIsIrqPending(unsigned int irq /* IRQ number */
return __scs.nvic.ispr[REG_FROM_IRQ(irq)] & (1 << BIT_FROM_IRQ(irq));
}
/*******************************************************************************
/**
*
* _NvicIrqUnpend - unpend an IRQ
*
@ -179,7 +179,7 @@ static inline void _NvicIrqUnpend(unsigned int irq /* IRQ number */
__scs.nvic.icpr[REG_FROM_IRQ(irq)] = 1 << BIT_FROM_IRQ(irq);
}
/*******************************************************************************
/**
*
* _NvicIrqPrioSet - set priority of an IRQ
*
@ -196,7 +196,7 @@ static inline void _NvicIrqPrioSet(unsigned int irq, /* IRQ number */
__scs.nvic.ipr[irq] = prio;
}
/*******************************************************************************
/**
*
* _NvicIrqPrioGet - get priority of an IRQ
*
@ -211,7 +211,7 @@ static inline uint32_t _NvicIrqPrioGet(unsigned int irq /* IRQ number */
return __scs.nvic.ipr[irq];
}
/*******************************************************************************
/**
*
* _NvicSwInterruptTrigger - trigger an interrupt via software
*

152
include/arch/arm/CortexM/scb.h
View file

@ -73,7 +73,7 @@ registers is the way to implement it.
extern void _ScbSystemReset(void);
extern void _ScbNumPriGroupSet(unsigned int n);
/*******************************************************************************
/**
*
* _ScbIsNmiPending - find out if the NMI exception is pending
*
@ -85,7 +85,7 @@ static inline int _ScbIsNmiPending(void)
return !!__scs.scb.icsr.bit.nmipendset;
}
/*******************************************************************************
/**
*
* _ScbNmiPend - pend the NMI exception
*
@ -99,7 +99,7 @@ static inline void _ScbNmiPend(void)
__scs.scb.icsr.bit.nmipendset = 1;
}
/*******************************************************************************
/**
*
* _ScbIsPendsvPending - find out if the PendSV exception is pending
*
@ -111,7 +111,7 @@ static inline int _ScbIsPendsvPending(void)
return __scs.scb.icsr.bit.pendsvset;
}
/*******************************************************************************
/**
*
* _ScbPendsvSet - set the PendSV exception
*
@ -126,7 +126,7 @@ static inline void _ScbPendsvSet(void)
__scs.scb.icsr.bit.pendsvset = 1;
}
/*******************************************************************************
/**
*
* _ScbPendsvClear - clear the PendSV exception
*
@ -140,7 +140,7 @@ static inline void _ScbPendsvClear(void)
__scs.scb.icsr.bit.pendsvclr = 1;
}
/*******************************************************************************
/**
*
* _ScbIsSystickPending - find out if the SYSTICK exception is pending
*
@ -154,7 +154,7 @@ static inline int _ScbIsSystickPending(void)
return __scs.scb.icsr.bit.pendstset;
}
/*******************************************************************************
/**
*
* _ScbSystickPend - pend the SYSTICK exception
*
@ -170,7 +170,7 @@ static inline void _ScbSystickPendSet(void)
__scs.scb.icsr.bit.pendstset = 1;
}
/*******************************************************************************
/**
*
* _ScbSystickClear - clear the SYSTICK exception
*
@ -184,7 +184,7 @@ static inline void _ScbSystickPendClear(void)
__scs.scb.icsr.bit.pendstclr = 1;
}
/*******************************************************************************
/**
*
* _ScbIsIrqPending - find out if an external interrupt is pending
*
@ -198,7 +198,7 @@ static inline int _ScbIsIrqPending(void)
return __scs.scb.icsr.bit.isrpending;
}
/*******************************************************************************
/**
*
* _ScbHiPriVectorPendingGet - find out the exception number of highest-priority
* pending exception (including interrupts)
@ -217,7 +217,7 @@ static inline int _ScbHiPriVectorPendingGet(void)
return reg.bit.vectpending;
}
/*******************************************************************************
/**
*
* _ScbIsNested - find out if the currently executing exception is nested
*
@ -232,7 +232,7 @@ static inline int _ScbIsNestedExc(void)
return !__scs.scb.icsr.bit.rettobase;
}
/*******************************************************************************
/**
*
* _ScbIsInThreadMode - find out if running in thread mode
*
@ -247,7 +247,7 @@ static inline int _ScbIsInThreadMode(void)
return !__scs.scb.icsr.bit.vectactive;
}
/*******************************************************************************
/**
*
* _ScbIsInHandlerMode - find out if running in handler mode
*
@ -261,7 +261,7 @@ static inline int _ScbIsInHandlerMode(void)
return !_ScbIsInThreadMode();
}
/*******************************************************************************
/**
*
* _ScbIsInExc - find out if handling an exception
*
@ -275,7 +275,7 @@ static inline int _ScbIsInExc(void)
return _ScbIsInHandlerMode();
}
/*******************************************************************************
/**
*
* _ScbActiveVectorGet - obtain the currently executing vector
*
@ -290,7 +290,7 @@ static inline uint32_t _ScbActiveVectorGet(void)
return __scs.scb.icsr.bit.vectactive;
}
/*******************************************************************************
/**
*
* _ScbIsVtableInSram - find out if vector table is in SRAM or ROM
*
@ -304,7 +304,7 @@ static inline uint32_t _ScbIsVtableInSram(void)
return !!__scs.scb.vtor.bit.tblbase;
}
/*******************************************************************************
/**
*
* _ScbVtableLocationSet - move vector table from SRAM to ROM and vice-versa
*
@ -321,7 +321,7 @@ static inline void _ScbVtableLocationSet(
__scs.scb.vtor.bit.tblbase = sram;
}
/*******************************************************************************
/**
*
* _ScbVtableAddrGet - obtain base address of vector table
*
@ -335,7 +335,7 @@ static inline uint32_t _ScbVtableAddrGet(void)
return __scs.scb.vtor.bit.tbloff;
}
/*******************************************************************************
/**
*
* _ScbVtableAddrSet - set base address of vector table
*
@ -361,7 +361,7 @@ static inline void _ScbVtableAddrSet(uint32_t addr /* base address, aligned on
__scs.scb.vtor.bit.tbloff = addr;
}
/*******************************************************************************
/**
*
* _ScbIsDataLittleEndian - find out if data regions are little endian
*
@ -376,7 +376,7 @@ static inline int _ScbIsDataLittleEndian(void)
return !(__scs.scb.aircr.bit.endianness);
}
/*******************************************************************************
/**
*
* _ScbNumPriGroupGet - get the programmed number of priority groups
*
@ -392,7 +392,7 @@ static inline int _ScbNumPriGroupGet(void)
return 1 << (7 - __scs.scb.aircr.bit.prigroup);
}
/*******************************************************************************
/**
*
* _ScbSleepOnExitSet - CPU goes to sleep after exiting an ISR
*
@ -408,7 +408,7 @@ static inline void _ScbSleepOnExitSet(void)
__scs.scb.scr.bit.sleeponexit = 1;
}
/*******************************************************************************
/**
*
* _ScbSleepOnExitClear - CPU does not go to sleep after exiting an ISR
*
@ -423,7 +423,7 @@ static inline void _ScbSleepOnExitClear(void)
__scs.scb.scr.bit.sleeponexit = 0;
}
/*******************************************************************************
/**
*
* _ScbSevOnPendSet - do not put CPU to sleep if pending exception are present
* when invoking wfe instruction
@ -444,7 +444,7 @@ static inline void _ScbSevOnPendSet(void)
__scs.scb.scr.bit.sevonpend = 1;
}
/*******************************************************************************
/**
*
* _ScbSevOnPendClear - clear SEVONPEND bit
*
@ -458,7 +458,7 @@ static inline void _ScbSevOnPendClear(void)
__scs.scb.scr.bit.sevonpend = 0;
}
/*******************************************************************************
/**
*
* _ScbSleepDeepSet - when putting the CPU to sleep, put it in deep sleep
*
@ -475,7 +475,7 @@ static inline void _ScbSleepDeepSet(void)
__scs.scb.scr.bit.sleepdeep = 1;
}
/*******************************************************************************
/**
*
* _ScbSleepDeepSet - when putting the CPU to sleep, do not put it in deep sleep
*
@ -489,7 +489,7 @@ static inline void _ScbSleepDeepClear(void)
__scs.scb.scr.bit.sleepdeep = 0;
}
/*******************************************************************************
/**
*
* _ScbDivByZeroFaultEnable - enable faulting on division by zero
*
@ -504,7 +504,7 @@ static inline void _ScbDivByZeroFaultEnable(void)
__scs.scb.ccr.bit.div_0_trp = 1;
}
/*******************************************************************************
/**
*
* _ScbDivByZeroFaultDisable - ignore division by zero errors
*
@ -519,7 +519,7 @@ static inline void _ScbDivByZeroFaultDisable(void)
__scs.scb.ccr.bit.div_0_trp = 0;
}
/*******************************************************************************
/**
*
* _ScbUnalignedFaultEnable - enable faulting on unaligned access
*
@ -534,7 +534,7 @@ static inline void _ScbUnalignedFaultEnable(void)
__scs.scb.ccr.bit.unalign_trp = 1;
}
/*******************************************************************************
/**
*
* _ScbUnalignedFaultDisable - ignore unaligned access errors
*
@ -549,7 +549,7 @@ static inline void _ScbUnalignedFaultDisable(void)
__scs.scb.ccr.bit.unalign_trp = 0;
}
/*******************************************************************************
/**
*
* _ScbCcrSet - write the CCR all at once
*
@ -564,7 +564,7 @@ static inline void ScbCcrSet(uint32_t val /* value to write to CCR */
__scs.scb.ccr.val = val;
}
/*******************************************************************************
/**
*
* _ScbExcPrioGet - obtain priority of an exception
*
@ -584,7 +584,7 @@ static inline uint8_t _ScbExcPrioGet(uint8_t exc /* exception number, 4 to 15 */
return __scs.scb.shpr[exc - 4];
}
/*******************************************************************************
/**
*
* _ScbExcPrioSet - set priority of an exception
*
@ -608,7 +608,7 @@ static inline void _ScbExcPrioSet(uint8_t exc, /* exception number, 4 to 15 */
__scs.scb.shpr[exc - 4] = pri;
}
/*******************************************************************************
/**
*
* _ScbUsageFaultEnable - enable usage fault exceptions
*
@ -623,7 +623,7 @@ static inline void _ScbUsageFaultEnable(void)
__scs.scb.shcsr.bit.usgfaultena = 1;
}
/*******************************************************************************
/**
*
* _ScbUsageFaultDisable - disable usage fault exceptions
*
@ -638,7 +638,7 @@ static inline void _ScbUsageFaultDisable(void)
__scs.scb.shcsr.bit.usgfaultena = 0;
}
/*******************************************************************************
/**
*
* _ScbBusFaultEnable - enable bus fault exceptions
*
@ -653,7 +653,7 @@ static inline void _ScbBusFaultEnable(void)
__scs.scb.shcsr.bit.busfaultena = 1;
}
/*******************************************************************************
/**
*
* _ScbBusFaultDisable - disable bus fault exceptions
*
@ -668,7 +668,7 @@ static inline void _ScbBusFaultDisable(void)
__scs.scb.shcsr.bit.busfaultena = 0;
}
/*******************************************************************************
/**
*
* _ScbMemFaultEnable - enable MPU faults exceptions
*
@ -683,7 +683,7 @@ static inline void _ScbMemFaultEnable(void)
__scs.scb.shcsr.bit.memfaultena = 1;
}
/*******************************************************************************
/**
*
* _ScbMemFaultDisable - disable MPU fault exceptions
*
@ -698,7 +698,7 @@ static inline void _ScbMemFaultDisable(void)
__scs.scb.shcsr.bit.memfaultena = 0;
}
/*******************************************************************************
/**
*
* _ScbHardFaultIsBusErrOnVectorRead - find out if a hard fault is caused by
* a bus error on vector read
@ -714,7 +714,7 @@ static inline int _ScbHardFaultIsBusErrOnVectorRead(void)
return __scs.scb.hfsr.bit.vecttbl;
}
/*******************************************************************************
/**
*
* _ScbHardFaultIsForced - find out if a fault was escalated to hard fault
*
@ -729,7 +729,7 @@ static inline int _ScbHardFaultIsForced(void)
return __scs.scb.hfsr.bit.forced;
}
/*******************************************************************************
/**
*
* _ScbHardFaultAllFaultsReset - clear all hard faults (HFSR register)
*
@ -743,7 +743,7 @@ static inline int _ScbHardFaultAllFaultsReset(void)
return __scs.scb.hfsr.val = 0xffff;
}
/*******************************************************************************
/**
*
* _ScbIsMemFault - find out if a hard fault is an MPU fault
*
@ -757,7 +757,7 @@ static inline int _ScbIsMemFault(void)
return !!__scs.scb.cfsr.byte.mmfsr.val;
}
/*******************************************************************************
/**
*
* _ScbMemFaultIsMmfarValid - find out if the MMFAR register contains a valid
* value
@ -772,7 +772,7 @@ static inline int _ScbMemFaultIsMmfarValid(void)
return !!__scs.scb.cfsr.byte.mmfsr.bit.mmarvalid;
}
/*******************************************************************************
/**
*
* _ScbMemFaultMmfarReset - invalid the value in MMFAR
*
@ -787,7 +787,7 @@ static inline void _ScbMemFaultMmfarReset(void)
__scs.scb.cfsr.byte.mmfsr.bit.mmarvalid = 0;
}
/*******************************************************************************
/**
*
* _ScbMemFaultAllFaultsReset - clear all MPU faults (MMFSR register)
*
@ -801,7 +801,7 @@ static inline void _ScbMemFaultAllFaultsReset(void)
__scs.scb.cfsr.byte.mmfsr.val = 0xfe;
}
/*******************************************************************************
/**
*
* _ScbMemFaultIsStacking - find out if an MPU fault is a stacking fault
*
@ -816,7 +816,7 @@ static inline int _ScbMemFaultIsStacking(void)
return !!__scs.scb.cfsr.byte.mmfsr.bit.mstkerr;
}
/*******************************************************************************
/**
*
* _ScbMemFaultIsUnstacking - find out if an MPU fault is an unstacking fault
*
@ -831,7 +831,7 @@ static inline int _ScbMemFaultIsUnstacking(void)
return !!__scs.scb.cfsr.byte.mmfsr.bit.munstkerr;
}
/*******************************************************************************
/**
*
* _ScbMemFaultIsDataAccessViolation - find out if an MPU fault is a data access
* violation
@ -847,7 +847,7 @@ static inline int _ScbMemFaultIsDataAccessViolation(void)
return !!__scs.scb.cfsr.byte.mmfsr.bit.daccviol;
}
/*******************************************************************************
/**
*
* _ScbMemFaultIsInstrAccessViolation - find out if an MPU fault is an
* instruction access violation
@ -863,7 +863,7 @@ static inline int _ScbMemFaultIsInstrAccessViolation(void)
return !!__scs.scb.cfsr.byte.mmfsr.bit.iaccviol;
}
/*******************************************************************************
/**
*
* _ScbMemFaultAddrGet - find out the faulting address on an MPU fault
*
@ -875,7 +875,7 @@ static inline uint32_t _ScbMemFaultAddrGet(void)
return __scs.scb.mmfar;
}
/*******************************************************************************
/**
*
* _ScbIsBusFault - find out if a hard fault is a bus fault
*
@ -889,7 +889,7 @@ static inline int _ScbIsBusFault(void)
return !!__scs.scb.cfsr.byte.bfsr.val;
}
/*******************************************************************************
/**
*
* _ScbBusFaultIsBfarValid - find out if the BFAR register contains a valid
* value
@ -904,7 +904,7 @@ static inline int _ScbBusFaultIsBfarValid(void)
return !!__scs.scb.cfsr.byte.bfsr.bit.bfarvalid;
}
/*******************************************************************************
/**
*
* _ScbMemFaultBfarReset - invalid the value in BFAR
*
@ -919,7 +919,7 @@ static inline void _ScbBusFaultBfarReset(void)
__scs.scb.cfsr.byte.bfsr.bit.bfarvalid = 0;
}
/*******************************************************************************
/**
*
* _ScbBusFaultAllFaultsReset - clear all bus faults (BFSR register)
*
@ -933,7 +933,7 @@ static inline void _ScbBusFaultAllFaultsReset(void)
__scs.scb.cfsr.byte.bfsr.val = 0xfe;
}
/*******************************************************************************
/**
*
* _ScbBusFaultIsStacking - find out if a bus fault is a stacking fault
*
@ -948,7 +948,7 @@ static inline int _ScbBusFaultIsStacking(void)
return !!__scs.scb.cfsr.byte.bfsr.bit.stkerr;
}
/*******************************************************************************
/**
*
* _ScbBusFaultIsUnstacking - find out if a bus fault is an unstacking fault
*
@ -963,7 +963,7 @@ static inline int _ScbBusFaultIsUnstacking(void)
return !!__scs.scb.cfsr.byte.bfsr.bit.unstkerr;
}
/*******************************************************************************
/**
*
* _ScbBusFaultIsImprecise - find out if a bus fault is an imprecise error
*
@ -977,7 +977,7 @@ static inline int _ScbBusFaultIsImprecise(void)
return !!__scs.scb.cfsr.byte.bfsr.bit.impreciserr;
}
/*******************************************************************************
/**
*
* _ScbBusFaultIsPrecise - find out if a bus fault is an precise error
*
@ -992,7 +992,7 @@ static inline int _ScbBusFaultIsPrecise(void)
return !!__scs.scb.cfsr.byte.bfsr.bit.preciserr;
}
/*******************************************************************************
/**
*
* _ScbBusFaultIsInstrBusErr - find out if a bus fault is an instruction bus
* error
@ -1008,7 +1008,7 @@ static inline int _ScbBusFaultIsInstrBusErr(void)
return !!__scs.scb.cfsr.byte.bfsr.bit.ibuserr;
}
/*******************************************************************************
/**
*
* _ScbBusFaultAddrGet - get the faulting address on a precise bus fault
*
@ -1022,7 +1022,7 @@ static inline uint32_t _ScbBusFaultAddrGet(void)
return __scs.scb.bfar;
}
/*******************************************************************************
/**
*
* _ScbIsUsageFault - find out if a hard fault is a usage fault
*
@ -1036,7 +1036,7 @@ static inline int _ScbIsUsageFault(void)
return !!__scs.scb.cfsr.byte.ufsr.val;
}
/*******************************************************************************
/**
*
* _ScbUsageFaultIsDivByZero - find out if a usage fault is a 'divide by zero'
* fault
@ -1051,7 +1051,7 @@ static inline int _ScbUsageFaultIsDivByZero(void)
return !!__scs.scb.cfsr.byte.ufsr.bit.divbyzero;
}
/*******************************************************************************
/**
*
* _ScbUsageFaultIsUnaligned - find out if a usage fault is a unaligned access
* error
@ -1066,7 +1066,7 @@ static inline int _ScbUsageFaultIsUnaligned(void)
return !!__scs.scb.cfsr.byte.ufsr.bit.unaligned;
}
/*******************************************************************************
/**
*
* _ScbUsageFaultIsNoCp - find out if a usage fault is a coprocessor access
* error
@ -1082,7 +1082,7 @@ static inline int _ScbUsageFaultIsNoCp(void)
return !!__scs.scb.cfsr.byte.ufsr.bit.nocp;
}
/*******************************************************************************
/**
*
* _ScbUsageFaultIsInvalidPcLoad - find out if a usage fault is a invalid PC
* load error
@ -1098,7 +1098,7 @@ static inline int _ScbUsageFaultIsInvalidPcLoad(void)
return !!__scs.scb.cfsr.byte.ufsr.bit.invpc;
}
/*******************************************************************************
/**
*
* _ScbUsageFaultIsInvalidState - find out if a usage fault is a invalid state
* error
@ -1115,7 +1115,7 @@ static inline int _ScbUsageFaultIsInvalidState(void)
return !!__scs.scb.cfsr.byte.ufsr.bit.invstate;
}
/*******************************************************************************
/**
*
* _ScbUsageFaultIsUndefinedInstr - find out if a usage fault is a undefined
* instruction error
@ -1130,7 +1130,7 @@ static inline int _ScbUsageFaultIsUndefinedInstr(void)
return !!__scs.scb.cfsr.byte.ufsr.bit.undefinstr;
}
/*******************************************************************************
/**
*
* _ScbUsageFaultDivByZeroReset - clear the 'division by zero' fault
*
@ -1144,7 +1144,7 @@ static inline void _ScbUsageFaultDivByZeroReset(void)
__scs.scb.cfsr.byte.ufsr.bit.divbyzero = 1;
}
/*******************************************************************************
/**
*
* _ScbUsageFaultUnalignedReset - clear the 'unaligned access' fault
*
@ -1158,7 +1158,7 @@ static inline void _ScbUsageFaultUnalignedReset(void)
__scs.scb.cfsr.byte.ufsr.bit.unaligned = 1;
}
/*******************************************************************************
/**
*
* _ScbUsageFaultNoCpReset - clear the 'no co-processor' fault
*
@ -1172,7 +1172,7 @@ static inline void _ScbUsageFaultNoCpReset(void)
__scs.scb.cfsr.byte.ufsr.bit.nocp = 1;
}
/*******************************************************************************
/**
*
* _ScbUsageFaultInvalidPcLoadReset - clear the 'invalid PC load ' fault
*
@ -1186,7 +1186,7 @@ static inline void _ScbUsageFaultInvalidPcLoadReset(void)
__scs.scb.cfsr.byte.ufsr.bit.invpc = 1;
}
/*******************************************************************************
/**
*
* _ScbUsageFaultInvalidStateReset - clear the 'invalid state' fault
*
@ -1200,7 +1200,7 @@ static inline void _ScbUsageFaultInvalidStateReset(void)
__scs.scb.cfsr.byte.ufsr.bit.invstate = 1;
}
/*******************************************************************************
/**
*
* _ScbUsageFaultUndefinedInstrReset - clear the 'undefined instruction' fault
*
@ -1214,7 +1214,7 @@ static inline void _ScbUsageFaultUndefinedInstrReset(void)
__scs.scb.cfsr.byte.ufsr.bit.undefinstr = 1;
}
/*******************************************************************************
/**
*
* _ScbUsageFaultAllFaultsReset - clear all usage faults (UFSR register)
*

14
include/arch/arm/CortexM/scs.h
View file

@ -431,7 +431,7 @@ extern volatile struct __scs __scs;
/* API */
/*******************************************************************************
/**
*
* _ScsNumIrqGet - obtain the number of interrupt lines on the target
*
@ -443,7 +443,7 @@ static inline int _ScsNumIrqGet(void)
return 32 * (__scs.ictr.bit.intlinesnum + 1);
}
/*******************************************************************************
/**
*
* _ScsIntMultiCycleInstDisable - disable load/store multiple instructions
*
@ -461,7 +461,7 @@ static inline void _ScsIntMultiCycleInstDisable(void)
__scs.actlr.bit.dismcycint = 1;
}
/*******************************************************************************
/**
*
* _ScsIntMultiCycleInstEnable - enable load/store multiple instructions
*
@ -475,7 +475,7 @@ static inline void _ScsIntMultiCycleInstEnable(void)
__scs.actlr.bit.dismcycint = 0;
}
/*******************************************************************************
/**
*
* _ScsWriteBufDisable - disable write buffer
*
@ -493,7 +493,7 @@ static inline void _ScsWriteBufDisable(void)
__scs.actlr.bit.disdefwbuf = 1;
}
/*******************************************************************************
/**
*
* _ScsWriteBufEnable - enable write buffer
*
@ -507,7 +507,7 @@ static inline void _ScsWriteBufEnable(void)
__scs.actlr.bit.disdefwbuf = 0;
}
/*******************************************************************************
/**
*
* _ScsFoldItDisable - disable IT folding
*
@ -527,7 +527,7 @@ static inline void _ScsFoldItDisable(void)
__scs.actlr.bit.disfold = 1;
}
/*******************************************************************************
/**
*
* _ScsFoldItEnable - enable IT folding
*

10
include/arch/x86/arch.h
View file

@ -105,7 +105,7 @@ typedef struct s_isrList {
unsigned int dpl; /* Privilege level associated with ISR/stub */
} ISR_LIST;
/*******************************************************************************
/**
*
* NANO_CPU_INT_REGISTER - connect a routine to an interrupt vector
*
@ -138,7 +138,7 @@ typedef struct s_isrList {
_NODATA_SECTION(.intStubSect) NANO_INT_STUB(s)
/*******************************************************************************
/**
*
* IRQ_CONNECT_STATIC - connect a routine to interrupt number
*
@ -155,7 +155,7 @@ typedef struct s_isrList {
NANO_CPU_INT_REGISTER(_##device##_##isr##_stub, INT_VEC_IRQ0 + (irq), priority)
/*******************************************************************************
/**
*
* IRQ_CONFIG - configure interrupt for the device
*
@ -274,7 +274,7 @@ void _int_latency_start(void);
void _int_latency_stop(void);
#endif
/*******************************************************************************
/**
*
* irq_lock_inline - disable all interrupts on the CPU (inline)
*
@ -318,7 +318,7 @@ static inline __attribute__((always_inline))
}
/*******************************************************************************
/**
*
* irq_unlock_inline - enable all interrupts on the CPU (inline)
*

24
include/arch/x86/asm_inline_gcc.h
View file

@ -44,7 +44,7 @@
#include <stdint.h>
#include <stddef.h>
/*******************************************************************************
/**
*
* _do_irq_lock_inline - disable all interrupts on the CPU (inline)
*
@ -93,7 +93,7 @@ static inline __attribute__((always_inline))
}
/*******************************************************************************
/**
*
* _do_irq_unlock_inline - enable all interrupts on the CPU (inline)
*
@ -115,7 +115,7 @@ static inline __attribute__((always_inline))
}
/*******************************************************************************
/**
*
* find_first_set_inline - find first set bit searching from the LSB (inline)
*
@ -166,7 +166,7 @@ static inline __attribute__((always_inline))
}
/*******************************************************************************
/**
*
* find_last_set_inline - find first set bit searching from the MSB (inline)
*
@ -216,7 +216,7 @@ static inline inline __attribute__((always_inline))
}
/********************************************************
/**
*
* _NanoTscRead - read timestamp register ensuring serialization
*/
@ -250,7 +250,7 @@ static inline uint64_t _NanoTscRead(void)
}
/*******************************************************************************
/**
*
* _do_read_cpu_timestamp - get a 32 bit CPU timestamp counter
*
@ -268,7 +268,7 @@ static inline inline __attribute__((always_inline))
}
/*******************************************************************************
/**
*
* sys_out8 - output a byte to an IA-32 I/O port
*
@ -287,7 +287,7 @@ static inline inline __attribute__((always_inline))
}
/*******************************************************************************
/**
*
* sys_in8 - input a byte from an IA-32 I/O port
*
@ -309,7 +309,7 @@ static inline inline __attribute__((always_inline))
}
/*******************************************************************************
/**
*
* sys_out16 - output a word to an IA-32 I/O port
*
@ -328,7 +328,7 @@ static inline inline __attribute__((always_inline))
}
/*******************************************************************************
/**
*
* sys_in16 - input a word from an IA-32 I/O port
*
@ -350,7 +350,7 @@ static inline inline __attribute__((always_inline))
}
/*******************************************************************************
/**
*
* sys_out32 - output a long word to an IA-32 I/O port
*
@ -369,7 +369,7 @@ static inline inline __attribute__((always_inline))
}
/*******************************************************************************
/**
*
* sys_in32 - input a long word from an IA-32 I/O port
*

8
include/drivers/k20_watchdog.h
View file

@ -83,15 +83,15 @@ typedef volatile struct {
uint16_t presc; /* 0x16 */
} K20_WDOG_t;
/***********************************************************************/
/**/
/**< Macro to enable all interrupts. */
#define EnableInterrupts __asm__(" CPSIE i");
/**< Macro to disable all interrupts. */
#define DisableInterrupts __asm__(" CPSID i");
/***********************************************************************/
/**/
/*******************************************************************************
/**
*
* wdog_unlock - Watchdog timer unlock routine.
*
@ -124,7 +124,7 @@ static ALWAYS_INLINE void wdog_unlock(K20_WDOG_t *wdog_p)
EnableInterrupts;
}
/*******************************************************************************
/**
*
* wdog_disable - Watchdog timer disable routine
*

4
include/microkernel/command_packet.h
View file

@ -43,7 +43,7 @@ extern "C" {
#define CMD_PKT_SIZE_IN_WORDS (19)
/*******************************************************************************
/**
*
* CMD_PKT_SET_INSTANCE - define an instance of a command packet set
*
@ -60,7 +60,7 @@ extern "C" {
#define CMD_PKT_SET_INSTANCE(name, num) \
uint32_t name[2 + CMD_PKT_SIZE_IN_WORDS * (num)] = {num, 0};
/*******************************************************************************
/**
*
* CMD_PKT_SET - wrapper for accessing a command packet set
*

2
include/misc/lists_c.h
View file

@ -37,7 +37,7 @@
extern "C" {
#endif
/*******************************************************************************
/**
Example code from list insertion etc
*******************************************************************************/

4
kernel/microkernel/include/k_pipe_util.h
View file

@ -37,9 +37,9 @@
#define CANCEL_TIMERS
/***********************************/
/**/
/* TARGET channels functionality: */
/***********************************/
/**/
typedef uint32_t REQ_TYPE;
#define _ALLREQ ((REQ_TYPE)0x0000FF00)

4
kernel/microkernel/k_command_packet.c
View file

@ -67,7 +67,7 @@ that have an ISR component should use their own command packet set.
uint32_t _k_test_cmd_pkt_size
[0 - ((CMD_PKT_SIZE_IN_WORDS * sizeof(uint32_t)) != sizeof(struct k_args))];
/*******************************************************************************
/**
*
* _cmd_pkt_get - get the next command packet
*
@ -93,7 +93,7 @@ cmdPkt_t *_cmd_pkt_get(
return &pSet->cmdPkt[index];
}
/*******************************************************************************
/**
*
* _k_task_call - send command packet to be processed by K_swapper
*

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