driver: intc: npcx: remove 'interrupt disable' in miwu configure func.
In this CL, npcx_miwu_interrupt_configure is no longer responsible for turning the interrupt off. Although the default state of WK_EN is disabled, the users still have the chance to configure them when WK_EN is enabled via npcx_miwu_irq_enable(). Hence, this CL also ensures that WK_EN is disabled before configuring them. Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This commit is contained in:
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9e68b1c351
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ea00ff32fe
2 changed files with 54 additions and 62 deletions
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@ -170,14 +170,11 @@ void npcx_miwu_irq_disable(const struct npcx_wui *wui)
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NPCX_WKEN(base, wui->group) &= ~BIT(wui->bit);
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NPCX_WKEN(base, wui->group) &= ~BIT(wui->bit);
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}
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}
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unsigned int npcx_miwu_irq_get_state(const struct npcx_wui *wui)
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bool npcx_miwu_irq_get_state(const struct npcx_wui *wui)
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{
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{
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const uint32_t base = DRV_CONFIG(miwu_devs[wui->table])->base;
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const uint32_t base = DRV_CONFIG(miwu_devs[wui->table])->base;
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if (IS_BIT_SET(NPCX_WKEN(base, wui->group), wui->bit))
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return IS_BIT_SET(NPCX_WKEN(base, wui->group), wui->bit);
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return 1;
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else
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return 0;
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}
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}
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int npcx_miwu_interrupt_configure(const struct npcx_wui *wui,
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int npcx_miwu_interrupt_configure(const struct npcx_wui *wui,
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@ -186,61 +183,59 @@ int npcx_miwu_interrupt_configure(const struct npcx_wui *wui,
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const uint32_t base = DRV_CONFIG(miwu_devs[wui->table])->base;
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const uint32_t base = DRV_CONFIG(miwu_devs[wui->table])->base;
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uint8_t pmask = BIT(wui->bit);
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uint8_t pmask = BIT(wui->bit);
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if (mode == NPCX_MIWU_MODE_DISABLED) {
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/* Disable interrupt of wake-up input source before configuring it */
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/* Clear MIWU enable bit */
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npcx_miwu_irq_disable(wui);
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NPCX_WKEN(base, wui->group) &= ~pmask;
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} else {
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/* Handle interrupt for level trigger */
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/* Handle interrupt for level trigger */
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if (mode == NPCX_MIWU_MODE_LEVEL) {
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if (mode == NPCX_MIWU_MODE_LEVEL) {
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/* Set detection mode to level */
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/* Set detection mode to level */
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NPCX_WKMOD(base, wui->group) |= pmask;
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NPCX_WKMOD(base, wui->group) |= pmask;
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switch (trig) {
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switch (trig) {
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/* Enable interrupting on level high */
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/* Enable interrupting on level high */
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case NPCX_MIWU_TRIG_HIGH:
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case NPCX_MIWU_TRIG_HIGH:
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NPCX_WKEDG(base, wui->group) &= ~pmask;
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NPCX_WKEDG(base, wui->group) &= ~pmask;
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break;
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break;
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/* Enable interrupting on level low */
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/* Enable interrupting on level low */
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case NPCX_MIWU_TRIG_LOW:
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case NPCX_MIWU_TRIG_LOW:
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NPCX_WKEDG(base, wui->group) |= pmask;
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NPCX_WKEDG(base, wui->group) |= pmask;
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break;
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break;
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default:
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default:
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return -EINVAL;
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return -EINVAL;
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}
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}
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/* Handle interrupt for edge trigger */
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/* Handle interrupt for edge trigger */
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} else {
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} else {
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/* Set detection mode to edge */
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/* Set detection mode to edge */
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NPCX_WKMOD(base, wui->group) &= ~pmask;
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NPCX_WKMOD(base, wui->group) &= ~pmask;
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switch (trig) {
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switch (trig) {
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/* Handle interrupting on falling edge */
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/* Handle interrupting on falling edge */
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case NPCX_MIWU_TRIG_LOW:
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case NPCX_MIWU_TRIG_LOW:
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NPCX_WKAEDG(base, wui->group) &= ~pmask;
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NPCX_WKAEDG(base, wui->group) &= ~pmask;
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NPCX_WKEDG(base, wui->group) |= pmask;
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NPCX_WKEDG(base, wui->group) |= pmask;
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break;
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break;
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/* Handle interrupting on rising edge */
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/* Handle interrupting on rising edge */
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case NPCX_MIWU_TRIG_HIGH:
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case NPCX_MIWU_TRIG_HIGH:
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NPCX_WKAEDG(base, wui->group) &= ~pmask;
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NPCX_WKAEDG(base, wui->group) &= ~pmask;
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NPCX_WKEDG(base, wui->group) &= ~pmask;
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NPCX_WKEDG(base, wui->group) &= ~pmask;
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break;
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break;
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/* Handle interrupting on both edges */
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/* Handle interrupting on both edges */
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case NPCX_MIWU_TRIG_BOTH:
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case NPCX_MIWU_TRIG_BOTH:
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/* Enable any edge */
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/* Enable any edge */
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NPCX_WKAEDG(base, wui->group) |= pmask;
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NPCX_WKAEDG(base, wui->group) |= pmask;
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break;
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break;
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default:
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default:
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return -EINVAL;
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return -EINVAL;
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}
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}
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}
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/* Enable wake-up input sources */
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NPCX_WKINEN(base, wui->group) |= pmask;
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/*
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* Clear pending bit since it might be set if WKINEN bit is
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* changed.
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*/
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NPCX_WKPCL(base, wui->group) |= pmask;
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}
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}
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/* Enable wake-up input sources */
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NPCX_WKINEN(base, wui->group) |= pmask;
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/*
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* Clear pending bit since it might be set if WKINEN bit is
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* changed.
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*/
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NPCX_WKPCL(base, wui->group) |= pmask;
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return 0;
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return 0;
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}
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}
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@ -333,8 +328,8 @@ int npcx_miwu_manage_dev_callback(struct miwu_dev_callback *cb, bool set)
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\
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\
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/* Clear all MIWUs' pending and enable bits of MIWU device */ \
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/* Clear all MIWUs' pending and enable bits of MIWU device */ \
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for (i = 0; i < NPCX_MIWU_GROUP_COUNT; i++) { \
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for (i = 0; i < NPCX_MIWU_GROUP_COUNT; i++) { \
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NPCX_WKPCL(base, i) = 0xFF; \
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NPCX_WKEN(base, i) = 0; \
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NPCX_WKEN(base, i) = 0; \
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NPCX_WKPCL(base, i) = 0xFF; \
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} \
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} \
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\
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\
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/* Config IRQ and MWIU group directly */ \
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/* Config IRQ and MWIU group directly */ \
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@ -34,15 +34,12 @@ enum miwu_group {
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/* Interrupt modes supported by npcx miwu modules */
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/* Interrupt modes supported by npcx miwu modules */
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enum miwu_int_mode {
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enum miwu_int_mode {
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NPCX_MIWU_MODE_DISABLED,
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NPCX_MIWU_MODE_LEVEL,
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NPCX_MIWU_MODE_LEVEL,
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NPCX_MIWU_MODE_EDGE,
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NPCX_MIWU_MODE_EDGE,
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};
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};
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/* Interrupt trigger modes supported by npcx miwu modules */
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/* Interrupt trigger modes supported by npcx miwu modules */
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enum miwu_int_trig {
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enum miwu_int_trig {
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NPCX_MIWU_TRIG_NONE, /** No trigger detection */
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NPCX_MIWU_TRIG_LOW, /** Edge failing or active low detection */
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NPCX_MIWU_TRIG_LOW, /** Edge failing or active low detection */
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NPCX_MIWU_TRIG_HIGH, /** Edge rising or active high detection */
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NPCX_MIWU_TRIG_HIGH, /** Edge rising or active high detection */
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NPCX_MIWU_TRIG_BOTH, /** Both edge rising and failing detection */
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NPCX_MIWU_TRIG_BOTH, /** Both edge rising and failing detection */
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@ -140,7 +137,7 @@ void npcx_miwu_irq_disable(const struct npcx_wui *wui);
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*
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*
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* @retval 0 if interrupt is disabled, otherwise interrupt is enabled
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* @retval 0 if interrupt is disabled, otherwise interrupt is enabled
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*/
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*/
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unsigned int npcx_miwu_irq_get_state(const struct npcx_wui *wui);
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bool npcx_miwu_irq_get_state(const struct npcx_wui *wui);
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/**
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/**
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* @brief Configure interrupt type of the wake-up input source
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* @brief Configure interrupt type of the wake-up input source
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