soc: sam0: samd: Fix switching between clocks
The clock z_arm_platform_init hangs switching between clocks when using MCUboot. This fixes the issue using the 8MHz internal clock as gclk_main source when configuring PLL/DFLL. Fixes: #67220 Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
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1 changed files with 17 additions and 4 deletions
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@ -38,9 +38,6 @@
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#define FUSES_OSC32K_CAL_Msk FUSES_OSC32KCAL_Msk
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#endif
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#if !CONFIG_SOC_ATMEL_SAMD_OSC8M || CONFIG_SOC_ATMEL_SAMD_DEFAULT_AS_MAIN
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#define osc8m_init()
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#else
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static inline void osc8m_init(void)
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{
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uint32_t reg;
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@ -56,8 +53,24 @@ static inline void osc8m_init(void)
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while (!SYSCTRL->PCLKSR.bit.OSC8MRDY) {
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}
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/* Use 8Mhz clock as gclk_main to allow switching between clocks
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* when using bootloaders
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*/
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GCLK->GENDIV.reg = GCLK_GENDIV_ID(0)
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| GCLK_GENDIV_DIV(0);
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while (GCLK->STATUS.bit.SYNCBUSY) {
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}
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GCLK->GENCTRL.reg = GCLK_GENCTRL_ID(0)
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| GCLK_GENCTRL_SRC_OSC8M
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| GCLK_GENCTRL_IDC
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| GCLK_GENCTRL_GENEN;
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while (GCLK->STATUS.bit.SYNCBUSY) {
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}
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}
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#endif
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#if !CONFIG_SOC_ATMEL_SAMD_OSC32K || CONFIG_SOC_ATMEL_SAMD_DEFAULT_AS_MAIN
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#define osc32k_init()
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