boards: nucleo_f446re: Use dts for clocks configuration
Convert board to use of device tree for clocks configuration. Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
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2 changed files with 24 additions and 23 deletions
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@ -43,6 +43,29 @@
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};
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};
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&clk_hse {
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hse-bypass;
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clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
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status = "okay";
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};
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&pll {
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div-m = <8>;
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mul-n = <384>;
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div-p = <4>;
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div-q = <8>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(96)>;
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ahb-prescaler = <1>;
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apb1-prescaler = <2>;
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apb2-prescaler = <1>;
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};
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&usart1 {
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pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
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current-speed = <115200>;
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@ -2,8 +2,6 @@
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CONFIG_SOC_SERIES_STM32F4X=y
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CONFIG_SOC_STM32F446XX=y
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# 96MHz system clock (highest value to get a precise USB clock)
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=96000000
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# Enable MPU
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CONFIG_ARM_MPU=y
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@ -23,25 +21,5 @@ CONFIG_PINMUX=y
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# enable GPIO
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CONFIG_GPIO=y
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# clock configuration
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# Enable Clocks
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CONFIG_CLOCK_CONTROL=y
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# Clock configuration for Cube Clock control driver
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CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
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CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
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# use HSE as PLL input
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CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
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# however, the board does not have an external oscillator, so just use
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# the 8MHz clock signal coming from integrated STLink
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CONFIG_CLOCK_STM32_HSE_BYPASS=y
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# produce 84MHz clock at PLL output
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CONFIG_CLOCK_STM32_PLL_M_DIVISOR=8
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CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=384
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CONFIG_CLOCK_STM32_PLL_P_DIVISOR=4
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CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=8
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CONFIG_CLOCK_STM32_AHB_PRESCALER=1
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# APB1 clock must not exceed 50MHz limit
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CONFIG_CLOCK_STM32_APB1_PRESCALER=2
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CONFIG_CLOCK_STM32_APB2_PRESCALER=1
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