timer: litex_timer: Add and use register names
Adds addresses and names for individual CSR registers to device tree. This way timer driver no longer depends on CSR data width being 8 bits. Also when register names their number changes, then overlay generated by LiteX will be incompatible with one defined here. This should make finding breaking changes easier. I also updated register names to those used in current LiteX and appended `_ADDR` suffix to defines which lacked them. Because register `total` was renamed to `value` and `update_total` to `update_value` I updated variables accordingly as well. Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
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2 changed files with 38 additions and 23 deletions
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@ -13,20 +13,20 @@
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#include <spinlock.h>
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#include <spinlock.h>
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#include <drivers/timer/system_timer.h>
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#include <drivers/timer/system_timer.h>
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#define TIMER_BASE DT_INST_REG_ADDR(0)
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#define TIMER_LOAD_ADDR DT_INST_REG_ADDR_BY_NAME(0, load)
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#define TIMER_LOAD_ADDR ((TIMER_BASE) + 0x00)
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#define TIMER_RELOAD_ADDR DT_INST_REG_ADDR_BY_NAME(0, reload)
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#define TIMER_RELOAD_ADDR ((TIMER_BASE) + 0x10)
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#define TIMER_EN_ADDR DT_INST_REG_ADDR_BY_NAME(0, en)
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#define TIMER_EN_ADDR ((TIMER_BASE) + 0x20)
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#define TIMER_UPDATE_VALUE_ADDR DT_INST_REG_ADDR_BY_NAME(0, update_value)
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#define TIMER_EV_PENDING_ADDR ((TIMER_BASE) + 0x3c)
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#define TIMER_VALUE_ADDR DT_INST_REG_ADDR_BY_NAME(0, value)
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#define TIMER_EV_ENABLE_ADDR ((TIMER_BASE) + 0x40)
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#define TIMER_EV_STATUS_ADDR DT_INST_REG_ADDR_BY_NAME(0, ev_status)
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#define TIMER_TOTAL_UPDATE ((TIMER_BASE) + 0x44)
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#define TIMER_EV_PENDING_ADDR DT_INST_REG_ADDR_BY_NAME(0, ev_pending)
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#define TIMER_TOTAL ((TIMER_BASE) + 0x48)
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#define TIMER_EV_ENABLE_ADDR DT_INST_REG_ADDR_BY_NAME(0, ev_enable)
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#define TIMER_EV 0x1
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#define TIMER_EV 0x1
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#define TIMER_IRQ DT_INST_IRQN(0)
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#define TIMER_IRQ DT_INST_IRQN(0)
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#define TIMER_DISABLE 0x0
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#define TIMER_DISABLE 0x0
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#define TIMER_ENABLE 0x1
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#define TIMER_ENABLE 0x1
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#define UPDATE_TOTAL 0x1
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#define TIMER_UPDATE_VALUE 0x1
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static void litex_timer_irq_handler(const void *device)
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static void litex_timer_irq_handler(const void *device)
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{
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{
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@ -41,29 +41,29 @@ static void litex_timer_irq_handler(const void *device)
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uint32_t sys_clock_cycle_get_32(void)
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uint32_t sys_clock_cycle_get_32(void)
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{
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{
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static struct k_spinlock lock;
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static struct k_spinlock lock;
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uint32_t timer_total;
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uint32_t timer_value;
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k_spinlock_key_t key = k_spin_lock(&lock);
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k_spinlock_key_t key = k_spin_lock(&lock);
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litex_write8(UPDATE_TOTAL, TIMER_TOTAL_UPDATE);
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litex_write8(TIMER_UPDATE_VALUE, TIMER_UPDATE_VALUE_ADDR);
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timer_total = (uint32_t)litex_read64(TIMER_TOTAL);
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timer_value = (uint32_t)litex_read64(TIMER_VALUE_ADDR);
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k_spin_unlock(&lock, key);
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k_spin_unlock(&lock, key);
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return timer_total;
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return timer_value;
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}
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}
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uint64_t sys_clock_cycle_get_64(void)
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uint64_t sys_clock_cycle_get_64(void)
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{
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{
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static struct k_spinlock lock;
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static struct k_spinlock lock;
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uint64_t timer_total;
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uint64_t timer_value;
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k_spinlock_key_t key = k_spin_lock(&lock);
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k_spinlock_key_t key = k_spin_lock(&lock);
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litex_write8(UPDATE_TOTAL, TIMER_TOTAL_UPDATE);
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litex_write8(TIMER_UPDATE_VALUE, TIMER_UPDATE_VALUE_ADDR);
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timer_total = litex_read64(TIMER_TOTAL);
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timer_value = litex_read64(TIMER_VALUE_ADDR);
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k_spin_unlock(&lock, key);
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k_spin_unlock(&lock, key);
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return timer_total;
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return timer_value;
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}
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}
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/* tickless kernel is not supported */
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/* tickless kernel is not supported */
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@ -65,8 +65,23 @@
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compatible = "litex,timer0";
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compatible = "litex,timer0";
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interrupt-parent = <&intc0>;
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interrupt-parent = <&intc0>;
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interrupts = <1 0>;
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interrupts = <1 0>;
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reg = <0xe0002800 0x40>;
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reg = <0xe0002800 0x10
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reg-names = "control";
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0xe0002810 0x10
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0xe0002820 0x4
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0xe0002824 0x4
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0xe0002828 0x10
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0xe0002838 0x4
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0xe000283c 0x4
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0xe0002840 0x4>;
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reg-names =
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"load",
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"reload",
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"en",
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"update_value",
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"value",
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"ev_status",
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"ev_pending",
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"ev_enable";
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label = "timer0";
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label = "timer0";
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status = "disabled";
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status = "disabled";
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};
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};
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