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timer: litex_timer: Add and use register names

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Adds addresses and names for individual CSR registers to device tree.
This way timer driver no longer depends on CSR data width being 8 bits.
Also when register names their number changes, then overlay generated by
LiteX will be incompatible with one defined here.
This should make finding breaking changes easier.

I also updated register names to those used in current LiteX and
appended `_ADDR` suffix to defines which lacked them.

Because register `total` was renamed to `value` and `update_total` to
`update_value` I updated variables accordingly as well.

Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
This commit is contained in:
Michal Sieron 2022-04-11 14:53:53 +02:00 • committed by Carles Cufí
commit e8e88dead9
2 changed files with 38 additions and 23 deletions
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42
drivers/timer/litex_timer.c
View file

@ -13,20 +13,20 @@
#include <spinlock.h>
#include <drivers/timer/system_timer.h>
#define TIMER_BASE DT_INST_REG_ADDR(0)
#define TIMER_LOAD_ADDR ((TIMER_BASE) + 0x00)
#define TIMER_RELOAD_ADDR ((TIMER_BASE) + 0x10)
#define TIMER_EN_ADDR ((TIMER_BASE) + 0x20)
#define TIMER_EV_PENDING_ADDR ((TIMER_BASE) + 0x3c)
#define TIMER_EV_ENABLE_ADDR ((TIMER_BASE) + 0x40)
#define TIMER_TOTAL_UPDATE ((TIMER_BASE) + 0x44)
#define TIMER_TOTAL ((TIMER_BASE) + 0x48)
#define TIMER_LOAD_ADDR DT_INST_REG_ADDR_BY_NAME(0, load)
#define TIMER_RELOAD_ADDR DT_INST_REG_ADDR_BY_NAME(0, reload)
#define TIMER_EN_ADDR DT_INST_REG_ADDR_BY_NAME(0, en)
#define TIMER_UPDATE_VALUE_ADDR DT_INST_REG_ADDR_BY_NAME(0, update_value)
#define TIMER_VALUE_ADDR DT_INST_REG_ADDR_BY_NAME(0, value)
#define TIMER_EV_STATUS_ADDR DT_INST_REG_ADDR_BY_NAME(0, ev_status)
#define TIMER_EV_PENDING_ADDR DT_INST_REG_ADDR_BY_NAME(0, ev_pending)
#define TIMER_EV_ENABLE_ADDR DT_INST_REG_ADDR_BY_NAME(0, ev_enable)
#define TIMER_EV 0x1
#define TIMER_IRQ DT_INST_IRQN(0)
#define TIMER_DISABLE 0x0
#define TIMER_ENABLE 0x1
#define UPDATE_TOTAL 0x1
#define TIMER_EV 0x1
#define TIMER_IRQ DT_INST_IRQN(0)
#define TIMER_DISABLE 0x0
#define TIMER_ENABLE 0x1
#define TIMER_UPDATE_VALUE 0x1
static void litex_timer_irq_handler(const void *device)
{
@ -41,29 +41,29 @@ static void litex_timer_irq_handler(const void *device)
uint32_t sys_clock_cycle_get_32(void)
{
static struct k_spinlock lock;
uint32_t timer_total;
uint32_t timer_value;
k_spinlock_key_t key = k_spin_lock(&lock);
litex_write8(UPDATE_TOTAL, TIMER_TOTAL_UPDATE);
timer_total = (uint32_t)litex_read64(TIMER_TOTAL);
litex_write8(TIMER_UPDATE_VALUE, TIMER_UPDATE_VALUE_ADDR);
timer_value = (uint32_t)litex_read64(TIMER_VALUE_ADDR);
k_spin_unlock(&lock, key);
return timer_total;
return timer_value;
}
uint64_t sys_clock_cycle_get_64(void)
{
static struct k_spinlock lock;
uint64_t timer_total;
uint64_t timer_value;
k_spinlock_key_t key = k_spin_lock(&lock);
litex_write8(UPDATE_TOTAL, TIMER_TOTAL_UPDATE);
timer_total = litex_read64(TIMER_TOTAL);
litex_write8(TIMER_UPDATE_VALUE, TIMER_UPDATE_VALUE_ADDR);
timer_value = litex_read64(TIMER_VALUE_ADDR);
k_spin_unlock(&lock, key);
return timer_total;
return timer_value;
}
/* tickless kernel is not supported */