michaelh/zephyr
1
0
Fork 0
Code Releases Activity

dts: stm32: Populate gpio nodes for stm32f4 series

Browse source 
Introduce gpio nodes in stm32f4 dtsi files

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2017-11-10 16:04:55 +01:00 • committed by Kumar Gala
commit e7ab1d306b
4 changed files with 136 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

56
dts/arm/st/stm32f4.dtsi
View file

@ -59,7 +59,61 @@
compatible = "st,stm32-pinmux"; compatible = "st,stm32-pinmux";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
reg = <0x40020000 0x1C00>; reg = <0x40020000 0x2000>;
gpioa: gpio@40020000 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40020000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000001>;
label = "GPIOA";
};
gpiob: gpio@40020400 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40020400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000002>;
label = "GPIOB";
};
gpioc: gpio@40020800 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40020800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000004>;
label = "GPIOC";
};
gpiod: gpio@40020c00 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40020c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000008>;
label = "GPIOD";
};
gpioe: gpio@40021000 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40021000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000010>;
label = "GPIOE";
};
gpioh: gpio@40021c00 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40021c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000080>;
label = "GPIOH";
};
}; };

38
dts/arm/st/stm32f405.dtsi
View file

@ -15,7 +15,43 @@
soc { soc {
pinctrl: pin-controller { pinctrl: pin-controller {
reg = <0x40020000 0x2800>; reg = <0x40020000 0x2400>;
gpiof: gpio@40021400 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40021400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000020>;
label = "GPIOF";
};
gpiog: gpio@40021800 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40021800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000040>;
label = "GPIOG";
};
gpioh: gpio@40021c00 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40021c00 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000040>;
label = "GPIOH";
};
gpioi: gpio@40022000 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40022000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000100>;
label = "GPIOI";
};
}; };
usart3: serial@40004800 { usart3: serial@40004800 {

22
dts/arm/st/stm32f412.dtsi
View file

@ -9,6 +9,28 @@
/ { / {
soc { soc {
pinctrl: pin-controller {
reg = <0x40020000 0x1c00>;
gpiof: gpio@40021400 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40021400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000020>;
label = "GPIOF";
};
gpiog: gpio@40021800 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40021800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000040>;
label = "GPIOG";
};
};
usart3: serial@40004800 { usart3: serial@40004800 {
compatible = "st,stm32-usart", "st,stm32-uart"; compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004800 0x400>; reg = <0x40004800 0x400>;

22
dts/arm/st/stm32f429.dtsi
View file

@ -8,6 +8,28 @@
/ { / {
soc { soc {
pinctrl: pin-controller {
reg = <0x40020000 0x2C00>;
gpioj: gpio@40022400 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40022400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000200>;
label = "GPIOJ";
};
gpiok: gpio@40022800 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x40022800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000400>;
label = "GPIOK";
};
};
uart7: serial@40007800 { uart7: serial@40007800 {
compatible = "st,stm32-uart"; compatible = "st,stm32-uart";
reg = <0x40007800 0x400>; reg = <0x40007800 0x400>;