From e7a60e30b93131c414cb2525b0cb80ac7cf535a9 Mon Sep 17 00:00:00 2001
From: Erwan Gouriou <erwan.gouriou@linaro.org>
Date: Mon, 23 Jan 2023 11:59:42 +0100
Subject: [PATCH] boards: stm32h747i_disco_m7: Fix USB domain clock

On board stm32h747i_disco_m7, USB clock is updated to enable USB1ULPI
clock.
Doing so, it should not delete 48MHz domain clock setting.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
---
 boards/arm/stm32h747i_disco/stm32h747i_disco_m7.dts | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/boards/arm/stm32h747i_disco/stm32h747i_disco_m7.dts b/boards/arm/stm32h747i_disco/stm32h747i_disco_m7.dts
index 4db5f2b3103..8d34215df3e 100644
--- a/boards/arm/stm32h747i_disco/stm32h747i_disco_m7.dts
+++ b/boards/arm/stm32h747i_disco/stm32h747i_disco_m7.dts
@@ -190,7 +190,8 @@ zephyr_udc0: &usbotg_hs {
 	pinctrl-names = "default";
 	maximum-speed = "high-speed";
 	/* Include the USB1ULPIEN clock enable bit */
-	clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x06000000>;
+	clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x06000000>,
+		 <&rcc STM32_SRC_HSI48 USB_SEL(3)>;
 	phys = <&otghs_ulpi_phy>;
 	status = "okay";
 };