From e744c53fc0ba6b5eb8a48f420bd3a45e117872a7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Benjamin=20Cab=C3=A9?= Date: Sat, 7 Jun 2025 21:00:44 +0200 Subject: [PATCH] drivers: serial: fix Rx pin configuration in lpuart_esp32 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Updated the Rx pin configuration in the lpuart_esp32 driver to fix a typo and use correct MUX function. Signed-off-by: Benjamin Cabé --- drivers/serial/lpuart_esp32.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/serial/lpuart_esp32.c b/drivers/serial/lpuart_esp32.c index 8e53a4f638b..5c0f04c71fa 100644 --- a/drivers/serial/lpuart_esp32.c +++ b/drivers/serial/lpuart_esp32.c @@ -144,7 +144,7 @@ static void lp_uart_esp32_set_pin(const struct device *dev) lp_uart_esp32_config_io(cfg->tx_io_num, RTC_GPIO_MODE_OUTPUT_ONLY, LP_U0TXD_MUX_FUNC); /* Configure Rx Pin */ - lp_uart_esp32_config_io(cfg->rx_io_num, RTC_GPIO_MODE_INPUT_ONLY, LP_U0RXD_GPIO_NUM); + lp_uart_esp32_config_io(cfg->rx_io_num, RTC_GPIO_MODE_INPUT_ONLY, LP_U0RXD_MUX_FUNC); /* Configure RTS Pin */ lp_uart_esp32_config_io(cfg->rts_io_num, RTC_GPIO_MODE_OUTPUT_ONLY, LP_U0RTS_MUX_FUNC);