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soc: arc: Use new dts macros in linker scripts and arc_mpu_regions

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Convert linker scripts and arc_mpu_regions.c setup to use new
devicetree.h macros to extract the base address and size of the various
memory regions (DDR, SRAM, FLASH, DCCM, ICCM).  We also remove the
scaling up and down since DT_REG_SIZE() returns the value in bytes.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2020-04-30 09:34:04 -05:00 • committed by Kumar Gala
commit e7332f924b
14 changed files with 76 additions and 125 deletions
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12
boards/arc/em_starterkit/arc_mpu_regions.c
View file

@ -14,18 +14,18 @@
* All regions not listed here are shared by secure world and normal world. * All regions not listed here are shared by secure world and normal world.
*/ */
static struct arc_mpu_region mpu_regions[] = { static struct arc_mpu_region mpu_regions[] = {
#if DT_ICCM_SIZE > 0 #if DT_REG_SIZE(DT_INST(0, arc_iccm)) > 0
/* Region ICCM */ /* Region ICCM */
MPU_REGION_ENTRY("ICCM", MPU_REGION_ENTRY("ICCM",
DT_ICCM_BASE_ADDRESS, DT_REG_ADDR(DT_INST(0, arc_iccm)),
DT_ICCM_SIZE * 1024, DT_REG_SIZE(DT_INST(0, arc_iccm)),
REGION_ROM_ATTR), REGION_ROM_ATTR),
#endif #endif
#if DT_DCCM_SIZE > 0 #if DT_REG_SIZE(DT_INST(0, arc_dccm)) > 0
/* Region DCCM */ /* Region DCCM */
MPU_REGION_ENTRY("DCCM", MPU_REGION_ENTRY("DCCM",
DT_DCCM_BASE_ADDRESS, DT_REG_ADDR(DT_INST(0, arc_dccm)),
DT_DCCM_SIZE * 1024, DT_REG_SIZE(DT_INST(0, arc_dccm)),
REGION_KERNEL_RAM_ATTR | REGION_DYNAMIC), REGION_KERNEL_RAM_ATTR | REGION_DYNAMIC),
#endif #endif

8
boards/arc/emsdp/arc_mpu_regions.c
View file

@ -12,13 +12,13 @@
static struct arc_mpu_region mpu_regions[] = { static struct arc_mpu_region mpu_regions[] = {
/* Region ICCM */ /* Region ICCM */
MPU_REGION_ENTRY("ICCM", MPU_REGION_ENTRY("ICCM",
DT_ICCM_BASE_ADDRESS, DT_REG_ADDR(DT_INST(0, arc_iccm)),
DT_ICCM_SIZE * 1024, DT_REG_SIZE(DT_INST(0, arc_iccm)),
REGION_ROM_ATTR), REGION_ROM_ATTR),
/* Region DCCM */ /* Region DCCM */
MPU_REGION_ENTRY("DCCM", MPU_REGION_ENTRY("DCCM",
DT_DCCM_BASE_ADDRESS, DT_REG_ADDR(DT_INST(0, arc_dccm)),
DT_DCCM_SIZE * 1024, DT_REG_SIZE(DT_INST(0, arc_dccm)),
REGION_KERNEL_RAM_ATTR | REGION_DYNAMIC), REGION_KERNEL_RAM_ATTR | REGION_DYNAMIC),
/* Region DDR RAM */ /* Region DDR RAM */
MPU_REGION_ENTRY("SRAM", MPU_REGION_ENTRY("SRAM",

8
boards/arc/iotdk/arc_mpu_regions.c
View file

@ -12,13 +12,13 @@
static struct arc_mpu_region mpu_regions[] = { static struct arc_mpu_region mpu_regions[] = {
/* Region ICCM */ /* Region ICCM */
MPU_REGION_ENTRY("ICCM", MPU_REGION_ENTRY("ICCM",
DT_ICCM_BASE_ADDRESS, DT_REG_ADDR(DT_INST(0, arc_iccm)),
DT_ICCM_SIZE * 1024, DT_REG_SIZE(DT_INST(0, arc_iccm)),
REGION_ROM_ATTR), REGION_ROM_ATTR),
/* Region DCCM */ /* Region DCCM */
MPU_REGION_ENTRY("DCCM", MPU_REGION_ENTRY("DCCM",
DT_DCCM_BASE_ADDRESS, DT_REG_ADDR(DT_INST(0, arc_dccm)),
DT_DCCM_SIZE * 1024, DT_REG_SIZE(DT_INST(0, arc_dccm)),
REGION_KERNEL_RAM_ATTR), REGION_KERNEL_RAM_ATTR),
/* Region DDR RAM */ /* Region DDR RAM */
MPU_REGION_ENTRY("SRAM", MPU_REGION_ENTRY("SRAM",

12
boards/arc/nsim/arc_mpu_regions.c
View file

@ -14,18 +14,18 @@
* All regions not listed here are shared by secure world and normal world. * All regions not listed here are shared by secure world and normal world.
*/ */
static struct arc_mpu_region mpu_regions[] = { static struct arc_mpu_region mpu_regions[] = {
#if DT_ICCM_SIZE > 0 #if DT_REG_SIZE(DT_INST(0, arc_iccm)) > 0
/* Region ICCM */ /* Region ICCM */
MPU_REGION_ENTRY("ICCM", MPU_REGION_ENTRY("ICCM",
DT_ICCM_BASE_ADDRESS, DT_REG_ADDR(DT_INST(0, arc_iccm)),
DT_ICCM_SIZE * 1024, DT_REG_SIZE(DT_INST(0, arc_iccm)),
REGION_ROM_ATTR), REGION_ROM_ATTR),
#endif #endif
#if DT_DCCM_SIZE > 0 #if DT_REG_SIZE(DT_INST(0, arc_dccm)) > 0
/* Region DCCM */ /* Region DCCM */
MPU_REGION_ENTRY("DCCM", MPU_REGION_ENTRY("DCCM",
DT_DCCM_BASE_ADDRESS, DT_REG_ADDR(DT_INST(0, arc_dccm)),
DT_DCCM_SIZE * 1024, DT_REG_SIZE(DT_INST(0, arc_dccm)),
REGION_KERNEL_RAM_ATTR | REGION_DYNAMIC), REGION_KERNEL_RAM_ATTR | REGION_DYNAMIC),
#endif #endif

8
include/arch/arc/v2/linker.ld
View file

@ -62,16 +62,16 @@ ENTRY(CONFIG_KERNEL_ENTRY)
MEMORY { MEMORY {
#ifdef FLASH_START #ifdef FLASH_START
FLASH (rx) : ORIGIN = FLASH_START, LENGTH = FLASH_SIZE*1k FLASH (rx) : ORIGIN = FLASH_START, LENGTH = FLASH_SIZE
#endif #endif
#ifdef ICCM_START #ifdef ICCM_START
ICCM (rwx) : ORIGIN = ICCM_START, LENGTH = ICCM_SIZE*1k ICCM (rwx) : ORIGIN = ICCM_START, LENGTH = ICCM_SIZE
#endif #endif
#ifdef SRAM_START #ifdef SRAM_START
SRAM (rwx) : ORIGIN = SRAM_START, LENGTH = SRAM_SIZE*1k SRAM (rwx) : ORIGIN = SRAM_START, LENGTH = SRAM_SIZE
#endif #endif
#ifdef DCCM_START #ifdef DCCM_START
DCCM (rw) : ORIGIN = DCCM_START, LENGTH = DCCM_SIZE*1k DCCM (rw) : ORIGIN = DCCM_START, LENGTH = DCCM_SIZE
#endif #endif
/* Used by and documented in include/linker/intlist.ld */ /* Used by and documented in include/linker/intlist.ld */
IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K IDT_LIST (wx) : ORIGIN = 0xFFFFF7FF, LENGTH = 2K

8
soc/arc/snps_arc_hsdk/linker.ld
View file

@ -14,10 +14,10 @@
/* /*
* SRAM base address and size * SRAM base address and size
*/ */
#if defined(CONFIG_SRAM_BASE_ADDRESS) && (CONFIG_SRAM_SIZE > 0) #if DT_NODE_HAS_PROP(DT_CHOSEN(zephyr_sram), reg) && \
#define SRAM_START CONFIG_SRAM_BASE_ADDRESS (DT_REG_SIZE(DT_CHOSEN(zephyr_sram)) > 0)
#define SRAM_SIZE CONFIG_SRAM_SIZE #define SRAM_START DT_REG_ADDR(DT_CHOSEN(zephyr_sram))
#define SRAM_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_sram))
#endif #endif
#include <arch/arc/v2/linker.ld> #include <arch/arc/v2/linker.ld>

16
soc/arc/snps_arc_iot/dts_fixup.h
View file

@ -1,16 +0,0 @@
/*
* Copyright (c) 2018 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*/
/* SoC level DTS fixup file */
/* CCM configuration */
#define DT_DCCM_BASE_ADDRESS DT_ARC_DCCM_80000000_BASE_ADDRESS
#define DT_DCCM_SIZE (DT_ARC_DCCM_80000000_SIZE >> 10)
#define DT_ICCM_BASE_ADDRESS DT_ARC_ICCM_20000000_BASE_ADDRESS
#define DT_ICCM_SIZE (DT_ARC_ICCM_20000000_SIZE >> 10)
/* End of SoC Level DTS fixup file */

30
soc/arc/snps_arc_iot/linker.ld
View file

@ -15,30 +15,32 @@
* SRAM base address and size * SRAM base address and size
* *
*/ */
#if defined(CONFIG_SRAM_BASE_ADDRESS) && (CONFIG_SRAM_SIZE > 0) #if DT_NODE_HAS_PROP(DT_CHOSEN(zephyr_sram), reg) && \
#define SRAM_START CONFIG_SRAM_BASE_ADDRESS (DT_REG_SIZE(DT_CHOSEN(zephyr_sram)) > 0)
#define SRAM_SIZE CONFIG_SRAM_SIZE #define SRAM_START DT_REG_ADDR(DT_CHOSEN(zephyr_sram))
#define SRAM_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_sram))
#endif #endif
#if defined(CONFIG_FLASH_BASE_ADDRESS) && (CONFIG_FLASH_SIZE > 0) #if DT_NODE_HAS_PROP(DT_CHOSEN(zephyr_flash), reg) && \
#define FLASH_START CONFIG_FLASH_BASE_ADDRESS (DT_REG_SIZE(DT_CHOSEN(zephyr_flash)) > 0)
#define FLASH_SIZE CONFIG_FLASH_SIZE #define FLASH_START DT_REG_ADDR(DT_CHOSEN(zephyr_flash))
#define FLASH_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_flash))
#endif #endif
/* Instruction Closely Coupled Memory (ICCM) base address and size */ /* Instruction Closely Coupled Memory (ICCM) base address and size */
#if defined(DT_ICCM_BASE_ADDRESS) && (DT_ICCM_SIZE > 0) #if DT_NODE_HAS_PROP(DT_INST(0, arc_iccm), reg) && \
#define ICCM_START DT_ICCM_BASE_ADDRESS (DT_REG_SIZE(DT_INST(0, arc_iccm)) > 0)
#define ICCM_SIZE DT_ICCM_SIZE #define ICCM_START DT_REG_ADDR(DT_INST(0, arc_iccm))
#define ICCM_SIZE DT_REG_SIZE(DT_INST(0, arc_iccm))
#endif #endif
/* /*
* DCCM base address and size. DCCM is the data memory. * DCCM base address and size. DCCM is the data memory.
*/ */
/* Data Closely Coupled Memory (DCCM) base address and size */ #if DT_NODE_HAS_PROP(DT_INST(0, arc_dccm), reg) && \
#if defined(DT_DCCM_BASE_ADDRESS) && (DT_DCCM_SIZE > 0) (DT_REG_SIZE(DT_INST(0, arc_dccm)) > 0)
#define DCCM_START DT_DCCM_BASE_ADDRESS #define DCCM_START DT_REG_ADDR(DT_INST(0, arc_dccm))
#define DCCM_SIZE DT_DCCM_SIZE #define DCCM_SIZE DT_REG_SIZE(DT_INST(0, arc_dccm))
#endif #endif
#include <arch/arc/v2/linker.ld> #include <arch/arc/v2/linker.ld>

16
soc/arc/snps_emsdp/dts_fixup.h
View file

@ -1,16 +0,0 @@
/*
* Copyright (c) 2018 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*/
/* SoC level DTS fixup file */
/* CCM configuration */
#define DT_DCCM_BASE_ADDRESS DT_ARC_DCCM_80000000_BASE_ADDRESS
#define DT_DCCM_SIZE (DT_ARC_DCCM_80000000_SIZE >> 10)
#define DT_ICCM_BASE_ADDRESS DT_ARC_ICCM_60000000_BASE_ADDRESS
#define DT_ICCM_SIZE (DT_ARC_ICCM_60000000_SIZE >> 10)
/* End of SoC Level DTS fixup file */

21
soc/arc/snps_emsdp/linker.ld
View file

@ -15,25 +15,28 @@
* SRAM base address and size * SRAM base address and size
* *
*/ */
#if defined(CONFIG_SRAM_BASE_ADDRESS) && (CONFIG_SRAM_SIZE > 0) #if DT_NODE_HAS_PROP(DT_CHOSEN(zephyr_sram), reg) && \
#define SRAM_START CONFIG_SRAM_BASE_ADDRESS (DT_REG_SIZE(DT_CHOSEN(zephyr_sram)) > 0)
#define SRAM_SIZE CONFIG_SRAM_SIZE #define SRAM_START DT_REG_ADDR(DT_CHOSEN(zephyr_sram))
#define SRAM_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_sram))
#endif #endif
/* Instruction Closely Coupled Memory (ICCM) base address and size */ /* Instruction Closely Coupled Memory (ICCM) base address and size */
#if defined(DT_ICCM_BASE_ADDRESS) && (DT_ICCM_SIZE > 0) #if DT_NODE_HAS_PROP(DT_INST(0, arc_iccm), reg) && \
#define ICCM_START DT_ICCM_BASE_ADDRESS (DT_REG_SIZE(DT_INST(0, arc_iccm)) > 0)
#define ICCM_SIZE DT_ICCM_SIZE #define ICCM_START DT_REG_ADDR(DT_INST(0, arc_iccm))
#define ICCM_SIZE DT_REG_SIZE(DT_INST(0, arc_iccm))
#endif #endif
/* /*
* DCCM base address and size. DCCM is the data memory. * DCCM base address and size. DCCM is the data memory.
*/ */
/* Data Closely Coupled Memory (DCCM) base address and size */ /* Data Closely Coupled Memory (DCCM) base address and size */
#if defined(DT_DCCM_BASE_ADDRESS) && (DT_DCCM_SIZE > 0) #if DT_NODE_HAS_PROP(DT_INST(0, arc_dccm), reg) && \
#define DCCM_START DT_DCCM_BASE_ADDRESS (DT_REG_SIZE(DT_INST(0, arc_dccm)) > 0)
#define DCCM_SIZE DT_DCCM_SIZE #define DCCM_START DT_REG_ADDR(DT_INST(0, arc_dccm))
#define DCCM_SIZE DT_REG_SIZE(DT_INST(0, arc_dccm))
#endif #endif
#include <arch/arc/v2/linker.ld> #include <arch/arc/v2/linker.ld>

15
soc/arc/snps_emsk/dts_fixup.h
View file

@ -1,15 +0,0 @@
/* SPDX-License-Identifier: Apache-2.0 */
/* SoC level DTS fixup file */
/* CCM configuration */
#define DT_DCCM_BASE_ADDRESS DT_REG_ADDR(DT_INST(0, arc_dccm))
#define DT_DCCM_SIZE (DT_REG_SIZE(DT_INST(0, arc_dccm)) >> 10)
#define DT_ICCM_BASE_ADDRESS DT_REG_ADDR(DT_INST(0, arc_iccm))
#define DT_ICCM_SIZE (DT_REG_SIZE(DT_INST(0, arc_iccm)) >> 10)
#define DT_DDR_BASE_ADDRESS DT_REG_ADDR(DT_NODELABEL(ddr0))
#define DT_DDR_SIZE (DT_REG_SIZE(DT_NODELABEL(ddr0)) >> 10)
/* End of SoC Level DTS fixup file */

21
soc/arc/snps_emsk/linker.ld
View file

@ -17,24 +17,27 @@
* DRAM includes the exception vector table at reset, which is at * DRAM includes the exception vector table at reset, which is at
* the beginning of the region. * the beginning of the region.
*/ */
#if defined(DT_DDR_BASE_ADDRESS) && (DT_DDR_SIZE > 0) #if DT_NODE_HAS_PROP(DT_NODELABEL(ddr0), reg) && \
#define SRAM_START DT_DDR_BASE_ADDRESS (DT_REG_SIZE(DT_NODELABEL(ddr0)) > 0)
#define SRAM_SIZE DT_DDR_SIZE #define SRAM_START DT_REG_ADDR(DT_NODELABEL(ddr0))
#define SRAM_SIZE DT_REG_SIZE(DT_NODELABEL(ddr0))
#endif #endif
/* Instruction Closely Coupled Memory (ICCM) base address and size */ /* Instruction Closely Coupled Memory (ICCM) base address and size */
#if defined(DT_ICCM_BASE_ADDRESS) && (DT_ICCM_SIZE > 0) #if DT_NODE_HAS_PROP(DT_INST(0, arc_iccm), reg) && \
#define ICCM_START DT_ICCM_BASE_ADDRESS (DT_REG_SIZE(DT_INST(0, arc_iccm)) > 0)
#define ICCM_SIZE DT_ICCM_SIZE #define ICCM_START DT_REG_ADDR(DT_INST(0, arc_iccm))
#define ICCM_SIZE DT_REG_SIZE(DT_INST(0, arc_iccm))
#endif #endif
/* /*
* DCCM base address and size. DCCM is the data memory. * DCCM base address and size. DCCM is the data memory.
*/ */
/* Data Closely Coupled Memory (DCCM) base address and size */ /* Data Closely Coupled Memory (DCCM) base address and size */
#if defined(DT_DCCM_BASE_ADDRESS) && (DT_DCCM_SIZE > 0) #if DT_NODE_HAS_PROP(DT_INST(0, arc_dccm), reg) && \
#define DCCM_START DT_DCCM_BASE_ADDRESS (DT_REG_SIZE(DT_INST(0, arc_dccm)) > 0)
#define DCCM_SIZE DT_DCCM_SIZE #define DCCM_START DT_REG_ADDR(DT_INST(0, arc_dccm))
#define DCCM_SIZE DT_REG_SIZE(DT_INST(0, arc_dccm))
#endif #endif
#include <arch/arc/v2/linker.ld> #include <arch/arc/v2/linker.ld>

12
soc/arc/snps_nsim/dts_fixup.h
View file

@ -1,12 +0,0 @@
/* SPDX-License-Identifier: Apache-2.0 */
/* SoC level DTS fixup file */
/* CCM configuration */
#define DT_DCCM_BASE_ADDRESS DT_REG_ADDR(DT_INST(0, arc_dccm))
#define DT_DCCM_SIZE (DT_REG_SIZE(DT_INST(0, arc_dccm)) >> 10)
#define DT_ICCM_BASE_ADDRESS DT_REG_ADDR(DT_INST(0, arc_iccm))
#define DT_ICCM_SIZE (DT_REG_SIZE(DT_INST(0, arc_iccm)) >> 10)
/* End of SoC Level DTS fixup file */

14
soc/arc/snps_nsim/linker.ld
View file

@ -12,18 +12,20 @@
#include <autoconf.h> #include <autoconf.h>
/* Instruction Closely Coupled Memory (ICCM) base address and size */ /* Instruction Closely Coupled Memory (ICCM) base address and size */
#if defined(DT_ICCM_BASE_ADDRESS) && (DT_ICCM_SIZE > 0) #if DT_NODE_HAS_PROP(DT_INST(0, arc_iccm), reg) && \
#define ICCM_START DT_ICCM_BASE_ADDRESS (DT_REG_SIZE(DT_INST(0, arc_iccm)) > 0)
#define ICCM_SIZE DT_ICCM_SIZE #define ICCM_START DT_REG_ADDR(DT_INST(0, arc_iccm))
#define ICCM_SIZE DT_REG_SIZE(DT_INST(0, arc_iccm))
#endif #endif
/* /*
* DCCM base address and size. DCCM is the data memory. * DCCM base address and size. DCCM is the data memory.
*/ */
/* Data Closely Coupled Memory (DCCM) base address and size */ /* Data Closely Coupled Memory (DCCM) base address and size */
#if defined(DT_DCCM_BASE_ADDRESS) && (DT_DCCM_SIZE > 0) #if DT_NODE_HAS_PROP(DT_INST(0, arc_dccm), reg) && \
#define DCCM_START DT_DCCM_BASE_ADDRESS (DT_REG_SIZE(DT_INST(0, arc_dccm)) > 0)
#define DCCM_SIZE DT_DCCM_SIZE #define DCCM_START DT_REG_ADDR(DT_INST(0, arc_dccm))
#define DCCM_SIZE DT_REG_SIZE(DT_INST(0, arc_dccm))
#endif #endif
#include <arch/arc/v2/linker.ld> #include <arch/arc/v2/linker.ld>