From e6ec77a24327f211ca86d9ed0ee2e237bafb492f Mon Sep 17 00:00:00 2001 From: Georgij Cernysiov Date: Mon, 23 May 2022 16:53:20 +0200 Subject: [PATCH] drivers: flash: spi_nor: adds missing PP and Read cmd defines Adds: * PP and Read 4-Byte command defines * PP 1-1-2 define * Missing 1-2-2 (0xBB) and Read Fast (0x0B) command defines Re-arranges the commands so that they stay in order. Signed-off-by: Georgij Cernysiov --- drivers/flash/spi_nor.h | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/flash/spi_nor.h b/drivers/flash/spi_nor.h index 2e88f278c6e..fb9389bb85d 100644 --- a/drivers/flash/spi_nor.h +++ b/drivers/flash/spi_nor.h @@ -26,12 +26,15 @@ #define SPI_NOR_CMD_RDSR3 0x15 /* Read status register 3 */ #define SPI_NOR_CMD_WRSR3 0x11 /* Write status register 3 */ #define SPI_NOR_CMD_READ 0x03 /* Read data */ +#define SPI_NOR_CMD_READ_FAST 0x0B /* Read data */ #define SPI_NOR_CMD_DREAD 0x3B /* Read data (1-1-2) */ +#define SPI_NOR_CMD_2READ 0xBB /* Read data (1-2-2) */ #define SPI_NOR_CMD_QREAD 0x6B /* Read data (1-1-4) */ #define SPI_NOR_CMD_4READ 0xEB /* Read data (1-4-4) */ #define SPI_NOR_CMD_WREN 0x06 /* Write enable */ #define SPI_NOR_CMD_WRDI 0x04 /* Write disable */ #define SPI_NOR_CMD_PP 0x02 /* Page program */ +#define SPI_NOR_CMD_PP_1_1_2 0xA2 /* Dual Page program (1-1-2) */ #define SPI_NOR_CMD_PP_1_1_4 0x32 /* Quad Page program (1-1-4) */ #define SPI_NOR_CMD_PP_1_4_4 0x38 /* Quad Page program (1-4-4) */ #define SPI_NOR_CMD_RDCR 0x15 /* Read control register */ @@ -49,8 +52,15 @@ #define SPI_NOR_CMD_RESET_EN 0x66 /* Reset Enable */ #define SPI_NOR_CMD_RESET_MEM 0x99 /* Reset Memory */ #define SPI_NOR_CMD_BULKE 0x60 /* Bulk Erase */ -#define SPI_NOR_CMD_PP_4B 0x12 /* Page Program 4 Byte Address */ -#define SPI_NOR_CMD_READ_FAST_4B 0x0C /* Fast Read 4 Byte Address */ +#define SPI_NOR_CMD_READ_4B 0x13 /* Read data 4 Byte Address */ +#define SPI_NOR_CMD_READ_FAST_4B 0x0C /* Fast Read 4 Byte Address */ +#define SPI_NOR_CMD_DREAD_4B 0x3C /* Read data (1-1-2) 4 Byte Address */ +#define SPI_NOR_CMD_2READ_4B 0xBC /* Read data (1-2-2) 4 Byte Address */ +#define SPI_NOR_CMD_QREAD_4B 0x6C /* Read data (1-1-4) 4 Byte Address */ +#define SPI_NOR_CMD_4READ_4B 0xEC /* Read data (1-4-4) 4 Byte Address */ +#define SPI_NOR_CMD_PP_4B 0x12 /* Page Program 4 Byte Address */ +#define SPI_NOR_CMD_PP_1_1_4_4B 0x34 /* Quad Page program (1-1-4) 4 Byte Address */ +#define SPI_NOR_CMD_PP_1_4_4_4B 0x3e /* Quad Page program (1-4-4) 4 Byte Address */ /* Flash octal opcodes */ #define SPI_NOR_OCMD_SE 0x21DE /* Octal Sector erase */ @@ -58,7 +68,7 @@ #define SPI_NOR_OCMD_RDSR 0x05FA /* Octal Read status register */ #define SPI_NOR_OCMD_DTR_RD 0xEE11 /* Octal IO DTR read command */ #define SPI_NOR_OCMD_RD 0xEC13 /* Octal IO read command */ -#define SPI_NOR_OCMD_PAGE_PRG 0x12ED /* Octal Page Prog*/ +#define SPI_NOR_OCMD_PAGE_PRG 0x12ED /* Octal Page Prog */ #define SPI_NOR_OCMD_WREN 0x06F9 /* Octal Write enable */ #define SPI_NOR_OCMD_NOP 0x00FF /* Octal No operation */ #define SPI_NOR_OCMD_RESET_EN 0x6699 /* Octal Reset Enable */