From e66e6b054cee53a9796e995282bfb62b2e991922 Mon Sep 17 00:00:00 2001 From: Ryan QIAN Date: Wed, 9 Jan 2019 14:01:41 +0800 Subject: [PATCH] soc: nxp_imx: rt: fix enet pll initialization config macro name - Update config macro name for enet pll - Update impacted defconfig of RT1052 Signed-off-by: Ryan QIAN --- soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1052 | 3 +++ soc/arm/nxp_imx/rt/soc.c | 5 +++-- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1052 b/soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1052 index 2f154de3a09..97a4c5097cf 100644 --- a/soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1052 +++ b/soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1052 @@ -56,6 +56,9 @@ if NET_L2_ETHERNET config ETH_MCUX def_bool y +config INIT_ENET_PLL + def_bool y + endif # NET_L2_ETHERNET diff --git a/soc/arm/nxp_imx/rt/soc.c b/soc/arm/nxp_imx/rt/soc.c index 9088f6abfce..3767acbfd08 100644 --- a/soc/arm/nxp_imx/rt/soc.c +++ b/soc/arm/nxp_imx/rt/soc.c @@ -34,7 +34,8 @@ const clock_usb_pll_config_t usb1PllConfig = { }; #endif -#ifdef CONFIG_ETH_MCUX_0 +#ifdef CONFIG_INIT_ENET_PLL +/* ENET PLL configuration for RUN mode */ const clock_enet_pll_config_t ethPllConfig = { .enableClkOutput = true, .enableClkOutput25M = false, @@ -81,7 +82,7 @@ static ALWAYS_INLINE void clkInit(void) #ifdef CONFIG_INIT_USB1_PLL CLOCK_InitUsb1Pll(&usb1PllConfig); /* Configure USB1 PLL to 480M */ #endif -#ifdef CONFIG_ETH_MCUX_0 +#ifdef CONFIG_INIT_ENET_PLL CLOCK_InitEnetPll(ðPllConfig); #endif