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boards: frdm_k22f: Fix SPI CS pinmux setting

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The chipselect is wired to PTC4 and is SPI0_PCS0.  Fix pinmux.c and
board docs to correctly reflect this.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2021-04-08 17:25:34 -05:00 • committed by Maureen Helm
commit e62e4f766e
2 changed files with 2 additions and 2 deletions
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2
boards/arm/frdm_k22f/doc/index.rst
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@ -128,7 +128,7 @@ The K22F SoC has five pairs of pinmux/gpio controllers.
+-------+-----------------+---------------------------+ +-------+-----------------+---------------------------+
| PTD3 | UART2_TX | UART BT HCI | | PTD3 | UART2_TX | UART BT HCI |
+-------+-----------------+---------------------------+ +-------+-----------------+---------------------------+
| PTD4 | SPI0_PCS1 | SPI | | PTC4 | SPI0_PCS0 | SPI |
+-------+-----------------+---------------------------+ +-------+-----------------+---------------------------+
| PTD1 | SPI0_SCK | SPI | | PTD1 | SPI0_SCK | SPI |
+-------+-----------------+---------------------------+ +-------+-----------------+---------------------------+

2
boards/arm/frdm_k22f/pinmux.c
View file

@ -78,7 +78,7 @@ static int frdm_k22f_pinmux_init(const struct device *dev)
#if DT_NODE_HAS_STATUS(DT_NODELABEL(spi0), okay) && CONFIG_SPI #if DT_NODE_HAS_STATUS(DT_NODELABEL(spi0), okay) && CONFIG_SPI
/* SPI0 CS0, SCK, SOUT, SIN */ /* SPI0 CS0, SCK, SOUT, SIN */
pinmux_pin_set(portd, 4, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portc, 4, PORT_PCR_MUX(kPORT_MuxAlt2));
pinmux_pin_set(portd, 1, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portd, 1, PORT_PCR_MUX(kPORT_MuxAlt2));
pinmux_pin_set(portd, 2, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portd, 2, PORT_PCR_MUX(kPORT_MuxAlt2));
pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAlt2));