From e59e65dc75e4fc7c359712cd7ad7387c0323eb75 Mon Sep 17 00:00:00 2001 From: Kai Vehmanen Date: Fri, 21 Apr 2023 16:42:26 +0300 Subject: [PATCH] drivers: dai: ssp: fix power-up flow for Intel cAVS platforms A recent commit broke the power-up sequences for other Intel platforms. Fixes: 1e5550d26270 ("intel_adsp: ace20_lnl: ssp: Program new HW registers") Signed-off-by: Kai Vehmanen --- drivers/dai/intel/ssp/ssp.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/dai/intel/ssp/ssp.h b/drivers/dai/intel/ssp/ssp.h index ab3167ca8a5..1d37b9a3335 100644 --- a/drivers/dai/intel/ssp/ssp.h +++ b/drivers/dai/intel/ssp/ssp.h @@ -218,16 +218,18 @@ #define I2SLCTL_OFFSET 0x04 -#ifdef CONFIG_SOC_INTEL_ACE15_MTPM +#if defined(CONFIG_SOC_INTEL_ACE15_MTPM) || defined(CONFIG_SOC_SERIES_INTEL_ADSP_CAVS) #define I2SLCTL_SPA(x) BIT(0 + x) #define I2SLCTL_CPA(x) BIT(8 + x) -#else /* CONFIG_SOC_INTEL_ACE20_LNL */ +#elif defined(CONFIG_SOC_INTEL_ACE20_LNL) #define I2SLCTL_OFLEN BIT(4) #define I2SLCTL_SPA(x) BIT(16 + x) #define I2SLCTL_CPA(x) BIT(23 + x) #define PCMS0CM_OFFSET 0x16 #define PCMS1CM_OFFSET 0x1A -#endif /* CONFIG_SOC_INTEL_ACE15_MTPM */ +#else +#error "Missing ssp definitions" +#endif #define I2CLCTL_MLCS(x) DAI_INTEL_SSP_SET_BITS(30, 27, x) #define SHIM_CLKCTL 0x78