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soc/it8xxx2: disable USB debug path at default

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This change disables USB debug path at default, in order to prevent SoC
from entering debug mode when there is signal toggling on GPH5/GPH6.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
This commit is contained in:
Dino Li 2024-11-19 17:17:47 +08:00 • committed by Benjamin Cabé
commit e59289d899
2 changed files with 7 additions and 0 deletions
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1
soc/ite/ec/common/chip_chipregs.h
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@ -1662,6 +1662,7 @@ struct gctrl_it8xxx2_regs {
/* 0x20: Memory Controller Configuration 3 */ /* 0x20: Memory Controller Configuration 3 */
#define IT8XXX2_GCTRL_SPISLVPFE BIT(6) #define IT8XXX2_GCTRL_SPISLVPFE BIT(6)
/* 0x30: Memory Controller Configuration */ /* 0x30: Memory Controller Configuration */
#define IT8XXX2_GCTRL_USB_DEBUG_EN BIT(7)
#define IT8XXX2_GCTRL_ICACHE_RESET BIT(4) #define IT8XXX2_GCTRL_ICACHE_RESET BIT(4)
/* 0x37: Eflash Protect Lock */ /* 0x37: Eflash Protect Lock */
#define IT8XXX2_GCTRL_EPLR_ENABLE BIT(0) #define IT8XXX2_GCTRL_EPLR_ENABLE BIT(0)

6
soc/ite/ec/it8xxx2/soc.c
View file

@ -387,6 +387,12 @@ static int ite_it8xxx2_init(void)
*/ */
gctrl_regs->GCTRL_WMCR |= BIT(7); gctrl_regs->GCTRL_WMCR |= BIT(7);
/*
* Disable USB debug at default, in order to prevent SoC
* from entering debug mode when there is signal toggling on GPH5/GPH6.
*/
gctrl_regs->GCTRL_MCCR &= ~IT8XXX2_GCTRL_USB_DEBUG_EN;
/* /*
* Disable this feature that can detect pre-define hardware * Disable this feature that can detect pre-define hardware
* target A through I2C0. This is for debugging use, so it * target A through I2C0. This is for debugging use, so it