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boards: nordic: nrf54l15_ns: Change to use common dts partitioning file

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Adds a common vendor dts file specifying the default partition
layout for nRF54L15-based cpuapp_ns board targets and updates boards
to use this common file.

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
This commit is contained in:
Jamie McCrae 2025-06-13 13:37:31 +01:00 • committed by Henrik Brix Andersen
commit e542188ce9
6 changed files with 77 additions and 225 deletions
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48
boards/ezurio/bl54l15_dvk/bl54l15_dvk_nrf54l15_cpuapp_ns.dts
View file

@ -58,51 +58,6 @@
};
};
&cpuapp_rram {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* nRF54L15 has 1524 kB of non volatile memory (RRAM) but the
* last 96kB are reserved for the FLPR MCU.
*
* This static layout needs to be the same with the upstream TF-M layout in the
* header flash_layout.h of the relevant platform. Any updates in the layout
* needs to happen both in the flash_layout.h and in this file at the same time.
*/
slot0_partition: partition@0 {
label = "image-0";
reg = <0x0000000 DT_SIZE_K(512)>;
};
tfm_ps_partition: partition@80000 {
label = "tfm-ps";
reg = <0x00080000 DT_SIZE_K(16)>;
};
tfm_its_partition: partition@84000 {
label = "tfm-its";
reg = <0x00084000 DT_SIZE_K(16)>;
};
tfm_otp_partition: partition@88000 {
label = "tfm-otp";
reg = <0x00088000 DT_SIZE_K(8)>;
};
slot0_ns_partition: partition@8A000 {
label = "image-0-nonsecure";
reg = <0x0008A000 DT_SIZE_K(844)>;
};
storage_partition: partition@15D000 {
label = "storage";
reg = <0x00015D000 DT_SIZE_K(32)>;
};
};
};
&uart30 {
/* Disable so that TF-M can use this UART */
status = "disabled";
@ -112,3 +67,6 @@
pinctrl-1 = <&uart30_sleep>;
pinctrl-names = "default", "sleep";
};
/* Include default memory partition configuration file */
#include <nordic/nrf54l15_ns_partition.dtsi>

48
boards/ezurio/bl54l15u_dvk/bl54l15u_dvk_nrf54l15_cpuapp_ns.dts
View file

@ -58,51 +58,6 @@
};
};
&cpuapp_rram {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* nRF54L15 has 1524 kB of non volatile memory (RRAM) but the
* last 96kB are reserved for the FLPR MCU.
*
* This static layout needs to be the same with the upstream TF-M layout in the
* header flash_layout.h of the relevant platform. Any updates in the layout
* needs to happen both in the flash_layout.h and in this file at the same time.
*/
slot0_partition: partition@0 {
label = "image-0";
reg = <0x0000000 DT_SIZE_K(512)>;
};
tfm_ps_partition: partition@80000 {
label = "tfm-ps";
reg = <0x00080000 DT_SIZE_K(16)>;
};
tfm_its_partition: partition@84000 {
label = "tfm-its";
reg = <0x00084000 DT_SIZE_K(16)>;
};
tfm_otp_partition: partition@88000 {
label = "tfm-otp";
reg = <0x00088000 DT_SIZE_K(8)>;
};
slot0_ns_partition: partition@8A000 {
label = "image-0-nonsecure";
reg = <0x0008A000 DT_SIZE_K(844)>;
};
storage_partition: partition@15D000 {
label = "storage";
reg = <0x00015D000 DT_SIZE_K(32)>;
};
};
};
&uart30 {
/* Disable so that TF-M can use this UART */
status = "disabled";
@ -112,3 +67,6 @@
pinctrl-1 = <&uart30_sleep>;
pinctrl-names = "default", "sleep";
};
/* Include default memory partition configuration file */
#include <nordic/nrf54l15_ns_partition.dtsi>

48
boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp_ns.dts
View file

@ -57,51 +57,6 @@
};
};
&cpuapp_rram {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* nRF54L15 has 1524 kB of non volatile memory (RRAM) but the
* last 96kB are reserved for the FLPR MCU.
*
* This static layout needs to be the same with the upstream TF-M layout in the
* header flash_layout.h of the relevant platform. Any updates in the layout
* needs to happen both in the flash_layout.h and in this file at the same time.
*/
slot0_partition: partition@0 {
label = "image-0";
reg = <0x0000000 DT_SIZE_K(512)>;
};
tfm_ps_partition: partition@80000 {
label = "tfm-ps";
reg = <0x00080000 DT_SIZE_K(16)>;
};
tfm_its_partition: partition@84000 {
label = "tfm-its";
reg = <0x00084000 DT_SIZE_K(16)>;
};
tfm_otp_partition: partition@88000 {
label = "tfm-otp";
reg = <0x00088000 DT_SIZE_K(8)>;
};
slot0_ns_partition: partition@8A000 {
label = "image-0-nonsecure";
reg = <0x0008A000 DT_SIZE_K(844)>;
};
storage_partition: partition@15D000 {
label = "storage";
reg = <0x00015D000 DT_SIZE_K(32)>;
};
};
};
&uart30 {
/* Disable so that TF-M can use this UART */
status = "disabled";
@ -111,3 +66,6 @@
pinctrl-1 = <&uart30_sleep>;
pinctrl-names = "default", "sleep";
};
/* Include default memory partition configuration file */
#include <nordic/nrf54l15_ns_partition.dtsi>

48
boards/panasonic/panb511evb/panb511evb_nrf54l15_cpuapp_ns.dts
View file

@ -57,51 +57,6 @@
};
};
&cpuapp_rram {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* nRF54L15 has 1524 kB of non volatile memory (RRAM) but the
* last 96kB are reserved for the FLPR MCU.
*
* This static layout needs to be the same with the upstream TF-M layout in the
* header flash_layout.h of the relevant platform. Any updates in the layout
* needs to happen both in the flash_layout.h and in this file at the same time.
*/
slot0_partition: partition@0 {
label = "image-0";
reg = <0x0000000 DT_SIZE_K(512)>;
};
tfm_ps_partition: partition@80000 {
label = "tfm-ps";
reg = <0x00080000 DT_SIZE_K(16)>;
};
tfm_its_partition: partition@84000 {
label = "tfm-its";
reg = <0x00084000 DT_SIZE_K(16)>;
};
tfm_otp_partition: partition@88000 {
label = "tfm-otp";
reg = <0x00088000 DT_SIZE_K(8)>;
};
slot0_ns_partition: partition@8A000 {
label = "image-0-nonsecure";
reg = <0x0008A000 DT_SIZE_K(844)>;
};
storage_partition: partition@15D000 {
label = "storage";
reg = <0x00015D000 DT_SIZE_K(32)>;
};
};
};
&uart20 {
/* Disable so that TF-M can use this UART */
status = "disabled";
@ -111,3 +66,6 @@
pinctrl-1 = <&uart20_sleep>;
pinctrl-names = "default", "sleep";
};
/* Include default memory partition configuration file */
#include <nordic/nrf54l15_ns_partition.dtsi>

48
boards/raytac/an54l15q_db/raytac_an54l15q_db_nrf54l15_cpuapp_ns.dts
View file

@ -58,51 +58,6 @@
};
};
&cpuapp_rram {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* nRF54L15 has 1524 kB of non volatile memory (RRAM) but the
* last 96kB are reserved for the FLPR MCU.
*
* This static layout needs to be the same with the upstream TF-M layout in the
* header flash_layout.h of the relevant platform. Any updates in the layout
* needs to happen both in the flash_layout.h and in this file at the same time.
*/
slot0_partition: partition@0 {
label = "image-0";
reg = <0x0000000 DT_SIZE_K(512)>;
};
tfm_ps_partition: partition@80000 {
label = "tfm-ps";
reg = <0x00080000 DT_SIZE_K(16)>;
};
tfm_its_partition: partition@84000 {
label = "tfm-its";
reg = <0x00084000 DT_SIZE_K(16)>;
};
tfm_otp_partition: partition@88000 {
label = "tfm-otp";
reg = <0x00088000 DT_SIZE_K(8)>;
};
slot0_ns_partition: partition@8A000 {
label = "image-0-nonsecure";
reg = <0x0008A000 DT_SIZE_K(844)>;
};
storage_partition: partition@15D000 {
label = "storage";
reg = <0x00015D000 DT_SIZE_K(32)>;
};
};
};
&uart30 {
/* Disable so that TF-M can use this UART */
status = "disabled";
@ -111,3 +66,6 @@
pinctrl-1 = <&uart30_sleep>;
pinctrl-names = "default", "sleep";
};
/* Include default memory partition configuration file */
#include <nordic/nrf54l15_ns_partition.dtsi>