diff --git a/drivers/ipm/ipm_cavs_idc.c b/drivers/ipm/ipm_cavs_idc.c
index 738c66bd450..ef86c135d2e 100644
--- a/drivers/ipm/ipm_cavs_idc.c
+++ b/drivers/ipm/ipm_cavs_idc.c
@@ -193,7 +193,7 @@ static int cavs_idc_set_enabled(struct device *dev, int enable)
 		idc_write(REG_IDCCTL, i, mask);
 
 		/* FIXME: when we have API to enable IRQ on specific core. */
-		sys_set_bit(DT_CAVS_ICTL_BASE_ADDR + 0x04 +
+		sys_set_bit(DT_REG_ADDR(DT_NODELABEL(cavs0)) + 0x04 +
 			    CAVS_ICTL_INT_CPU_OFFSET(i),
 			    CAVS_IRQ_NUMBER(DT_INST_IRQN(0)));
 	}
diff --git a/drivers/timer/cavs_timer.c b/drivers/timer/cavs_timer.c
index 607e8f759f1..1119ecf4d04 100644
--- a/drivers/timer/cavs_timer.c
+++ b/drivers/timer/cavs_timer.c
@@ -172,7 +172,7 @@ void smp_timer_init(void)
 	 * FIXME: Done in this way because we don't have an API
 	 * to enable interrupts per CPU.
 	 */
-	sys_set_bit(DT_CAVS_ICTL_BASE_ADDR
+	sys_set_bit(DT_REG_ADDR(DT_NODELABEL(cavs0))
 			+ CAVS_ICTL_INT_CPU_OFFSET(arch_curr_cpu()->id)
 			+ 0x04,
 		    22 + TIMER);
diff --git a/soc/xtensa/intel_apl_adsp/soc_mp.c b/soc/xtensa/intel_apl_adsp/soc_mp.c
index 3b4fb9a33d9..4aa5e65fac7 100644
--- a/soc/xtensa/intel_apl_adsp/soc_mp.c
+++ b/soc/xtensa/intel_apl_adsp/soc_mp.c
@@ -185,7 +185,7 @@ void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
 	idc_reg = idc_read(REG_IDCCTL, cpu_num);
 	idc_reg |= REG_IDCCTL_IDCTBIE(0);
 	idc_write(REG_IDCCTL, cpu_num, idc_reg);
-	sys_set_bit(DT_CAVS_ICTL_BASE_ADDR + 0x04 +
+	sys_set_bit(DT_REG_ADDR(DT_NODELABEL(cavs0)) + 0x04 +
 		    CAVS_ICTL_INT_CPU_OFFSET(cpu_num), 8);
 
 	/* Send power up message to the other core */
@@ -198,7 +198,7 @@ void arch_start_cpu(int cpu_num, k_thread_stack_t *stack, int sz,
 	idc_reg = idc_read(REG_IDCCTL, cpu_num);
 	idc_reg &= ~REG_IDCCTL_IDCTBIE(0);
 	idc_write(REG_IDCCTL, cpu_num, idc_reg);
-	sys_clear_bit(DT_CAVS_ICTL_BASE_ADDR + 0x04 +
+	sys_clear_bit(DT_REG_ADDR(DT_NODELABEL(cavs0)) + 0x04 +
 		      CAVS_ICTL_INT_CPU_OFFSET(cpu_num), 8);
 
 	do {