dts: x86: derive RAM and ROM size from dts instead of Kconfig
patch removes Kconfig defines for RAM and ROM size in x86. Instead these values are derived from dts. Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
This commit is contained in:
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2368edd8e7
commit
e524f0b846
17 changed files with 27 additions and 69 deletions
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@ -48,26 +48,6 @@ config MAX_IRQ_LINES
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to program to the PIC the association between vectors and
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interrupts.
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config RAM_SIZE
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int "Amount of RAM given to the kernel (in kB)"
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help
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This option specifies the amount of RAM given to the kernel. It must
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not exceed the amount available on the target. When running an XIP
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kernel, it must be large enough to contain the data, bss and noinit
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sections. When not running an XIP kernel, it must be large enough to
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contain the full image.
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The default value is specified by the board.
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config ROM_SIZE
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int "Amount of ROM given to the kernel (in kB)" if XIP
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help
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This option specifies the amount of ROM given to the kernel. It must
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not exceed the amount available on the target. It must also be large
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enough to contain the full image.
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The default value is specified by the board.
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config SET_GDT
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bool
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prompt "Setup GDT as part of boot process"
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@ -11,13 +11,6 @@ if SOC_ATOM
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config SOC
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default atom
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config RAM_SIZE
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default 128 if XIP
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default 256
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config ROM_SIZE
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default 72 if XIP
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 150000000 if LOAPIC_TIMER
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default 25000000 if HPET_TIMER
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@ -12,6 +12,10 @@
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#define CONFIG_PHYS_LOAD_ADDR CONFIG_FLASH_BASE_ADDRESS
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#define CONFIG_RAM_SIZE CONFIG_SRAM_SIZE
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#define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE
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#define CONFIG_IOAPIC_BASE_ADDRESS INTEL_IOAPIC_FEC00000_BASE_ADDRESS
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/* End of SoC Level DTS fixup file */
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@ -11,13 +11,6 @@ if SOC_IA32
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config SOC
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default ia32
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config RAM_SIZE
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default 4096 if XIP
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default 8188 if !XIP
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config ROM_SIZE
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default 4092 if XIP
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 150000000 if LOAPIC_TIMER
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default 25000000 if HPET_TIMER
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@ -12,6 +12,11 @@
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#define CONFIG_PHYS_LOAD_ADDR CONFIG_FLASH_BASE_ADDRESS
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#define CONFIG_RAM_SIZE CONFIG_SRAM_SIZE
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#define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE
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#define CONFIG_IOAPIC_BASE_ADDRESS INTEL_IOAPIC_FEC00000_BASE_ADDRESS
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/* End of SoC Level DTS fixup file */
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@ -19,12 +19,6 @@ config TOOLCHAIN_VARIANT
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 32000000
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config RAM_SIZE
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default 8
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config ROM_SIZE
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default 32
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config IDT_NUM_VECTORS
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default 64
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@ -10,5 +10,9 @@
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#define CONFIG_PHYS_LOAD_ADDR CONFIG_FLASH_BASE_ADDRESS
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#define CONFIG_RAM_SIZE CONFIG_SRAM_SIZE
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#define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE
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#define CONFIG_I2C_0_NAME INTEL_QMSI_I2C_B0002800_LABEL
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#define CONFIG_I2C_0_BITRATE INTEL_QMSI_I2C_B0002800_CLOCK_FREQUENCY
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@ -19,12 +19,6 @@ config TOOLCHAIN_VARIANT
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default "iamcu" if X86_IAMCU
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default "" if !X86_IAMCU
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config RAM_SIZE
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default 52
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config ROM_SIZE
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default 144
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 32000000
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@ -12,6 +12,10 @@
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#define CONFIG_PHYS_LOAD_ADDR CONFIG_FLASH_BASE_ADDRESS
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#define CONFIG_RAM_SIZE CONFIG_SRAM_SIZE
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#define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE
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#define CONFIG_IOAPIC_BASE_ADDRESS INTEL_IOAPIC_FEC00000_BASE_ADDRESS
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#define CONFIG_I2C_0_NAME INTEL_QMSI_I2C_B0002800_LABEL
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@ -12,12 +12,6 @@ if SOC_SERIES_QUARK_X1000
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config SOC_SERIES
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default quark_x1000
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config RAM_SIZE
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default 32768
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config ROM_SIZE
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default 1024 if XIP
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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default 25000000 if HPET_TIMER
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@ -10,6 +10,10 @@
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#define CONFIG_PHYS_LOAD_ADDR CONFIG_FLASH_BASE_ADDRESS
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#define CONFIG_RAM_SIZE CONFIG_SRAM_SIZE
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#define CONFIG_ROM_SIZE CONFIG_FLASH_SIZE
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#define CONFIG_IOAPIC_BASE_ADDRESS INTEL_IOAPIC_FEC00000_BASE_ADDRESS
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#define CONFIG_I2C_0_IRQ SNPS_DESIGNWARE_I2C_90007000_IRQ_0
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@ -10,9 +10,6 @@ config TEXT_SECTION_OFFSET
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config SS_RESET_VECTOR
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default 0x40034000
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config ROM_SIZE
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default 144
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if FLASH && SPI
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config SPI_FLASH_W25QXXDV
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@ -1,7 +1,7 @@
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/dts-v1/;
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#define DT_FLASH_SIZE __SIZE_K(144)
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#define DT_SRAM_SIZE __SIZE_K(55)
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#define DT_SRAM_SIZE __SIZE_K(52)
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#include "intel_curie.dtsi"
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@ -1,12 +1,7 @@
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/dts-v1/;
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#define DT_FLASH_SIZE __SIZE_K(72)
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#if XIP
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#define DT_SRAM_SIZE __SIZE_K(128)
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#else
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#define DT_SRAM_SIZE __SIZE_K(256)
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#endif
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#define DT_FLASH_SIZE __SIZE_K(8912)
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#define DT_SRAM_SIZE __SIZE_K(2097152)
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#include <atom.dtsi>
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@ -1,7 +1,7 @@
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/dts-v1/;
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#define DT_FLASH_SIZE __SIZE_K(144)
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#define DT_SRAM_SIZE __SIZE_K(55)
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#define DT_SRAM_SIZE __SIZE_K(52)
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#include "intel_curie.dtsi"
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@ -10,9 +10,6 @@ config TEXT_SECTION_OFFSET
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config SS_RESET_VECTOR
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default 0x40034000
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config ROM_SIZE
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default 192
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if USB
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config USB_DW
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@ -1,7 +1,7 @@
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/dts-v1/;
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#define DT_FLASH_SIZE __SIZE_K(144)
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#define DT_SRAM_SIZE __SIZE_K(55)
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#define DT_FLASH_SIZE __SIZE_K(192)
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#define DT_SRAM_SIZE __SIZE_K(52)
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#include "intel_curie.dtsi"
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