diff --git a/dts/x86/atom.dtsi b/dts/x86/atom.dtsi index cd82761f33e..230bfb4af8a 100644 --- a/dts/x86/atom.dtsi +++ b/dts/x86/atom.dtsi @@ -44,7 +44,7 @@ ranges; - uart0: uart@000003f8 { + uart0: uart@3f8 { compatible = "ns16550"; reg = <0x000003f8 0x100>; label = "UART_0"; @@ -55,7 +55,7 @@ status = "disabled"; }; - uart1: uart@000002f8 { + uart1: uart@2f8 { compatible = "ns16550"; reg = <0x000002f8 0x100>; label = "UART_1"; diff --git a/dts/x86/ia32.dtsi b/dts/x86/ia32.dtsi index abf9cd9ac2c..362e20d32d9 100644 --- a/dts/x86/ia32.dtsi +++ b/dts/x86/ia32.dtsi @@ -46,7 +46,7 @@ ranges; - uart0: uart@000003f8 { + uart0: uart@3f8 { compatible = "ns16550"; reg = <0x000003f8 0x100>; label = "UART_0"; @@ -57,7 +57,7 @@ status = "disabled"; }; - uart1: uart@000002f8 { + uart1: uart@2f8 { compatible = "ns16550"; reg = <0x000002f8 0x100>; label = "UART_1"; diff --git a/soc/x86/atom/dts.fixup b/soc/x86/atom/dts.fixup index d653a85a4a4..5fd4ea37889 100644 --- a/soc/x86/atom/dts.fixup +++ b/soc/x86/atom/dts.fixup @@ -1,20 +1,20 @@ /* SoC level DTS fixup file */ -#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR NS16550_000003F8_BASE_ADDRESS -#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_000003F8_CURRENT_SPEED -#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_000003F8_LABEL -#define CONFIG_UART_NS16550_PORT_0_IRQ NS16550_000003F8_IRQ_0 -#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI NS16550_000003F8_IRQ_0_PRIORITY -#define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS NS16550_000003F8_IRQ_0_SENSE -#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ NS16550_000003F8_CLOCK_FREQUENCY +#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR NS16550_3F8_BASE_ADDRESS +#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_3F8_CURRENT_SPEED +#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_3F8_LABEL +#define CONFIG_UART_NS16550_PORT_0_IRQ NS16550_3F8_IRQ_0 +#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI NS16550_3F8_IRQ_0_PRIORITY +#define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS NS16550_3F8_IRQ_0_SENSE +#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ NS16550_3F8_CLOCK_FREQUENCY -#define CONFIG_UART_NS16550_PORT_1_BASE_ADDR NS16550_000002F8_BASE_ADDRESS -#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE NS16550_000002F8_CURRENT_SPEED -#define CONFIG_UART_NS16550_PORT_1_NAME NS16550_000002F8_LABEL -#define CONFIG_UART_NS16550_PORT_1_IRQ NS16550_000002F8_IRQ_0 -#define CONFIG_UART_NS16550_PORT_1_IRQ_PRI NS16550_000002F8_IRQ_0_PRIORITY -#define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS NS16550_000002F8_IRQ_0_SENSE -#define CONFIG_UART_NS16550_PORT_1_CLK_FREQ NS16550_000002F8_CLOCK_FREQUENCY +#define CONFIG_UART_NS16550_PORT_1_BASE_ADDR NS16550_2F8_BASE_ADDRESS +#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE NS16550_2F8_CURRENT_SPEED +#define CONFIG_UART_NS16550_PORT_1_NAME NS16550_2F8_LABEL +#define CONFIG_UART_NS16550_PORT_1_IRQ NS16550_2F8_IRQ_0 +#define CONFIG_UART_NS16550_PORT_1_IRQ_PRI NS16550_2F8_IRQ_0_PRIORITY +#define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS NS16550_2F8_IRQ_0_SENSE +#define CONFIG_UART_NS16550_PORT_1_CLK_FREQ NS16550_2F8_CLOCK_FREQUENCY #define CONFIG_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS diff --git a/soc/x86/ia32/dts.fixup b/soc/x86/ia32/dts.fixup index 439b508b79e..6be7d0a5fa8 100644 --- a/soc/x86/ia32/dts.fixup +++ b/soc/x86/ia32/dts.fixup @@ -1,20 +1,20 @@ /* SoC level DTS fixup file */ -#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR NS16550_000003F8_BASE_ADDRESS -#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_000003F8_CURRENT_SPEED -#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_000003F8_LABEL -#define CONFIG_UART_NS16550_PORT_0_IRQ NS16550_000003F8_IRQ_0 -#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI NS16550_000003F8_IRQ_0_PRIORITY -#define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS NS16550_000003F8_IRQ_0_SENSE -#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ NS16550_000003F8_CLOCK_FREQUENCY +#define CONFIG_UART_NS16550_PORT_0_BASE_ADDR NS16550_3F8_BASE_ADDRESS +#define CONFIG_UART_NS16550_PORT_0_BAUD_RATE NS16550_3F8_CURRENT_SPEED +#define CONFIG_UART_NS16550_PORT_0_NAME NS16550_3F8_LABEL +#define CONFIG_UART_NS16550_PORT_0_IRQ NS16550_3F8_IRQ_0 +#define CONFIG_UART_NS16550_PORT_0_IRQ_PRI NS16550_3F8_IRQ_0_PRIORITY +#define CONFIG_UART_NS16550_PORT_0_IRQ_FLAGS NS16550_3F8_IRQ_0_SENSE +#define CONFIG_UART_NS16550_PORT_0_CLK_FREQ NS16550_3F8_CLOCK_FREQUENCY -#define CONFIG_UART_NS16550_PORT_1_BASE_ADDR NS16550_000002F8_BASE_ADDRESS -#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE NS16550_000002F8_CURRENT_SPEED -#define CONFIG_UART_NS16550_PORT_1_NAME NS16550_000002F8_LABEL -#define CONFIG_UART_NS16550_PORT_1_IRQ NS16550_000002F8_IRQ_0 -#define CONFIG_UART_NS16550_PORT_1_IRQ_PRI NS16550_000002F8_IRQ_0_PRIORITY -#define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS NS16550_000002F8_IRQ_0_SENSE -#define CONFIG_UART_NS16550_PORT_1_CLK_FREQ NS16550_000002F8_CLOCK_FREQUENCY +#define CONFIG_UART_NS16550_PORT_1_BASE_ADDR NS16550_2F8_BASE_ADDRESS +#define CONFIG_UART_NS16550_PORT_1_BAUD_RATE NS16550_2F8_CURRENT_SPEED +#define CONFIG_UART_NS16550_PORT_1_NAME NS16550_2F8_LABEL +#define CONFIG_UART_NS16550_PORT_1_IRQ NS16550_2F8_IRQ_0 +#define CONFIG_UART_NS16550_PORT_1_IRQ_PRI NS16550_2F8_IRQ_0_PRIORITY +#define CONFIG_UART_NS16550_PORT_1_IRQ_FLAGS NS16550_2F8_IRQ_0_SENSE +#define CONFIG_UART_NS16550_PORT_1_CLK_FREQ NS16550_2F8_CLOCK_FREQUENCY #define CONFIG_PHYS_RAM_ADDR CONFIG_SRAM_BASE_ADDRESS