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doc: remove more occurances of Nios II

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Remove all occurances of Nios II from docs and code.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2025-05-15 06:29:05 -04:00
commit e48c90700d
9 changed files with 8 additions and 13 deletions
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2
README.rst
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@ -24,7 +24,7 @@ resource-constrained systems: from simple embedded environmental sensors and
LED wearables to sophisticated smart watches and IoT wireless gateways. LED wearables to sophisticated smart watches and IoT wireless gateways.
The Zephyr kernel supports multiple architectures, including ARM (Cortex-A, The Zephyr kernel supports multiple architectures, including ARM (Cortex-A,
Cortex-R, Cortex-M), Intel x86, ARC, Nios II, Tensilica Xtensa, and RISC-V, Cortex-R, Cortex-M), Intel x86, ARC, Tensilica Xtensa, and RISC-V,
SPARC, MIPS, and a large number of `supported boards`_. SPARC, MIPS, and a large number of `supported boards`_.
.. below included in doc/introduction/introduction.rst .. below included in doc/introduction/introduction.rst

1
doc/_extensions/zephyr/domain/templates/board-catalog.html
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@ -17,7 +17,6 @@
<div class="select-container"> <div class="select-container">
<select id="arch"> <select id="arch">
<option value="" disabled selected>Select an architecture</option> <option value="" disabled selected>Select an architecture</option>
<option value="nios2">Altera Nios II</option>
<option value="arm">ARM</option> <option value="arm">ARM</option>
<option value="arm64">ARM 64</option> <option value="arm64">ARM 64</option>
<option value="mips">MIPS</option> <option value="mips">MIPS</option>

1
doc/develop/getting_started/installation_linux.rst
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@ -219,7 +219,6 @@ The Zephyr SDK supports the following target architectures:
* ARC (32-bit and 64-bit; ARCv1, ARCv2, ARCv3) * ARC (32-bit and 64-bit; ARCv1, ARCv2, ARCv3)
* ARM (32-bit and 64-bit; ARMv6, ARMv7, ARMv8; A/R/M Profiles) * ARM (32-bit and 64-bit; ARMv6, ARMv7, ARMv8; A/R/M Profiles)
* MIPS (32-bit and 64-bit) * MIPS (32-bit and 64-bit)
* Nios II
* RISC-V (32-bit and 64-bit; RV32I, RV32E, RV64I) * RISC-V (32-bit and 64-bit; RV32I, RV32E, RV64I)
* x86 (32-bit and 64-bit) * x86 (32-bit and 64-bit)
* Xtensa * Xtensa

1
doc/develop/toolchains/zephyr_sdk.rst
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@ -18,7 +18,6 @@ The Zephyr SDK supports the following target architectures:
* ARC (32-bit and 64-bit; ARCv1, ARCv2, ARCv3) * ARC (32-bit and 64-bit; ARCv1, ARCv2, ARCv3)
* ARM (32-bit and 64-bit; ARMv6, ARMv7, ARMv8; A/R/M Profiles) * ARM (32-bit and 64-bit; ARMv6, ARMv7, ARMv8; A/R/M Profiles)
* MIPS (32-bit and 64-bit) * MIPS (32-bit and 64-bit)
* Nios II
* RISC-V (32-bit and 64-bit; RV32I, RV32E, RV64I) * RISC-V (32-bit and 64-bit; RV32I, RV32E, RV64I)
* x86 (32-bit and 64-bit) * x86 (32-bit and 64-bit)
* Xtensa * Xtensa

7
doc/kernel/services/interrupts.rst
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@ -548,10 +548,9 @@ for IRQ line n, and the function pointers are:
spurious IRQ handler will be placed here. The spurious IRQ handler spurious IRQ handler will be placed here. The spurious IRQ handler
causes a system fatal error if encountered. causes a system fatal error if encountered.
Some architectures (such as the Nios II internal interrupt controller) have a Some architectures have a common entry point for all interrupts and do not
common entry point for all interrupts and do not support a vector table, in support a vector table, in which case the
which case the :kconfig:option:`CONFIG_GEN_IRQ_VECTOR_TABLE` option should be :kconfig:option:`CONFIG_GEN_IRQ_VECTOR_TABLE` option should be disabled.
disabled.
Some architectures may reserve some initial vectors for system exceptions Some architectures may reserve some initial vectors for system exceptions
and declare this in a table elsewhere, in which case and declare this in a table elsewhere, in which case

4
drivers/serial/Kconfig.altera_jtag
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@ -2,12 +2,12 @@
# SPDX-License-Identifier: Apache-2.0 # SPDX-License-Identifier: Apache-2.0
config UART_ALTERA_JTAG config UART_ALTERA_JTAG
bool "Nios II/NiosV JTAG UART driver" bool "NiosV JTAG UART driver"
default y default y
depends on DT_HAS_ALTR_JTAG_UART_ENABLED depends on DT_HAS_ALTR_JTAG_UART_ENABLED
select SERIAL_HAS_DRIVER select SERIAL_HAS_DRIVER
help help
Enable the Altera JTAG UART driver, built in to many Nios II/NiosV CPU Enable the Altera JTAG UART driver, built in to many NiosV CPU
designs. designs.
config UART_ALTERA_JTAG_SUPPORT_INTERRUPT config UART_ALTERA_JTAG_SUPPORT_INTERRUPT

1
subsys/testsuite/include/zephyr/interrupt_util.h
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@ -222,7 +222,6 @@ static inline void trigger_irq(int irq)
} }
#else #else
/* So far, Nios II does not support this */
#define NO_TRIGGER_FROM_SW #define NO_TRIGGER_FROM_SW
#endif #endif

2
tests/kernel/context/src/main.c
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@ -72,7 +72,7 @@ extern const int32_t z_sys_timer_irq_for_test;
#endif #endif
/* Cortex-M1 and Nios II do have a power saving instruction, so k_cpu_idle() /* Cortex-M1 does have a power saving instruction, so k_cpu_idle()
* returns immediately * returns immediately
*/ */
#if !defined(CONFIG_CPU_CORTEX_M1) #if !defined(CONFIG_CPU_CORTEX_M1)

2
tests/net/npf/src/main.c
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@ -46,7 +46,7 @@ static const char dummy_data[] =
"LED wearables to sophisticated smart watches and IoT wireless gateways.\n" "LED wearables to sophisticated smart watches and IoT wireless gateways.\n"
"\n" "\n"
"The Zephyr kernel supports multiple architectures, including ARM Cortex-M,\n" "The Zephyr kernel supports multiple architectures, including ARM Cortex-M,\n"
"Intel x86, ARC, Nios II, Tensilica Xtensa, and RISC-V, and a large number of\n" "Intel x86, ARC, Tensilica Xtensa, and RISC-V, and a large number of\n"
"`supported boards`_.\n"; "`supported boards`_.\n";