michaelh/zephyr
1
0
Fork 0
Code Releases Activity

soc: nxp: imxrt: imxrt118x: Enable GPT1/2 clock

Browse source 
dts: arm: nxp: mimxrt1180_evk: add GPT1/2 instance into devicetree

Enable GPT1/2 clock
Add GPT1/GPT2 instances
Set GPT2 as a counter, the default frequency is 240000000

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
This commit is contained in:
Lucien Zhao 2024-07-22 11:33:26 +08:00 • committed by Carles Cufí
commit e4341a40c3
2 changed files with 35 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

18
soc/nxp/imxrt/imxrt118x/soc.c
View file

@ -251,6 +251,24 @@ static ALWAYS_INLINE void clock_init(void)
CLOCK_SetRootClock(kCLOCK_Root_Lpspi0102, &rootCfg);
#endif
#if defined(CONFIG_COUNTER_MCUX_GPT)
#if (DT_NODE_HAS_STATUS(DT_NODELABEL(gpt1), okay))
/* Configure GPT1 using SYS_PLL3_DIV2_CLK */
rootCfg.mux = kCLOCK_GPT1_ClockRoot_MuxSysPll3Div2;
rootCfg.div = 1;
CLOCK_SetRootClock(kCLOCK_Root_Gpt1, &rootCfg);
#endif /* DT_NODE_HAS_STATUS(DT_NODELABEL(gpt1), okay) */
#if (DT_NODE_HAS_STATUS(DT_NODELABEL(gpt2), okay))
/* Configure GPT2 using SYS_PLL3_DIV2_CLK */
rootCfg.mux = kCLOCK_GPT2_ClockRoot_MuxSysPll3Div2;
rootCfg.div = 1;
CLOCK_SetRootClock(kCLOCK_Root_Gpt2, &rootCfg);
#endif /* DT_NODE_HAS_STATUS(DT_NODELABEL(gpt2), okay) */
#endif /* CONFIG_COUNTER_MCUX_GPT */
/* Keep core clock ungated during WFI */
CCM->LPCG[1].LPM0 = 0x33333333;
CCM->LPCG[1].LPM1 = 0x33333333;