From e37bf46858235ea9864ffc879fabbe5877c9b808 Mon Sep 17 00:00:00 2001 From: Alexandre Bourdiol Date: Tue, 4 May 2021 10:36:29 +0200 Subject: [PATCH] boards: steval_fcu001v1: Use dts for clocks configuration Convert board to use of device tree for clocks configuration. Signed-off-by: Alexandre Bourdiol --- .../arm/steval_fcu001v1/steval_fcu001v1.dts | 22 ++++++++++++++++++ .../steval_fcu001v1/steval_fcu001v1_defconfig | 23 +------------------ 2 files changed, 23 insertions(+), 22 deletions(-) diff --git a/boards/arm/steval_fcu001v1/steval_fcu001v1.dts b/boards/arm/steval_fcu001v1/steval_fcu001v1.dts index 0f5d45f2ff4..c6a9c1e491f 100644 --- a/boards/arm/steval_fcu001v1/steval_fcu001v1.dts +++ b/boards/arm/steval_fcu001v1/steval_fcu001v1.dts @@ -38,6 +38,28 @@ }; }; +&clk_hse { + clock-frequency = ; + status = "okay"; +}; + +&pll { + div-m = <16>; + mul-n = <336>; + div-p = <4>; + div-q = <7>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <2>; + apb2-prescaler = <1>; +}; + &i2c2 { pinctrl-0 = <&i2c2_sda_pb3 &i2c2_scl_pb10>; status = "okay"; diff --git a/boards/arm/steval_fcu001v1/steval_fcu001v1_defconfig b/boards/arm/steval_fcu001v1/steval_fcu001v1_defconfig index 7532d773ba2..be285322bbb 100644 --- a/boards/arm/steval_fcu001v1/steval_fcu001v1_defconfig +++ b/boards/arm/steval_fcu001v1/steval_fcu001v1_defconfig @@ -3,9 +3,6 @@ CONFIG_SOC_SERIES_STM32F4X=y CONFIG_SOC_STM32F401XC=y -# 84MHz system clock -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=84000000 - # Enable MPU CONFIG_ARM_MPU=y @@ -21,23 +18,5 @@ CONFIG_PINMUX=y # enable GPIO CONFIG_GPIO=y -# clock configuration +# Enable Clocks CONFIG_CLOCK_CONTROL=y - -# SYSCLK selection -CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y - -# use HSE as PLL input -CONFIG_CLOCK_STM32_PLL_SRC_HSE=y -CONFIG_CLOCK_STM32_HSE_CLOCK=16000000 - -# produce 84MHz clock at PLL output -CONFIG_CLOCK_STM32_PLL_M_DIVISOR=16 -CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=336 -CONFIG_CLOCK_STM32_PLL_P_DIVISOR=4 -CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=7 -CONFIG_CLOCK_STM32_AHB_PRESCALER=1 - -# APB1 clock must not exceed 50MHz limit -CONFIG_CLOCK_STM32_APB1_PRESCALER=2 -CONFIG_CLOCK_STM32_APB2_PRESCALER=1