From e31026310dda7f79e0d4043b6f3037fcb3117b80 Mon Sep 17 00:00:00 2001
From: Kumar Gala <kumar.gala@linaro.org>
Date: Wed, 25 Mar 2020 11:27:19 -0500
Subject: [PATCH] soc: x86: Convert to new DT_INST macros

Convert older DT_INST_ macro use the new include/devicetree.h
DT_INST macro APIs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
---
 soc/x86/apollo_lake/soc.c | 20 ++++++++++----------
 soc/x86/atom/soc.c        |  4 ++--
 soc/x86/ia32/soc.c        |  6 +++---
 3 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/soc/x86/apollo_lake/soc.c b/soc/x86/apollo_lake/soc.c
index a0d024fee97..9edf45bec97 100644
--- a/soc/x86/apollo_lake/soc.c
+++ b/soc/x86/apollo_lake/soc.c
@@ -24,30 +24,30 @@
 MMU_BOOT_REGION(CONFIG_LOAPIC_BASE_ADDRESS, 4 * 1024, MMU_ENTRY_WRITE);
 
 /* ioapic */
-MMU_BOOT_REGION(DT_INST_0_INTEL_IOAPIC_BASE_ADDRESS, 1024 * 1024, MMU_ENTRY_WRITE);
+MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(0, intel_ioapic)), 1024 * 1024, MMU_ENTRY_WRITE);
 
 #ifdef CONFIG_HPET_TIMER
-MMU_BOOT_REGION(DT_INST_0_INTEL_HPET_BASE_ADDRESS, KB(4), MMU_ENTRY_WRITE);
+MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(0, intel_hpet)), KB(4), MMU_ENTRY_WRITE);
 #endif  /* CONFIG_HPET_TIMER */
 
 /* for UARTs */
-#ifdef DT_INST_0_NS16550
-MMU_BOOT_REGION(DT_INST_0_NS16550_BASE_ADDRESS, 0x1000,
+#if DT_HAS_NODE(DT_INST(0, ns16550))
+MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(0, ns16550)), 0x1000,
 		(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
 #endif
 
-#ifdef DT_INST_1_NS16550
-MMU_BOOT_REGION(DT_INST_1_NS16550_BASE_ADDRESS, 0x1000,
+#if DT_HAS_NODE(DT_INST(1, ns16550))
+MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(1, ns16550)), 0x1000,
 		(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
 #endif
 
-#ifdef DT_INST_2_NS16550
-MMU_BOOT_REGION(DT_INST_2_NS16550_BASE_ADDRESS, 0x1000,
+#if DT_HAS_NODE(DT_INST(2, ns16550))
+MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(2, ns16550)), 0x1000,
 		(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
 #endif
 
-#ifdef DT_INST_3_NS16550
-MMU_BOOT_REGION(DT_INST_3_NS16550_BASE_ADDRESS, 0x1000,
+#if DT_HAS_NODE(DT_INST(3, ns16550))
+MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(3, ns16550)), 0x1000,
 		(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
 #endif
 
diff --git a/soc/x86/atom/soc.c b/soc/x86/atom/soc.c
index 23b425e30bf..352b6823a55 100644
--- a/soc/x86/atom/soc.c
+++ b/soc/x86/atom/soc.c
@@ -23,7 +23,7 @@
 MMU_BOOT_REGION(CONFIG_LOAPIC_BASE_ADDRESS, 4*1024, MMU_ENTRY_WRITE);
 
 /*ioapic */
-MMU_BOOT_REGION(DT_INST_0_INTEL_IOAPIC_BASE_ADDRESS, 1024*1024, MMU_ENTRY_WRITE);
+MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(0, intel_ioapic)), 1024*1024, MMU_ENTRY_WRITE);
 
 /* peripherals */
 MMU_BOOT_REGION(0xB0000000, 128*1024, MMU_ENTRY_WRITE);
@@ -38,7 +38,7 @@ MMU_BOOT_REGION(0xB0700000, 4*1024, MMU_ENTRY_WRITE);
 MMU_BOOT_REGION(0xB0500000, 256*1024, MMU_ENTRY_WRITE);
 
 #ifdef CONFIG_HPET_TIMER
-MMU_BOOT_REGION(DT_INST_0_INTEL_HPET_BASE_ADDRESS, KB(4), MMU_ENTRY_WRITE);
+MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(0, intel_hpet)), KB(4), MMU_ENTRY_WRITE);
 #endif	/* CONFIG_HPET_TIMER */
 
 #endif /* CONFIG_X86_MMU */
diff --git a/soc/x86/ia32/soc.c b/soc/x86/ia32/soc.c
index 7b28f4b101f..4af69a3de31 100644
--- a/soc/x86/ia32/soc.c
+++ b/soc/x86/ia32/soc.c
@@ -22,14 +22,14 @@
 
 #ifdef CONFIG_X86_MMU
 MMU_BOOT_REGION(CONFIG_LOAPIC_BASE_ADDRESS, KB(4), MMU_ENTRY_WRITE);
-MMU_BOOT_REGION(DT_INST_0_INTEL_IOAPIC_BASE_ADDRESS, MB(1), MMU_ENTRY_WRITE);
+MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(0, intel_ioapic)), MB(1), MMU_ENTRY_WRITE);
 
 #ifdef CONFIG_HPET_TIMER
-MMU_BOOT_REGION(DT_INST_0_INTEL_HPET_BASE_ADDRESS, KB(4), MMU_ENTRY_WRITE);
+MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(0, intel_hpet)), KB(4), MMU_ENTRY_WRITE);
 #endif
 
 #ifdef CONFIG_ETH_E1000
-MMU_BOOT_REGION(DT_INST_0_INTEL_E1000_BASE_ADDRESS, KB(128), MMU_ENTRY_WRITE);
+MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(0, intel_e1000)), KB(128), MMU_ENTRY_WRITE);
 #endif
 
 #endif /* CONFIG_X86_MMU*/