soc: x86: Convert to new DT_INST macros
Convert older DT_INST_ macro use the new include/devicetree.h DT_INST macro APIs. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
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227d5b1395
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3 changed files with 15 additions and 15 deletions
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@ -24,30 +24,30 @@
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MMU_BOOT_REGION(CONFIG_LOAPIC_BASE_ADDRESS, 4 * 1024, MMU_ENTRY_WRITE);
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/* ioapic */
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MMU_BOOT_REGION(DT_INST_0_INTEL_IOAPIC_BASE_ADDRESS, 1024 * 1024, MMU_ENTRY_WRITE);
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MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(0, intel_ioapic)), 1024 * 1024, MMU_ENTRY_WRITE);
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#ifdef CONFIG_HPET_TIMER
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MMU_BOOT_REGION(DT_INST_0_INTEL_HPET_BASE_ADDRESS, KB(4), MMU_ENTRY_WRITE);
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MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(0, intel_hpet)), KB(4), MMU_ENTRY_WRITE);
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#endif /* CONFIG_HPET_TIMER */
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/* for UARTs */
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#ifdef DT_INST_0_NS16550
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MMU_BOOT_REGION(DT_INST_0_NS16550_BASE_ADDRESS, 0x1000,
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#if DT_HAS_NODE(DT_INST(0, ns16550))
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MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(0, ns16550)), 0x1000,
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(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
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#endif
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#ifdef DT_INST_1_NS16550
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MMU_BOOT_REGION(DT_INST_1_NS16550_BASE_ADDRESS, 0x1000,
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#if DT_HAS_NODE(DT_INST(1, ns16550))
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MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(1, ns16550)), 0x1000,
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(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
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#endif
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#ifdef DT_INST_2_NS16550
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MMU_BOOT_REGION(DT_INST_2_NS16550_BASE_ADDRESS, 0x1000,
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#if DT_HAS_NODE(DT_INST(2, ns16550))
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MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(2, ns16550)), 0x1000,
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(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
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#endif
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#ifdef DT_INST_3_NS16550
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MMU_BOOT_REGION(DT_INST_3_NS16550_BASE_ADDRESS, 0x1000,
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#if DT_HAS_NODE(DT_INST(3, ns16550))
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MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(3, ns16550)), 0x1000,
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(MMU_ENTRY_READ | MMU_ENTRY_WRITE));
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#endif
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@ -23,7 +23,7 @@
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MMU_BOOT_REGION(CONFIG_LOAPIC_BASE_ADDRESS, 4*1024, MMU_ENTRY_WRITE);
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/*ioapic */
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MMU_BOOT_REGION(DT_INST_0_INTEL_IOAPIC_BASE_ADDRESS, 1024*1024, MMU_ENTRY_WRITE);
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MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(0, intel_ioapic)), 1024*1024, MMU_ENTRY_WRITE);
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/* peripherals */
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MMU_BOOT_REGION(0xB0000000, 128*1024, MMU_ENTRY_WRITE);
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@ -38,7 +38,7 @@ MMU_BOOT_REGION(0xB0700000, 4*1024, MMU_ENTRY_WRITE);
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MMU_BOOT_REGION(0xB0500000, 256*1024, MMU_ENTRY_WRITE);
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#ifdef CONFIG_HPET_TIMER
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MMU_BOOT_REGION(DT_INST_0_INTEL_HPET_BASE_ADDRESS, KB(4), MMU_ENTRY_WRITE);
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MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(0, intel_hpet)), KB(4), MMU_ENTRY_WRITE);
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#endif /* CONFIG_HPET_TIMER */
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#endif /* CONFIG_X86_MMU */
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@ -22,14 +22,14 @@
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#ifdef CONFIG_X86_MMU
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MMU_BOOT_REGION(CONFIG_LOAPIC_BASE_ADDRESS, KB(4), MMU_ENTRY_WRITE);
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MMU_BOOT_REGION(DT_INST_0_INTEL_IOAPIC_BASE_ADDRESS, MB(1), MMU_ENTRY_WRITE);
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MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(0, intel_ioapic)), MB(1), MMU_ENTRY_WRITE);
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#ifdef CONFIG_HPET_TIMER
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MMU_BOOT_REGION(DT_INST_0_INTEL_HPET_BASE_ADDRESS, KB(4), MMU_ENTRY_WRITE);
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MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(0, intel_hpet)), KB(4), MMU_ENTRY_WRITE);
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#endif
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#ifdef CONFIG_ETH_E1000
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MMU_BOOT_REGION(DT_INST_0_INTEL_E1000_BASE_ADDRESS, KB(128), MMU_ENTRY_WRITE);
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MMU_BOOT_REGION(DT_REG_ADDR(DT_INST(0, intel_e1000)), KB(128), MMU_ENTRY_WRITE);
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#endif
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#endif /* CONFIG_X86_MMU*/
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