drivers: pinctrl: add CC13XX/CC26XX pinctrl driver

Add pinctrl driver for CC13XX/CC26XX family of SoCs
to facilitate transition from pinmux to pinctrl.

`IOCPortConfigureSet()` from TI hal driverlib used to
implement the generic pinctrl driver.

Signed-off-by: Vaishnav Achath <vaishnav@beagleboard.org>

drivers/pinctrl/CMakeLists.txt

@@ -17,3 +17,4 @@ zephyr_library_sources_ifdef(CONFIG_PINCTRL_MCHP_XEC pinctrl_mchp_xec.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_MCUX_RT pinctrl_mcux_rt.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_SIFIVE pinctrl_sifive.c)
 zephyr_library_sources_ifdef(CONFIG_PINCTRL_NXP_IOCON pinctrl_lpc_iocon.c)
+zephyr_library_sources_ifdef(CONFIG_PINCTRL_CC13XX_CC26XX pinctrl_cc13xx_cc26xx.c)

drivers/pinctrl/Kconfig

@@ -42,5 +42,6 @@ source "drivers/pinctrl/Kconfig.xec"
 source "drivers/pinctrl/Kconfig.mcux"
 source "drivers/pinctrl/Kconfig.sifive"
 source "drivers/pinctrl/Kconfig.lpc_iocon"
+source "drivers/pinctrl/Kconfig.cc13xx_cc26xx"
 
 endif # PINCTRL

drivers/pinctrl/Kconfig.cc13xx_cc26xx

@@ -0,0 +1,11 @@
+# Copyright (c) 2022 Vaishnav Achath
+# SPDX-License-Identifier: Apache-2.0
+
+DT_COMPAT_CC13XX_CC26XX_PINCTRL := ti,cc13xx-cc26xx-pinctrl
+
+config PINCTRL_CC13XX_CC26XX
+	bool "TI SimpleLink CC13xx / CC26xx pinctrl driver"
+	depends on SOC_SERIES_CC13X2_CC26X2
+	default $(dt_compat_enabled,$(DT_COMPAT_CC13XX_CC26XX_PINCTRL))
+	help
+	  Enable the TI SimpleLink CC13xx / CC26xx pinctrl driver

drivers/pinctrl/pinctrl_cc13xx_cc26xx.c

@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2022 Vaishnav Achath
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#define DT_DRV_COMPAT ti_cc13xx_cc26xx_pinctrl
+
+#include <drivers/pinctrl.h>
+
+#include <driverlib/ioc.h>
+
+static int pinctrl_c13xx_cc26xx_set(uint32_t pin, uint32_t func, uint32_t mode)
+{
+	if (pin >= NUM_IO_MAX || func >= NUM_IO_PORTS) {
+		return -EINVAL;
+	}
+
+	IOCPortConfigureSet(pin, func, mode);
+
+	return 0;
+}
+
+int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg)
+{
+	ARG_UNUSED(reg);
+
+	for (uint8_t i = 0U; i < pin_cnt; i++) {
+		pinctrl_c13xx_cc26xx_set(pins[i].pin, pins[i].iofunc, pins[i].iomode);
+	}
+
+	return 0;
+}

dts/bindings/pinctrl/ti,cc13xx-cc26xx-pinctrl.yaml

@@ -0,0 +1,88 @@
+# Copyright (c) 2022 Vaishnav Achath
+# SPDX-License-Identifier: Apache-2.0
+
+description: |
+    TI SimpleLink CC13xx / CC26xx pinctrl node.
+
+    Device pin configuration should be placed in the child nodes of this node.
+    Populate the 'pinmux' field with a pair consisting of a pin number and its IO
+    functions.
+
+    The node has the 'pinctrl' node label set in your SoC's devicetree,
+    so you can modify it like this:
+
+      &pinctrl {
+              /* your modifications go here */
+      };
+
+    All device pin configurations should be placed in child nodes of the
+    'pinctrl' node, as in the i2c0 example shown at the end.
+
+    Here is a list of
+    supported standard pin properties:
+
+    - bias-disable: Disable pull-up/down.
+    - bias-pull-down: Enable pull-down resistor.
+    - bias-pull-up: Enable pull-up resistor.
+    - drive-open-drain: Output driver is open-drain.
+    - drive-open-drain: Output driver is open-source.
+    - input-enable: enable input.
+    - input-schmitt-enable: enable input schmitt circuit.
+
+    An example for CC13XX family, include the chip level pinctrl
+    DTSI file in the board level DTS:
+
+      #include <dt-bindings/pinctrl/cc13xx_cc26xx-pinctrl.h>
+
+    We want to configure the I2C pins to open drain, with pullup enabled
+    and input enabled.
+
+    To change a pin's pinctrl default properties add a reference to the
+    pin in the board's DTS file and set the properties.
+
+      &i2c0 {
+        pinctrl-0 = <&i2c0_scl_default &i2c0_sda_default>;
+        pinctrl-1 = <&i2c0_scl_sleep &i2c0_sda_sleep>;
+        pinctrl-names = "default", "sleep";
+      }
+
+    The i2c0_scl_default corresponds to the following in the board dts file:
+
+      &pinctrl {
+        i2c0_scl_default: i2c0_scl_default {
+          pinmux = <4 IOC_PORT_MCU_I2C_MSSCL>;
+          bias-pull-up;
+          drive-open-drain;
+          input-enable;
+        };
+      };
+
+compatible: "ti,cc13xx-cc26xx-pinctrl"
+
+include:
+    - name: base.yaml
+    - name: pincfg-node.yaml
+      child-binding:
+        property-allowlist:
+          - bias-disable
+          - bias-pull-down
+          - bias-pull-up
+          - drive-open-drain
+          - drive-open-source
+          - input-enable
+          - input-schmitt-enable
+
+properties:
+    reg:
+      required: true
+
+child-binding:
+  description: |
+    This binding gives a base representation of the CC13XX/CC26XX
+    pins configuration.
+  properties:
+    pinmux:
+      required: true
+      type: array
+      description: |
+        CC13XX/CC26XX pin's configuration (IO pin, IO function).

include/zephyr/dt-bindings/pinctrl/cc13xx_cc26xx-pinctrl.h

@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2015 - 2017, Texas Instruments Incorporated
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef CC13XX_CC26XX_PINCTRL_COMMON_H_
+#define CC13XX_CC26XX_PINCTRL_COMMON_H_
+
+/* Adapted from hal/ti/simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/ioc.h */
+
+/* IOC Peripheral Port Mapping */
+#define IOC_PORT_GPIO             0x00000000  /* Default general purpose IO usage */
+#define IOC_PORT_AON_CLK32K       0x00000007  /* AON External 32kHz clock */
+#define IOC_PORT_AUX_IO           0x00000008  /* AUX IO Pin */
+#define IOC_PORT_MCU_SSI0_RX      0x00000009  /* MCU SSI0 Receive Pin */
+#define IOC_PORT_MCU_SSI0_TX      0x0000000A  /* MCU SSI0 Transmit Pin */
+#define IOC_PORT_MCU_SSI0_FSS     0x0000000B  /* MCU SSI0 FSS Pin */
+#define IOC_PORT_MCU_SSI0_CLK     0x0000000C  /* MCU SSI0 Clock Pin */
+#define IOC_PORT_MCU_I2C_MSSDA    0x0000000D  /* MCU I2C Data Pin */
+#define IOC_PORT_MCU_I2C_MSSCL    0x0000000E  /* MCU I2C Clock Pin */
+#define IOC_PORT_MCU_UART0_RX     0x0000000F  /* MCU UART0 Receive Pin */
+#define IOC_PORT_MCU_UART0_TX     0x00000010  /* MCU UART0 Transmit Pin */
+#define IOC_PORT_MCU_UART0_CTS    0x00000011  /* MCU UART0 Clear To Send Pin */
+#define IOC_PORT_MCU_UART0_RTS    0x00000012  /* MCU UART0 Request To Send Pin */
+#define IOC_PORT_MCU_UART1_RX     0x00000013  /* MCU UART1 Receive Pin */
+#define IOC_PORT_MCU_UART1_TX     0x00000014  /* MCU UART1 Transmit Pin */
+#define IOC_PORT_MCU_UART1_CTS    0x00000015  /* MCU UART1 Clear To Send Pin */
+#define IOC_PORT_MCU_UART1_RTS    0x00000016  /* MCU UART1 Request To Send Pin */
+#define IOC_PORT_MCU_PORT_EVENT0  0x00000017  /* MCU PORT EVENT 0 */
+#define IOC_PORT_MCU_PORT_EVENT1  0x00000018  /* MCU PORT EVENT 1 */
+#define IOC_PORT_MCU_PORT_EVENT2  0x00000019  /* MCU PORT EVENT 2 */
+#define IOC_PORT_MCU_PORT_EVENT3  0x0000001A  /* MCU PORT EVENT 3 */
+#define IOC_PORT_MCU_PORT_EVENT4  0x0000001B  /* MCU PORT EVENT 4 */
+#define IOC_PORT_MCU_PORT_EVENT5  0x0000001C  /* MCU PORT EVENT 5 */
+#define IOC_PORT_MCU_PORT_EVENT6  0x0000001D  /* MCU PORT EVENT 6 */
+#define IOC_PORT_MCU_PORT_EVENT7  0x0000001E  /* MCU PORT EVENT 7 */
+#define IOC_PORT_MCU_SWV          0x00000020  /* Serial Wire Viewer */
+#define IOC_PORT_MCU_SSI1_RX      0x00000021  /* MCU SSI1 Receive Pin */
+#define IOC_PORT_MCU_SSI1_TX      0x00000022  /* MCU SSI1 Transmit Pin */
+#define IOC_PORT_MCU_SSI1_FSS     0x00000023  /* MCU SSI1 FSS Pin */
+#define IOC_PORT_MCU_SSI1_CLK     0x00000024  /* MCU SSI1 Clock Pin */
+#define IOC_PORT_MCU_I2S_AD0      0x00000025  /* MCU I2S Data Pin 0 */
+#define IOC_PORT_MCU_I2S_AD1      0x00000026  /* MCU I2S Data Pin 1 */
+#define IOC_PORT_MCU_I2S_WCLK     0x00000027  /* MCU I2S Frame/Word Clock */
+#define IOC_PORT_MCU_I2S_BCLK     0x00000028  /* MCU I2S Bit Clock */
+#define IOC_PORT_MCU_I2S_MCLK     0x00000029  /* MCU I2S Master clock 2 */
+#define IOC_PORT_RFC_TRC          0x0000002E  /* RF Core Tracer */
+#define IOC_PORT_RFC_GPO0         0x0000002F  /* RC Core Data Out Pin 0 */
+#define IOC_PORT_RFC_GPO1         0x00000030  /* RC Core Data Out Pin 1 */
+#define IOC_PORT_RFC_GPO2         0x00000031  /* RC Core Data Out Pin 2 */
+#define IOC_PORT_RFC_GPO3         0x00000032  /* RC Core Data Out Pin 3 */
+#define IOC_PORT_RFC_GPI0         0x00000033  /* RC Core Data In Pin 0 */
+#define IOC_PORT_RFC_GPI1         0x00000034  /* RC Core Data In Pin 1 */
+#define IOC_PORT_RFC_SMI_DL_OUT   0x00000035  /* RF Core SMI Data Link Out */
+#define IOC_PORT_RFC_SMI_DL_IN    0x00000036  /* RF Core SMI Data Link in */
+#define IOC_PORT_RFC_SMI_CL_OUT   0x00000037  /* RF Core SMI Command Link Out */
+#define IOC_PORT_RFC_SMI_CL_IN    0x00000038  /* RF Core SMI Command Link In */
+
+#endif  /* CC13XX_CC26XX_PINCTRL_COMMON_H_ */

soc/arm/ti_simplelink/cc13x2_cc26x2/pinctrl_soc.h

@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2022 Vaishnav Achath
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef TI_SIMPLELINK_CC13XX_CC26XX_SOC_PINCTRL_H_
+#define TI_SIMPLELINK_CC13XX_CC26XX_SOC_PINCTRL_H_
+
+#include <zephyr/types.h>
+
+/* Defines for enabling/disabling an IO */
+#define IOC_SLEW_ENABLE         0x00001000
+#define IOC_SLEW_DISABLE        0x00000000
+#define IOC_INPUT_ENABLE        0x20000000
+#define IOC_INPUT_DISABLE       0x00000000
+#define IOC_HYST_ENABLE         0x40000000
+#define IOC_HYST_DISABLE        0x00000000
+
+/* Defines that can be used to set the IO Mode of an IO */
+#define IOC_IOMODE_NORMAL                0x00000000
+#define IOC_IOMODE_INV                   0x01000000
+#define IOC_IOMODE_OPEN_DRAIN_NORMAL     0x04000000
+#define IOC_IOMODE_OPEN_DRAIN_INV        0x05000000
+#define IOC_IOMODE_OPEN_SRC_NORMAL       0x06000000
+#define IOC_IOMODE_OPEN_SRC_INV          0x07000000
+
+/* Defines that can be used to set pull on an IO */
+#define IOC_NO_IOPULL           0x00006000
+#define IOC_IOPULL_UP           0x00004000
+#define IOC_IOPULL_DOWN         0x00002000
+
+typedef struct pinctrl_soc_pin_t {
+	uint32_t pin;
+	uint32_t iofunc;
+	uint32_t iomode;
+} pinctrl_soc_pin_t;
+
+/* Convert DT flags to SoC flags */
+#define CC13XX_CC26XX_PIN_FLAGS(node_id) \
+	(DT_PROP(node_id, bias_pull_up) * IOC_IOPULL_UP | \
+	DT_PROP(node_id, bias_pull_down) * IOC_IOPULL_DOWN | \
+	DT_PROP(node_id, bias_disable) * IOC_NO_IOPULL |  \
+	DT_PROP(node_id, drive_open_drain) * IOC_IOMODE_OPEN_DRAIN_NORMAL | \
+	DT_PROP(node_id, drive_open_source) * IOC_IOMODE_OPEN_SRC_NORMAL | \
+	DT_PROP(node_id, input_enable) * IOC_INPUT_ENABLE | \
+	DT_PROP(node_id, input_schmitt_enable) * IOC_HYST_ENABLE)
+
+#define CC13XX_CC26XX_DT_PIN(node_id)					\
+	{							\
+		.pin = DT_PROP_BY_IDX(node_id, pinmux, 0),	\
+		.iofunc = DT_PROP_BY_IDX(node_id, pinmux, 1),	\
+		.iomode = CC13XX_CC26XX_PIN_FLAGS(node_id)	\
+	},
+
+#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx)		\
+	CC13XX_CC26XX_DT_PIN(DT_PROP_BY_IDX(node_id, prop, idx))
+
+#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop)		\
+	{ DT_FOREACH_PROP_ELEM(node_id, prop, Z_PINCTRL_STATE_PIN_INIT) }
+
+#endif /* TI_SIMPLELINK_CC13XX_CC26XX_SOC_PINCTRL_H_ */