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driver: interrupt_controller: dw: convert to DT_INST defines

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Convert driver to use DT_INST_ defines.  The preferred defines for
drivers are DT_INST_.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2020-02-13 14:13:51 -06:00 • committed by Kumar Gala
commit e2d71c9c77
4 changed files with 13 additions and 20 deletions
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15
drivers/interrupt_controller/intc_dw.c
View file

@ -126,8 +126,8 @@ static int dw_ictl_intr_get_line_state(struct device *dev, unsigned int irq)
static void dw_ictl_config_irq(struct device *dev); static void dw_ictl_config_irq(struct device *dev);
static const struct dw_ictl_config dw_config = { static const struct dw_ictl_config dw_config = {
.base_addr = DT_INTC_DW_0_BASE_ADDR, .base_addr = DT_INST_0_SNPS_DESIGNWARE_INTC_BASE_ADDRESS,
.numirqs = DT_INTC_DW_0_NUM_IRQS, .numirqs = DT_INST_0_SNPS_DESIGNWARE_INTC_NUM_IRQS,
.isr_table_offset = CONFIG_DW_ISR_TBL_OFFSET, .isr_table_offset = CONFIG_DW_ISR_TBL_OFFSET,
.config_func = dw_ictl_config_irq, .config_func = dw_ictl_config_irq,
}; };
@ -139,12 +139,15 @@ static const struct irq_next_level_api dw_ictl_apis = {
.intr_get_line_state = dw_ictl_intr_get_line_state, .intr_get_line_state = dw_ictl_intr_get_line_state,
}; };
DEVICE_AND_API_INIT(dw_ictl, DT_INTC_DW_0_NAME, dw_ictl_initialize, DEVICE_AND_API_INIT(dw_ictl, DT_INST_0_SNPS_DESIGNWARE_INTC_LABEL,
NULL, &dw_config, dw_ictl_initialize, NULL, &dw_config,
POST_KERNEL, CONFIG_DW_ICTL_INIT_PRIORITY, &dw_ictl_apis); POST_KERNEL, CONFIG_DW_ICTL_INIT_PRIORITY, &dw_ictl_apis);
static void dw_ictl_config_irq(struct device *port) static void dw_ictl_config_irq(struct device *port)
{ {
IRQ_CONNECT(DT_INTC_DW_0_IRQ, DT_INTC_DW_0_IRQ_PRI, dw_ictl_isr, IRQ_CONNECT(DT_INST_0_SNPS_DESIGNWARE_INTC_IRQ_0,
DEVICE_GET(dw_ictl), DT_INTC_DW_0_IRQ_FLAGS); DT_INST_0_SNPS_DESIGNWARE_INTC_IRQ_0_PRIORITY,
dw_ictl_isr,
DEVICE_GET(dw_ictl),
DT_INST_0_SNPS_DESIGNWARE_INTC_IRQ_0_SENSE);
} }

10
soc/xtensa/intel_s1000/dts_fixup.h
View file

@ -35,16 +35,6 @@
#define DT_CAVS_ICTL_3_IRQ_PRI DT_INTEL_CAVS_INTC_78830_IRQ_0_PRIORITY #define DT_CAVS_ICTL_3_IRQ_PRI DT_INTEL_CAVS_INTC_78830_IRQ_0_PRIORITY
#define DT_CAVS_ICTL_3_IRQ_FLAGS DT_INTEL_CAVS_INTC_78830_IRQ_0_SENSE #define DT_CAVS_ICTL_3_IRQ_FLAGS DT_INTEL_CAVS_INTC_78830_IRQ_0_SENSE
#define DT_INTC_DW_0_BASE_ADDR \
DT_SNPS_DESIGNWARE_INTC_81800_BASE_ADDRESS
#define DT_INTC_DW_0_NAME DT_SNPS_DESIGNWARE_INTC_81800_LABEL
#define DT_INTC_DW_0_IRQ DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0
#define DT_INTC_DW_0_IRQ_PRI \
DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0_PRIORITY
#define DT_INTC_DW_0_IRQ_FLAGS \
DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0_SENSE
#define DT_INTC_DW_0_NUM_IRQS DT_SNPS_DESIGNWARE_INTC_81800_NUM_IRQS
#define DT_INST_0_SNPS_DESIGNWARE_SPI_IRQ_FLAGS 0 #define DT_INST_0_SNPS_DESIGNWARE_SPI_IRQ_FLAGS 0
#define DT_INST_0_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS 0 #define DT_INST_0_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS 0

6
soc/xtensa/intel_s1000/soc.c
View file

@ -54,7 +54,7 @@ void z_soc_irq_enable(u32_t irq)
switch (CAVS_IRQ_NUMBER(irq)) { switch (CAVS_IRQ_NUMBER(irq)) {
case DW_ICTL_IRQ_CAVS_OFFSET: case DW_ICTL_IRQ_CAVS_OFFSET:
dev_ictl = device_get_binding(DT_INTC_DW_0_NAME); dev_ictl = device_get_binding(DT_INST_0_SNPS_DESIGNWARE_INTC_LABEL);
break; break;
default: default:
/* The source of the interrupt is in CAVS interrupt logic */ /* The source of the interrupt is in CAVS interrupt logic */
@ -112,7 +112,7 @@ void z_soc_irq_disable(u32_t irq)
switch (CAVS_IRQ_NUMBER(irq)) { switch (CAVS_IRQ_NUMBER(irq)) {
case DW_ICTL_IRQ_CAVS_OFFSET: case DW_ICTL_IRQ_CAVS_OFFSET:
dev_ictl = device_get_binding(DT_INTC_DW_0_NAME); dev_ictl = device_get_binding(DT_INST_0_SNPS_DESIGNWARE_INTC_LABEL);
break; break;
default: default:
/* The source of the interrupt is in CAVS interrupt logic */ /* The source of the interrupt is in CAVS interrupt logic */
@ -179,7 +179,7 @@ int z_soc_irq_is_enabled(unsigned int irq)
switch (CAVS_IRQ_NUMBER(irq)) { switch (CAVS_IRQ_NUMBER(irq)) {
case DW_ICTL_IRQ_CAVS_OFFSET: case DW_ICTL_IRQ_CAVS_OFFSET:
dev_ictl = device_get_binding(DT_INTC_DW_0_NAME); dev_ictl = device_get_binding(DT_INST_0_SNPS_DESIGNWARE_INTC_LABEL);
break; break;
default: default:
/* The source of the interrupt is in CAVS interrupt logic */ /* The source of the interrupt is in CAVS interrupt logic */

2
soc/xtensa/intel_s1000/soc.h
View file

@ -43,7 +43,7 @@
#define IOAPIC_HIGH 0 #define IOAPIC_HIGH 0
/* DW interrupt controller */ /* DW interrupt controller */
#define DW_ICTL_IRQ_CAVS_OFFSET CAVS_IRQ_NUMBER(DT_INTC_DW_0_IRQ) #define DW_ICTL_IRQ_CAVS_OFFSET CAVS_IRQ_NUMBER(DT_INST_0_SNPS_DESIGNWARE_INTC_IRQ_0)
#define DW_ICTL_NUM_IRQS 9 #define DW_ICTL_NUM_IRQS 9
/* GPIO */ /* GPIO */