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driver: interrupt_controller: dw: convert to DT_INST defines

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Convert driver to use DT_INST_ defines.  The preferred defines for
drivers are DT_INST_.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2020-02-13 14:13:51 -06:00 • committed by Kumar Gala
commit e2d71c9c77
4 changed files with 13 additions and 20 deletions
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10
soc/xtensa/intel_s1000/dts_fixup.h
View file

@ -35,16 +35,6 @@
#define DT_CAVS_ICTL_3_IRQ_PRI DT_INTEL_CAVS_INTC_78830_IRQ_0_PRIORITY
#define DT_CAVS_ICTL_3_IRQ_FLAGS DT_INTEL_CAVS_INTC_78830_IRQ_0_SENSE
#define DT_INTC_DW_0_BASE_ADDR \
DT_SNPS_DESIGNWARE_INTC_81800_BASE_ADDRESS
#define DT_INTC_DW_0_NAME DT_SNPS_DESIGNWARE_INTC_81800_LABEL
#define DT_INTC_DW_0_IRQ DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0
#define DT_INTC_DW_0_IRQ_PRI \
DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0_PRIORITY
#define DT_INTC_DW_0_IRQ_FLAGS \
DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0_SENSE
#define DT_INTC_DW_0_NUM_IRQS DT_SNPS_DESIGNWARE_INTC_81800_NUM_IRQS
#define DT_INST_0_SNPS_DESIGNWARE_SPI_IRQ_FLAGS 0
#define DT_INST_0_SNPS_DESIGNWARE_GPIO_IRQ_0_FLAGS 0

6
soc/xtensa/intel_s1000/soc.c
View file

@ -54,7 +54,7 @@ void z_soc_irq_enable(u32_t irq)
switch (CAVS_IRQ_NUMBER(irq)) {
case DW_ICTL_IRQ_CAVS_OFFSET:
dev_ictl = device_get_binding(DT_INTC_DW_0_NAME);
dev_ictl = device_get_binding(DT_INST_0_SNPS_DESIGNWARE_INTC_LABEL);
break;
default:
/* The source of the interrupt is in CAVS interrupt logic */
@ -112,7 +112,7 @@ void z_soc_irq_disable(u32_t irq)
switch (CAVS_IRQ_NUMBER(irq)) {
case DW_ICTL_IRQ_CAVS_OFFSET:
dev_ictl = device_get_binding(DT_INTC_DW_0_NAME);
dev_ictl = device_get_binding(DT_INST_0_SNPS_DESIGNWARE_INTC_LABEL);
break;
default:
/* The source of the interrupt is in CAVS interrupt logic */
@ -179,7 +179,7 @@ int z_soc_irq_is_enabled(unsigned int irq)
switch (CAVS_IRQ_NUMBER(irq)) {
case DW_ICTL_IRQ_CAVS_OFFSET:
dev_ictl = device_get_binding(DT_INTC_DW_0_NAME);
dev_ictl = device_get_binding(DT_INST_0_SNPS_DESIGNWARE_INTC_LABEL);
break;
default:
/* The source of the interrupt is in CAVS interrupt logic */

2
soc/xtensa/intel_s1000/soc.h
View file

@ -43,7 +43,7 @@
#define IOAPIC_HIGH 0
/* DW interrupt controller */
#define DW_ICTL_IRQ_CAVS_OFFSET CAVS_IRQ_NUMBER(DT_INTC_DW_0_IRQ)
#define DW_ICTL_IRQ_CAVS_OFFSET CAVS_IRQ_NUMBER(DT_INST_0_SNPS_DESIGNWARE_INTC_IRQ_0)
#define DW_ICTL_NUM_IRQS 9
/* GPIO */