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dts: arm: npcx: Add smb-wui prop. to support wake-up from sleep

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Add `smb-wui` property to support wake-up from sleep mode by START
condition when i2c is configured to target mode.

Signed-off-by: Alvis Sun <yfsun@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This commit is contained in:
Mulin Chao 2024-06-05 17:45:00 +08:00 • committed by Benjamin Cabé
commit e2d4b98782
9 changed files with 254 additions and 75 deletions
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6
dts/arm/nuvoton/npcx/npcx-miwus-wui-map.dtsi
View file

@ -89,12 +89,6 @@
wui_iob0: wui0-4-2 {
miwus = <&miwu0 3 2>; /* GPIOB0 */
};
wui_smb0_2: wui0-4-3 {
miwus = <&miwu0 3 3>; /* SMB0/2 */
};
wui_smb1_3: wui0-4-4 {
miwus = <&miwu0 3 4>; /* SMB1/3 */
};
wui_iob1: wui0-4-5 {
miwus = <&miwu0 3 5>; /* GPIOB1 */
};

65
dts/arm/nuvoton/npcx/npcx.dtsi
View file

@ -384,71 +384,6 @@
<&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL5 7>;
};
/* I2c Controllers - Do not use them as i2c node directly */
i2c_ctrl0: i2c@40009000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40009000 0x1000>;
interrupts = <13 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 0>;
status = "disabled";
};
i2c_ctrl1: i2c@4000b000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x4000b000 0x1000>;
interrupts = <14 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 1>;
status = "disabled";
};
i2c_ctrl2: i2c@400c0000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x400c0000 0x1000>;
interrupts = <36 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 2>;
status = "disabled";
};
i2c_ctrl3: i2c@400c2000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x400c2000 0x1000>;
interrupts = <37 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 3>;
status = "disabled";
};
i2c_ctrl4: i2c@40008000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40008000 0x1000>;
interrupts = <19 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 4>;
status = "disabled";
};
i2c_ctrl5: i2c@40017000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40017000 0x1000>;
interrupts = <20 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 0>;
status = "disabled";
};
i2c_ctrl6: i2c@40018000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40018000 0x1000>;
interrupts = <16 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 1>;
status = "disabled";
};
i2c_ctrl7: i2c@40019000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40019000 0x1000>;
interrupts = <8 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 2>;
status = "disabled";
};
tach1: tach@400e1000 {
compatible = "nuvoton,npcx-tach";
reg = <0x400e1000 0x2000>;

73
dts/arm/nuvoton/npcx/npcx4.dtsi
View file

@ -296,6 +296,79 @@
&lvol_iof4 &lvol_iof5 &lvol_none &lvol_none>;
};
/* I2c Controllers - Do not use them as i2c node directly */
i2c_ctrl0: i2c@40009000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40009000 0x1000>;
interrupts = <13 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 0>;
smb-wui = <&wui_smb0>;
status = "disabled";
};
i2c_ctrl1: i2c@4000b000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x4000b000 0x1000>;
interrupts = <14 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 1>;
smb-wui = <&wui_smb1>;
status = "disabled";
};
i2c_ctrl2: i2c@400c0000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x400c0000 0x1000>;
interrupts = <36 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 2>;
smb-wui = <&wui_smb2>;
status = "disabled";
};
i2c_ctrl3: i2c@400c2000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x400c2000 0x1000>;
interrupts = <37 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 3>;
smb-wui = <&wui_smb3>;
status = "disabled";
};
i2c_ctrl4: i2c@40008000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40008000 0x1000>;
interrupts = <19 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 4>;
smb-wui = <&wui_smb4>;
status = "disabled";
};
i2c_ctrl5: i2c@40017000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40017000 0x1000>;
interrupts = <20 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 0>;
smb-wui = <&wui_smb5>;
status = "disabled";
};
i2c_ctrl6: i2c@40018000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40018000 0x1000>;
interrupts = <16 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 1>;
smb-wui = <&wui_smb6>;
status = "disabled";
};
i2c_ctrl7: i2c@40019000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40019000 0x1000>;
interrupts = <8 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 2>;
smb-wui = <&wui_smb7>;
status = "disabled";
};
/* ADC0 comparator configuration in npcx4 series */
adc0: adc@400d1000 {
channel-count = <26>;

10
dts/arm/nuvoton/npcx/npcx4/npcx4-miwus-wui-map.dtsi
View file

@ -19,6 +19,14 @@
miwus = <&miwu0 7 7>; /* GPIOE7 */
};
/* MIWU group D */
wui_smb0: wui0-4-3 {
miwus = <&miwu0 3 3>; /* SMB0 */
};
wui_smb1: wui0-4-4 {
miwus = <&miwu0 3 4>; /* SMB1 */
};
/* MIWU table 1 */
/* MIWU group B */
wui_io13: wui1-2-3 {
@ -82,7 +90,7 @@
miwus = <&miwu2 6 7>; /* I3C1_RSTW */
};
/* MIWU group G */
/* MIWU group H */
wui_i3c2_addrw: wui2-8-0 {
miwus = <&miwu2 7 0>; /* I3C2_ADDRW */
};

73
dts/arm/nuvoton/npcx/npcx7.dtsi
View file

@ -263,6 +263,79 @@
&lvol_iof4 &lvol_iof5 &lvol_none &lvol_none>;
};
/* I2c Controllers - Do not use them as i2c node directly */
i2c_ctrl0: i2c@40009000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40009000 0x1000>;
interrupts = <13 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 0>;
smb-wui = <&wui_smb0_2>;
status = "disabled";
};
i2c_ctrl1: i2c@4000b000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x4000b000 0x1000>;
interrupts = <14 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 1>;
smb-wui = <&wui_smb1_3>;
status = "disabled";
};
i2c_ctrl2: i2c@400c0000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x400c0000 0x1000>;
interrupts = <36 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 2>;
smb-wui = <&wui_smb0_2>;
status = "disabled";
};
i2c_ctrl3: i2c@400c2000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x400c2000 0x1000>;
interrupts = <37 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 3>;
smb-wui = <&wui_smb1_3>;
status = "disabled";
};
i2c_ctrl4: i2c@40008000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40008000 0x1000>;
interrupts = <19 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 4>;
smb-wui = <&wui_smb4>;
status = "disabled";
};
i2c_ctrl5: i2c@40017000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40017000 0x1000>;
interrupts = <20 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 0>;
smb-wui = <&wui_smb5>;
status = "disabled";
};
i2c_ctrl6: i2c@40018000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40018000 0x1000>;
interrupts = <16 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 1>;
smb-wui = <&wui_smb6>;
status = "disabled";
};
i2c_ctrl7: i2c@40019000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40019000 0x1000>;
interrupts = <8 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 2>;
smb-wui = <&wui_smb7>;
status = "disabled";
};
/* ADC0 comparator configuration in npcx7 series */
adc0: adc@400d1000 {
channel-count = <10>;

10
dts/arm/nuvoton/npcx/npcx7/npcx7-miwus-wui-map.dtsi
View file

@ -18,12 +18,18 @@
wui_cr_sin2: wui0-1-6-2 {
miwus = <&miwu0 0 6>; /* CR_SIN2 */
};
/* MIWU group A */
wui_io86: wui0-1-6 {
miwus = <&miwu0 0 6>; /* GPIO86 */
};
/* MIWU group D */
wui_smb0_2: wui0-4-3 {
miwus = <&miwu0 3 3>; /* SMB0/2 */
};
wui_smb1_3: wui0-4-4 {
miwus = <&miwu0 3 4>; /* SMB1/3 */
};
/* MIWU group G */
wui_iod7: wui0-7-6 {
miwus = <&miwu0 6 6>; /* GPIOD7 */

73
dts/arm/nuvoton/npcx/npcx9.dtsi
View file

@ -296,6 +296,79 @@
&lvol_iof4 &lvol_iof5 &lvol_none &lvol_none>;
};
/* I2c Controllers - Do not use them as i2c node directly */
i2c_ctrl0: i2c@40009000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40009000 0x1000>;
interrupts = <13 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 0>;
smb-wui = <&wui_smb0_2>;
status = "disabled";
};
i2c_ctrl1: i2c@4000b000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x4000b000 0x1000>;
interrupts = <14 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 1>;
smb-wui = <&wui_smb1_3>;
status = "disabled";
};
i2c_ctrl2: i2c@400c0000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x400c0000 0x1000>;
interrupts = <36 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 2>;
smb-wui = <&wui_smb0_2>;
status = "disabled";
};
i2c_ctrl3: i2c@400c2000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x400c2000 0x1000>;
interrupts = <37 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 3>;
smb-wui = <&wui_smb1_3>;
status = "disabled";
};
i2c_ctrl4: i2c@40008000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40008000 0x1000>;
interrupts = <19 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 4>;
smb-wui = <&wui_smb4>;
status = "disabled";
};
i2c_ctrl5: i2c@40017000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40017000 0x1000>;
interrupts = <20 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 0>;
smb-wui = <&wui_smb5>;
status = "disabled";
};
i2c_ctrl6: i2c@40018000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40018000 0x1000>;
interrupts = <16 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 1>;
smb-wui = <&wui_smb6>;
status = "disabled";
};
i2c_ctrl7: i2c@40019000 {
compatible = "nuvoton,npcx-i2c-ctrl";
reg = <0x40019000 0x1000>;
interrupts = <8 3>;
clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 2>;
smb-wui = <&wui_smb7>;
status = "disabled";
};
/* ADC0 comparator configuration in npcx9 series */
adc0: adc@400d1000 {
channel-count = <12>;

11
dts/arm/nuvoton/npcx/npcx9/npcx9-miwus-wui-map.dtsi
View file

@ -13,12 +13,21 @@
npcx-miwus-wui-map {
compatible = "nuvoton,npcx-miwu-wui-map";
/* MIWU table 1 */
/* MIWU table 0 */
/* MIWU group A */
wui_cr_sin2: wui0-1-6-2 {
miwus = <&miwu0 0 6>; /* CR_SIN2 */
};
/* MIWU group D */
wui_smb0_2: wui0-4-3 {
miwus = <&miwu0 3 3>; /* SMB0/2 */
};
wui_smb1_3: wui0-4-4 {
miwus = <&miwu0 3 4>; /* SMB1/3 */
};
/* MIWU table 1 */
/* MIWU group G */
wui_io66: wui1-7-6 {
miwus = <&miwu1 6 6>; /* GPIO66 */

8
dts/bindings/i2c/nuvoton,npcx-i2c-ctrl.yaml
View file

@ -12,3 +12,11 @@ properties:
required: true
clocks:
required: true
smb-wui:
type: phandle
required: true
description: |
Mapping table between Wake-Up Input (WUI) and SMB module.
For example the WUI mapping on SMB 4 module would be
smb-wui = <&wui_smb4>;