dts: arm: npcx: Add smb-wui
prop. to support wake-up from sleep
Add `smb-wui` property to support wake-up from sleep mode by START condition when i2c is configured to target mode. Signed-off-by: Alvis Sun <yfsun@nuvoton.com> Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This commit is contained in:
parent
eabef50991
commit
e2d4b98782
9 changed files with 254 additions and 75 deletions
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@ -89,12 +89,6 @@
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wui_iob0: wui0-4-2 {
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miwus = <&miwu0 3 2>; /* GPIOB0 */
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};
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wui_smb0_2: wui0-4-3 {
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miwus = <&miwu0 3 3>; /* SMB0/2 */
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};
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wui_smb1_3: wui0-4-4 {
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miwus = <&miwu0 3 4>; /* SMB1/3 */
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};
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wui_iob1: wui0-4-5 {
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miwus = <&miwu0 3 5>; /* GPIOB1 */
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};
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@ -384,71 +384,6 @@
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<&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL5 7>;
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};
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/* I2c Controllers - Do not use them as i2c node directly */
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i2c_ctrl0: i2c@40009000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40009000 0x1000>;
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interrupts = <13 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 0>;
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status = "disabled";
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};
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i2c_ctrl1: i2c@4000b000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x4000b000 0x1000>;
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interrupts = <14 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 1>;
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status = "disabled";
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};
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i2c_ctrl2: i2c@400c0000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x400c0000 0x1000>;
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interrupts = <36 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 2>;
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status = "disabled";
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};
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i2c_ctrl3: i2c@400c2000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x400c2000 0x1000>;
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interrupts = <37 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 3>;
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status = "disabled";
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};
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i2c_ctrl4: i2c@40008000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40008000 0x1000>;
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interrupts = <19 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 4>;
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status = "disabled";
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};
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i2c_ctrl5: i2c@40017000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40017000 0x1000>;
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interrupts = <20 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 0>;
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status = "disabled";
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};
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i2c_ctrl6: i2c@40018000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40018000 0x1000>;
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interrupts = <16 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 1>;
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status = "disabled";
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};
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i2c_ctrl7: i2c@40019000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40019000 0x1000>;
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interrupts = <8 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 2>;
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status = "disabled";
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};
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tach1: tach@400e1000 {
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compatible = "nuvoton,npcx-tach";
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reg = <0x400e1000 0x2000>;
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@ -296,6 +296,79 @@
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&lvol_iof4 &lvol_iof5 &lvol_none &lvol_none>;
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};
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/* I2c Controllers - Do not use them as i2c node directly */
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i2c_ctrl0: i2c@40009000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40009000 0x1000>;
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interrupts = <13 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 0>;
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smb-wui = <&wui_smb0>;
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status = "disabled";
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};
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i2c_ctrl1: i2c@4000b000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x4000b000 0x1000>;
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interrupts = <14 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 1>;
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smb-wui = <&wui_smb1>;
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status = "disabled";
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};
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i2c_ctrl2: i2c@400c0000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x400c0000 0x1000>;
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interrupts = <36 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 2>;
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smb-wui = <&wui_smb2>;
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status = "disabled";
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};
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i2c_ctrl3: i2c@400c2000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x400c2000 0x1000>;
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interrupts = <37 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 3>;
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smb-wui = <&wui_smb3>;
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status = "disabled";
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};
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i2c_ctrl4: i2c@40008000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40008000 0x1000>;
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interrupts = <19 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 4>;
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smb-wui = <&wui_smb4>;
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status = "disabled";
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};
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i2c_ctrl5: i2c@40017000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40017000 0x1000>;
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interrupts = <20 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 0>;
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smb-wui = <&wui_smb5>;
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status = "disabled";
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};
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i2c_ctrl6: i2c@40018000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40018000 0x1000>;
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interrupts = <16 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 1>;
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smb-wui = <&wui_smb6>;
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status = "disabled";
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};
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i2c_ctrl7: i2c@40019000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40019000 0x1000>;
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interrupts = <8 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 2>;
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smb-wui = <&wui_smb7>;
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status = "disabled";
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};
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/* ADC0 comparator configuration in npcx4 series */
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adc0: adc@400d1000 {
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channel-count = <26>;
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@ -19,6 +19,14 @@
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miwus = <&miwu0 7 7>; /* GPIOE7 */
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};
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/* MIWU group D */
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wui_smb0: wui0-4-3 {
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miwus = <&miwu0 3 3>; /* SMB0 */
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};
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wui_smb1: wui0-4-4 {
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miwus = <&miwu0 3 4>; /* SMB1 */
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};
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/* MIWU table 1 */
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/* MIWU group B */
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wui_io13: wui1-2-3 {
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@ -82,7 +90,7 @@
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miwus = <&miwu2 6 7>; /* I3C1_RSTW */
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};
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/* MIWU group G */
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/* MIWU group H */
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wui_i3c2_addrw: wui2-8-0 {
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miwus = <&miwu2 7 0>; /* I3C2_ADDRW */
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};
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@ -263,6 +263,79 @@
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&lvol_iof4 &lvol_iof5 &lvol_none &lvol_none>;
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};
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/* I2c Controllers - Do not use them as i2c node directly */
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i2c_ctrl0: i2c@40009000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40009000 0x1000>;
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interrupts = <13 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 0>;
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smb-wui = <&wui_smb0_2>;
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status = "disabled";
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};
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i2c_ctrl1: i2c@4000b000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x4000b000 0x1000>;
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interrupts = <14 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 1>;
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smb-wui = <&wui_smb1_3>;
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status = "disabled";
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};
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i2c_ctrl2: i2c@400c0000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x400c0000 0x1000>;
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interrupts = <36 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 2>;
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smb-wui = <&wui_smb0_2>;
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status = "disabled";
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};
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i2c_ctrl3: i2c@400c2000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x400c2000 0x1000>;
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interrupts = <37 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 3>;
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smb-wui = <&wui_smb1_3>;
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status = "disabled";
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};
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i2c_ctrl4: i2c@40008000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40008000 0x1000>;
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interrupts = <19 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 4>;
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smb-wui = <&wui_smb4>;
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status = "disabled";
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};
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i2c_ctrl5: i2c@40017000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40017000 0x1000>;
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interrupts = <20 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 0>;
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smb-wui = <&wui_smb5>;
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status = "disabled";
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};
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i2c_ctrl6: i2c@40018000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40018000 0x1000>;
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interrupts = <16 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 1>;
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smb-wui = <&wui_smb6>;
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status = "disabled";
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};
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i2c_ctrl7: i2c@40019000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40019000 0x1000>;
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interrupts = <8 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 2>;
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smb-wui = <&wui_smb7>;
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status = "disabled";
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};
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/* ADC0 comparator configuration in npcx7 series */
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adc0: adc@400d1000 {
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channel-count = <10>;
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@ -18,12 +18,18 @@
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wui_cr_sin2: wui0-1-6-2 {
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miwus = <&miwu0 0 6>; /* CR_SIN2 */
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};
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/* MIWU group A */
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wui_io86: wui0-1-6 {
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miwus = <&miwu0 0 6>; /* GPIO86 */
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};
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/* MIWU group D */
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wui_smb0_2: wui0-4-3 {
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miwus = <&miwu0 3 3>; /* SMB0/2 */
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};
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wui_smb1_3: wui0-4-4 {
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miwus = <&miwu0 3 4>; /* SMB1/3 */
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};
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/* MIWU group G */
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wui_iod7: wui0-7-6 {
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miwus = <&miwu0 6 6>; /* GPIOD7 */
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@ -296,6 +296,79 @@
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&lvol_iof4 &lvol_iof5 &lvol_none &lvol_none>;
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};
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/* I2c Controllers - Do not use them as i2c node directly */
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i2c_ctrl0: i2c@40009000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40009000 0x1000>;
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interrupts = <13 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 0>;
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smb-wui = <&wui_smb0_2>;
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status = "disabled";
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};
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i2c_ctrl1: i2c@4000b000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x4000b000 0x1000>;
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interrupts = <14 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 1>;
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smb-wui = <&wui_smb1_3>;
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status = "disabled";
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};
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i2c_ctrl2: i2c@400c0000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x400c0000 0x1000>;
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interrupts = <36 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 2>;
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smb-wui = <&wui_smb0_2>;
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status = "disabled";
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};
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i2c_ctrl3: i2c@400c2000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x400c2000 0x1000>;
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interrupts = <37 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB2 NPCX_PWDWN_CTL3 3>;
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smb-wui = <&wui_smb1_3>;
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status = "disabled";
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};
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i2c_ctrl4: i2c@40008000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40008000 0x1000>;
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interrupts = <19 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL3 4>;
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smb-wui = <&wui_smb4>;
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status = "disabled";
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};
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i2c_ctrl5: i2c@40017000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40017000 0x1000>;
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interrupts = <20 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 0>;
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smb-wui = <&wui_smb5>;
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status = "disabled";
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};
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i2c_ctrl6: i2c@40018000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40018000 0x1000>;
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interrupts = <16 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 1>;
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smb-wui = <&wui_smb6>;
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status = "disabled";
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};
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i2c_ctrl7: i2c@40019000 {
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compatible = "nuvoton,npcx-i2c-ctrl";
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reg = <0x40019000 0x1000>;
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interrupts = <8 3>;
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clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL7 2>;
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smb-wui = <&wui_smb7>;
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status = "disabled";
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};
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/* ADC0 comparator configuration in npcx9 series */
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adc0: adc@400d1000 {
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channel-count = <12>;
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npcx-miwus-wui-map {
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compatible = "nuvoton,npcx-miwu-wui-map";
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/* MIWU table 1 */
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/* MIWU table 0 */
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/* MIWU group A */
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wui_cr_sin2: wui0-1-6-2 {
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miwus = <&miwu0 0 6>; /* CR_SIN2 */
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};
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/* MIWU group D */
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wui_smb0_2: wui0-4-3 {
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miwus = <&miwu0 3 3>; /* SMB0/2 */
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};
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wui_smb1_3: wui0-4-4 {
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miwus = <&miwu0 3 4>; /* SMB1/3 */
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};
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/* MIWU table 1 */
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/* MIWU group G */
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wui_io66: wui1-7-6 {
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miwus = <&miwu1 6 6>; /* GPIO66 */
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@ -12,3 +12,11 @@ properties:
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required: true
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clocks:
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required: true
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smb-wui:
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type: phandle
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required: true
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description: |
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Mapping table between Wake-Up Input (WUI) and SMB module.
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For example the WUI mapping on SMB 4 module would be
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smb-wui = <&wui_smb4>;
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