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boards: nrf54h20dk: add cpuflpr target

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Add a new board target to build for the FLPR core.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit is contained in:
Gerard Marull-Paretas 2024-06-27 16:57:48 +02:00 • committed by Carles Cufí
commit e290dfe399
6 changed files with 117 additions and 0 deletions
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1
boards/nordic/nrf54h20dk/Kconfig.nrf54h20dk
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@ -6,3 +6,4 @@ config BOARD_NRF54H20DK
select SOC_NRF54H20_CPURAD if BOARD_NRF54H20DK_NRF54H20_CPURAD
select SOC_NRF54H20_CPUPPR if BOARD_NRF54H20DK_NRF54H20_CPUPPR || \
BOARD_NRF54H20DK_NRF54H20_CPUPPR_XIP
select SOC_NRF54H20_CPUFLPR if BOARD_NRF54H20DK_NRF54H20_CPUFLPR

19
boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-pinctrl.dtsi
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@ -5,6 +5,25 @@
*/
&pinctrl {
/omit-if-no-ref/ uart120_default: uart120_default {
group1 {
psels = <NRF_PSEL(UART_TX, 7, 7)>;
};
group2 {
bias-pull-up;
psels = <NRF_PSEL(UART_RX, 7, 4)>;
};
};
/omit-if-no-ref/ uart120_sleep: uart120_sleep {
group1 {
low-power-enable;
psels = <NRF_PSEL(UART_TX, 7, 7)>,
<NRF_PSEL(UART_RX, 7, 4)>;
};
};
/omit-if-no-ref/ uart135_default: uart135_default {
group1 {
psels = <NRF_PSEL(UART_TX, 1, 11)>;

12
boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts
View file

@ -208,6 +208,11 @@ ipc0: &cpuapp_cpurad_ipc {
source-memory = <&cpuppr_code_partition>;
};
&cpuflpr_vpr {
execution-memory = <&cpuflpr_code_data>;
source-memory = <&cpuflpr_code_partition>;
};
&gpiote130 {
status = "okay";
owned-channels = <0 1 2 3 4 5 6 7>;
@ -228,6 +233,13 @@ ipc0: &cpuapp_cpurad_ipc {
owned-channels = <4 5 6>;
};
&uart120 {
current-speed = <115200>;
pinctrl-0 = <&uart120_default>;
pinctrl-1 = <&uart120_sleep>;
pinctrl-names = "default", "sleep";
};
&uart135 {
current-speed = <115200>;
pinctrl-0 = <&uart135_default>;

53
boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuflpr.dts Normal file
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@ -0,0 +1,53 @@
/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <nordic/nrf54h20_cpuflpr.dtsi>
#include "nrf54h20dk_nrf54h20-memory_map.dtsi"
#include "nrf54h20dk_nrf54h20-ipc_conf.dtsi"
#include "nrf54h20dk_nrf54h20-pinctrl.dtsi"
/delete-node/ &cpuapp_cpurad_ipc;
/delete-node/ &cpuapp_cpusys_ipc;
/delete-node/ &cpuapp_cpuppr_ipc;
/delete-node/ &cpurad_cpusys_ipc;
/delete-node/ &cpusec_cpuapp_ipc;
/delete-node/ &cpusec_cpurad_ipc;
/ {
compatible = "nordic,nrf54h20dk_nrf54h20-cpuflpr";
model = "Nordic nRF54H20 DK nRF54H20 Fast Lightweight Processor MCU";
#address-cells = <1>;
#size-cells = <1>;
chosen {
zephyr,console = &uart120;
zephyr,code-partition = &cpuflpr_code_partition;
zephyr,flash = &mram1x;
zephyr,sram = &cpuflpr_code_data;
zephyr,shell-uart = &uart120;
};
};
&cpuapp_cpuflpr_ipc {
mbox-names = "tx", "rx";
tx-region = <&cpuflpr_cpuapp_ipc_shm>;
rx-region = <&cpuapp_cpuflpr_ipc_shm>;
};
&grtc {
status = "okay";
owned-channels = <6>;
};
&uart120 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart120_default>;
pinctrl-1 = <&uart120_sleep>;
pinctrl-names = "default", "sleep";
};

18
boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuflpr.yaml Normal file
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@ -0,0 +1,18 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
identifier: nrf54h20dk/nrf54h20/cpuflpr
name: nRF54H20-DK-nRF54H20-FLPR
type: mcu
arch: riscv
toolchain:
- zephyr
sysbuild: true
ram: 46
flash: 46
supported:
- counter
- gpio
- i2c
- pwm
- spi

14
boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuflpr_defconfig Normal file
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@ -0,0 +1,14 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
# Enable UART driver
CONFIG_SERIAL=y
# Enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_USE_DT_CODE_PARTITION=y
# Execute from RAM
CONFIG_XIP=n