dts: bindings: introduce a new compatible for stm32 xSPI flash controller

The new bindings for the stm32 xspi is for new stm32 devices with
XSPI peripherals like the stm32h5 serie. This is close to the octo-spi.
Adapt the flash controller constants to the XSPI model especially.
This is done through a new xspi.h definition file.

Signed-off-by: Francois Ramu <francois.ramu@st.com>

dts/bindings/flash_controller/st,stm32-xspi-nor.yaml

@@ -0,0 +1,53 @@
+# Copyright (c) 2021 - 2024 STMicroelectronics
+# SPDX-License-Identifier: Apache-2.0
+
+description: |
+    STM32 XSPI Flash controller supporting the JEDEC CFI interface
+
+    Representation of a serial flash on a xspi bus:
+
+        mx25lm51245: xspi-nor-flash@70000000 {
+                compatible = "st,stm32-xspi-nor";
+                reg = <0x70000000 DT_SIZE_M(64)>; /* 512 Mbits */
+                data-mode = <XSPI_OCTO_MODE>; /* access on 8 data lines */
+                data-rate = <XSPI_DTR_TRANSFER>; /* access in DTR */
+                ospi-max-frequency = <DT_FREQ_M(50)>;
+                status = "okay";
+        };
+
+compatible: "st,stm32-xspi-nor"
+
+include:
+  - name: st,stm32-ospi-nor.yaml
+    property-blocklist:
+      - spi-bus-width
+      - data-rate
+properties:
+  spi-bus-width:
+    type: int
+    required: true
+    description: |
+     The width of XSPI bus to which flash memory is connected.
+
+     Possible values are :
+      - XSPI_SPI_MODE  <1> = SPI mode on 1 data line
+      - XSPI_DUAL_MODE <2> = Dual mode on 2 data lines
+      - XSPI_QUAD_MODE <4> = Quad mode on 4 data lines
+      - XSPI_OCTO_MODE <8> = Octo mode on 8 data lines
+    enum:
+      - 1
+      - 2
+      - 4
+      - 8
+  data-rate:
+    type: int
+    required: true
+    description: |
+     The SPI data Rate is STR or DTR
+
+     Possible values are :
+      - XSPI_STR_TRANSFER <1> = Single Rate Transfer
+      - XSPI_DTR_TRANSFER <2> = Dual Rate Transfer (only with XSPI_OCTO_MODE)
+    enum:
+      - 1
+      - 2

dts/bindings/xspi/st,stm32-xspi.yaml

@@ -0,0 +1,9 @@
+# Copyright (c) 2024 STMicroelectronics
+# SPDX-License-Identifier: Apache-2.0
+
+description: |
+    STM32 XSPI device representation. Enabling a stm32 xspi node in a board
+
+compatible: "st,stm32-xspi"
+
+include: st,stm32-ospi.yaml

include/zephyr/dt-bindings/flash_controller/xspi.h

@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2024 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_XSPI_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_XSPI_H_
+
+/**
+ * @name XSPI definition for the xSPI peripherals
+ * Note that
+ *  SPI mode inpossible in STR transfer rate only
+ */
+
+/* XSPI mode operating on 1 line, 2 lines, 4 lines or 8 lines */
+/* 1 Cmd Line, 1 Address Line and 1 Data Line    */
+#define XSPI_SPI_MODE                     1
+/* 2 Cmd Lines, 2 Address Lines and 2 Data Lines */
+#define XSPI_DUAL_MODE                    2
+/* 4 Cmd Lines, 4 Address Lines and 4 Data Lines */
+#define XSPI_QUAD_MODE                    4
+/* 8 Cmd Lines, 8 Address Lines and 8 Data Lines */
+#define XSPI_OCTO_MODE                    8
+
+/* XSPI mode operating on Single or Double Transfer Rate */
+/* Single Transfer Rate */
+#define XSPI_STR_TRANSFER                 1
+/* Double Transfer Rate */
+#define XSPI_DTR_TRANSFER                 2
+
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_XSPI_H_ */