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drivers: can: mcan: reformat source files

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Reformat source files using clang-format prior to refactoring the driver
code.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit is contained in:
Henrik Brix Andersen 2023-04-24 14:22:14 +02:00 • committed by Stephanos Ioannidis
commit e1fe5e9a1c
3 changed files with 1235 additions and 1302 deletions
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259
drivers/can/can_mcan.c
View file

@ -20,8 +20,7 @@ LOG_MODULE_REGISTER(can_mcan, CONFIG_CAN_LOG_LEVEL);
#define CAN_INIT_TIMEOUT (100)
static void memcpy32_volatile(volatile void *dst_, const volatile void *src_,
size_t len)
static void memcpy32_volatile(volatile void *dst_, const volatile void *src_, size_t len)
{
volatile uint32_t *dst = dst_;
const volatile uint32_t *src = src_;
@ -56,8 +55,7 @@ static int can_exit_sleep_mode(struct can_mcan_reg *can)
start_time = k_cycle_get_32();
while ((can->cccr & CAN_MCAN_CCCR_CSA) == CAN_MCAN_CCCR_CSA) {
if (k_cycle_get_32() - start_time >
k_ms_to_cyc_ceil32(CAN_INIT_TIMEOUT)) {
if (k_cycle_get_32() - start_time > k_ms_to_cyc_ceil32(CAN_INIT_TIMEOUT)) {
can->cccr |= CAN_MCAN_CCCR_CSR;
return -EAGAIN;
}
@ -99,35 +97,29 @@ static int can_leave_init_mode(struct can_mcan_reg *can, k_timeout_t timeout)
return 0;
}
void can_mcan_configure_timing(struct can_mcan_reg *can,
const struct can_timing *timing,
void can_mcan_configure_timing(struct can_mcan_reg *can, const struct can_timing *timing,
const struct can_timing *timing_data)
{
if (timing) {
uint32_t nbtp_sjw = can->nbtp & CAN_MCAN_NBTP_NSJW_MSK;
__ASSERT_NO_MSG(timing->prop_seg == 0);
__ASSERT_NO_MSG(timing->phase_seg1 <= 0x100 &&
timing->phase_seg1 > 0);
__ASSERT_NO_MSG(timing->phase_seg2 <= 0x80 &&
timing->phase_seg2 > 0);
__ASSERT_NO_MSG(timing->prescaler <= 0x200 &&
timing->prescaler > 0);
__ASSERT_NO_MSG(timing->phase_seg1 <= 0x100 && timing->phase_seg1 > 0);
__ASSERT_NO_MSG(timing->phase_seg2 <= 0x80 && timing->phase_seg2 > 0);
__ASSERT_NO_MSG(timing->prescaler <= 0x200 && timing->prescaler > 0);
__ASSERT_NO_MSG(timing->sjw == CAN_SJW_NO_CHANGE ||
(timing->sjw <= 0x80 && timing->sjw > 0));
can->nbtp = (((uint32_t)timing->phase_seg1 - 1UL) & 0xFF) <<
CAN_MCAN_NBTP_NTSEG1_POS |
(((uint32_t)timing->phase_seg2 - 1UL) & 0x7F) <<
CAN_MCAN_NBTP_NTSEG2_POS |
(((uint32_t)timing->prescaler - 1UL) & 0x1FF) <<
CAN_MCAN_NBTP_NBRP_POS;
can->nbtp =
(((uint32_t)timing->phase_seg1 - 1UL) & 0xFF) << CAN_MCAN_NBTP_NTSEG1_POS |
(((uint32_t)timing->phase_seg2 - 1UL) & 0x7F) << CAN_MCAN_NBTP_NTSEG2_POS |
(((uint32_t)timing->prescaler - 1UL) & 0x1FF) << CAN_MCAN_NBTP_NBRP_POS;
if (timing->sjw == CAN_SJW_NO_CHANGE) {
can->nbtp |= nbtp_sjw;
} else {
can->nbtp |= (((uint32_t)timing->sjw - 1UL) & 0x7F) <<
CAN_MCAN_NBTP_NSJW_POS;
can->nbtp |= (((uint32_t)timing->sjw - 1UL) & 0x7F)
<< CAN_MCAN_NBTP_NSJW_POS;
}
}
@ -136,34 +128,30 @@ void can_mcan_configure_timing(struct can_mcan_reg *can,
uint32_t dbtp_sjw = can->dbtp & CAN_MCAN_DBTP_DSJW_MSK;
__ASSERT_NO_MSG(timing_data->prop_seg == 0);
__ASSERT_NO_MSG(timing_data->phase_seg1 <= 0x20 &&
timing_data->phase_seg1 > 0);
__ASSERT_NO_MSG(timing_data->phase_seg2 <= 0x10 &&
timing_data->phase_seg2 > 0);
__ASSERT_NO_MSG(timing_data->prescaler <= 0x20 &&
timing_data->prescaler > 0);
__ASSERT_NO_MSG(timing_data->phase_seg1 <= 0x20 && timing_data->phase_seg1 > 0);
__ASSERT_NO_MSG(timing_data->phase_seg2 <= 0x10 && timing_data->phase_seg2 > 0);
__ASSERT_NO_MSG(timing_data->prescaler <= 0x20 && timing_data->prescaler > 0);
__ASSERT_NO_MSG(timing_data->sjw == CAN_SJW_NO_CHANGE ||
(timing_data->sjw <= 0x80 && timing_data->sjw > 0));
can->dbtp = (((uint32_t)timing_data->phase_seg1 - 1UL) & 0x1F) <<
CAN_MCAN_DBTP_DTSEG1_POS |
(((uint32_t)timing_data->phase_seg2 - 1UL) & 0x0F) <<
CAN_MCAN_DBTP_DTSEG2_POS |
(((uint32_t)timing_data->prescaler - 1UL) & 0x1F) <<
CAN_MCAN_DBTP_DBRP_POS;
can->dbtp = (((uint32_t)timing_data->phase_seg1 - 1UL) & 0x1F)
<< CAN_MCAN_DBTP_DTSEG1_POS |
(((uint32_t)timing_data->phase_seg2 - 1UL) & 0x0F)
<< CAN_MCAN_DBTP_DTSEG2_POS |
(((uint32_t)timing_data->prescaler - 1UL) & 0x1F)
<< CAN_MCAN_DBTP_DBRP_POS;
if (timing_data->sjw == CAN_SJW_NO_CHANGE) {
can->dbtp |= dbtp_sjw;
} else {
can->dbtp |= (((uint32_t)timing_data->sjw - 1UL) & 0x0F) <<
CAN_MCAN_DBTP_DSJW_POS;
can->dbtp |= (((uint32_t)timing_data->sjw - 1UL) & 0x0F)
<< CAN_MCAN_DBTP_DSJW_POS;
}
}
#endif
}
int can_mcan_set_timing(const struct device *dev,
const struct can_timing *timing)
int can_mcan_set_timing(const struct device *dev, const struct can_timing *timing)
{
const struct can_mcan_config *cfg = dev->config;
struct can_mcan_data *data = dev->data;
@ -179,8 +167,7 @@ int can_mcan_set_timing(const struct device *dev,
}
#ifdef CONFIG_CAN_FD_MODE
int can_mcan_set_timing_data(const struct device *dev,
const struct can_timing *timing_data)
int can_mcan_set_timing_data(const struct device *dev, const struct can_timing *timing_data)
{
const struct can_mcan_config *cfg = dev->config;
struct can_mcan_data *data = dev->data;
@ -378,8 +365,7 @@ int can_mcan_init(const struct device *dev)
LOG_DBG("IP rel: %lu.%lu.%lu %02lu.%lu.%lu",
(can->crel & CAN_MCAN_CREL_REL) >> CAN_MCAN_CREL_REL_POS,
(can->crel & CAN_MCAN_CREL_STEP) >> CAN_MCAN_CREL_STEP_POS,
(can->crel & CAN_MCAN_CREL_SUBSTEP) >>
CAN_MCAN_CREL_SUBSTEP_POS,
(can->crel & CAN_MCAN_CREL_SUBSTEP) >> CAN_MCAN_CREL_SUBSTEP_POS,
(can->crel & CAN_MCAN_CREL_YEAR) >> CAN_MCAN_CREL_YEAR_POS,
(can->crel & CAN_MCAN_CREL_MON) >> CAN_MCAN_CREL_MON_POS,
(can->crel & CAN_MCAN_CREL_DAY) >> CAN_MCAN_CREL_DAY_POS);
@ -394,19 +380,18 @@ int can_mcan_init(const struct device *dev)
can->mrba = mrba;
#endif
can->sidfc = (((uint32_t)msg_ram->std_filt - mrba) & CAN_MCAN_SIDFC_FLSSA_MSK) |
(ARRAY_SIZE(msg_ram->std_filt) << CAN_MCAN_SIDFC_LSS_POS);
(ARRAY_SIZE(msg_ram->std_filt) << CAN_MCAN_SIDFC_LSS_POS);
can->xidfc = (((uint32_t)msg_ram->ext_filt - mrba) & CAN_MCAN_XIDFC_FLESA_MSK) |
(ARRAY_SIZE(msg_ram->ext_filt) << CAN_MCAN_XIDFC_LSS_POS);
(ARRAY_SIZE(msg_ram->ext_filt) << CAN_MCAN_XIDFC_LSS_POS);
can->rxf0c = (((uint32_t)msg_ram->rx_fifo0 - mrba) & CAN_MCAN_RXF0C_F0SA) |
(ARRAY_SIZE(msg_ram->rx_fifo0) << CAN_MCAN_RXF0C_F0S_POS);
(ARRAY_SIZE(msg_ram->rx_fifo0) << CAN_MCAN_RXF0C_F0S_POS);
can->rxf1c = (((uint32_t)msg_ram->rx_fifo1 - mrba) & CAN_MCAN_RXF1C_F1SA) |
(ARRAY_SIZE(msg_ram->rx_fifo1) << CAN_MCAN_RXF1C_F1S_POS);
(ARRAY_SIZE(msg_ram->rx_fifo1) << CAN_MCAN_RXF1C_F1S_POS);
can->rxbc = (((uint32_t)msg_ram->rx_buffer - mrba) & CAN_MCAN_RXBC_RBSA);
can->txefc = (((uint32_t)msg_ram->tx_event_fifo - mrba) & CAN_MCAN_TXEFC_EFSA_MSK) |
(ARRAY_SIZE(msg_ram->tx_event_fifo) << CAN_MCAN_TXEFC_EFS_POS);
(ARRAY_SIZE(msg_ram->tx_event_fifo) << CAN_MCAN_TXEFC_EFS_POS);
can->txbc = (((uint32_t)msg_ram->tx_buffer - mrba) & CAN_MCAN_TXBC_TBSA) |
(ARRAY_SIZE(msg_ram->tx_buffer) << CAN_MCAN_TXBC_TFQS_POS) |
CAN_MCAN_TXBC_TFQM;
(ARRAY_SIZE(msg_ram->tx_buffer) << CAN_MCAN_TXBC_TFQS_POS) | CAN_MCAN_TXBC_TFQM;
if (sizeof(msg_ram->tx_buffer[0].data) <= 24) {
can->txesc = (sizeof(msg_ram->tx_buffer[0].data) - 8) / 4;
@ -415,51 +400,45 @@ int can_mcan_init(const struct device *dev)
}
if (sizeof(msg_ram->rx_fifo0[0].data) <= 24) {
can->rxesc = (((sizeof(msg_ram->rx_fifo0[0].data) - 8) / 4) <<
CAN_MCAN_RXESC_F0DS_POS) |
(((sizeof(msg_ram->rx_fifo1[0].data) - 8) / 4) <<
CAN_MCAN_RXESC_F1DS_POS) |
(((sizeof(msg_ram->rx_buffer[0].data) - 8) / 4) <<
CAN_MCAN_RXESC_RBDS_POS);
can->rxesc =
(((sizeof(msg_ram->rx_fifo0[0].data) - 8) / 4) << CAN_MCAN_RXESC_F0DS_POS) |
(((sizeof(msg_ram->rx_fifo1[0].data) - 8) / 4) << CAN_MCAN_RXESC_F1DS_POS) |
(((sizeof(msg_ram->rx_buffer[0].data) - 8) / 4) << CAN_MCAN_RXESC_RBDS_POS);
} else {
can->rxesc = (((sizeof(msg_ram->rx_fifo0[0].data) - 32)
/ 16 + 5) << CAN_MCAN_RXESC_F0DS_POS) |
(((sizeof(msg_ram->rx_fifo1[0].data) - 32)
/ 16 + 5) << CAN_MCAN_RXESC_F1DS_POS) |
(((sizeof(msg_ram->rx_buffer[0].data) - 32)
/ 16 + 5) << CAN_MCAN_RXESC_RBDS_POS);
can->rxesc = (((sizeof(msg_ram->rx_fifo0[0].data) - 32) / 16 + 5)
<< CAN_MCAN_RXESC_F0DS_POS) |
(((sizeof(msg_ram->rx_fifo1[0].data) - 32) / 16 + 5)
<< CAN_MCAN_RXESC_F1DS_POS) |
(((sizeof(msg_ram->rx_buffer[0].data) - 32) / 16 + 5)
<< CAN_MCAN_RXESC_RBDS_POS);
}
#endif
can->cccr &= ~(CAN_MCAN_CCCR_FDOE | CAN_MCAN_CCCR_BRSE |
CAN_MCAN_CCCR_TEST | CAN_MCAN_CCCR_MON |
CAN_MCAN_CCCR_ASM);
can->cccr &= ~(CAN_MCAN_CCCR_FDOE | CAN_MCAN_CCCR_BRSE | CAN_MCAN_CCCR_TEST |
CAN_MCAN_CCCR_MON | CAN_MCAN_CCCR_ASM);
can->test &= ~(CAN_MCAN_TEST_LBCK);
#if defined(CONFIG_CAN_DELAY_COMP) && defined(CONFIG_CAN_FD_MODE)
can->dbtp |= CAN_MCAN_DBTP_TDC;
can->tdcr |= cfg->tx_delay_comp_offset << CAN_MCAN_TDCR_TDCO_POS;
can->tdcr |= cfg->tx_delay_comp_offset << CAN_MCAN_TDCR_TDCO_POS;
#endif
#ifdef CONFIG_CAN_STM32FD
can->rxgfc |= (CONFIG_CAN_MAX_STD_ID_FILTER << CAN_MCAN_RXGFC_LSS_POS) |
(CONFIG_CAN_MAX_EXT_ID_FILTER << CAN_MCAN_RXGFC_LSE_POS) |
(0x2 << CAN_MCAN_RXGFC_ANFS_POS) |
(0x2 << CAN_MCAN_RXGFC_ANFE_POS);
(0x2 << CAN_MCAN_RXGFC_ANFS_POS) | (0x2 << CAN_MCAN_RXGFC_ANFE_POS);
#else
can->gfc |= (0x2 << CAN_MCAN_GFC_ANFE_POS) |
(0x2 << CAN_MCAN_GFC_ANFS_POS);
can->gfc |= (0x2 << CAN_MCAN_GFC_ANFE_POS) | (0x2 << CAN_MCAN_GFC_ANFS_POS);
#endif /* CONFIG_CAN_STM32FD */
if (cfg->sample_point) {
ret = can_calc_timing(dev, &timing, cfg->bus_speed,
cfg->sample_point);
ret = can_calc_timing(dev, &timing, cfg->bus_speed, cfg->sample_point);
if (ret == -EINVAL) {
LOG_ERR("Can't find timing for given param");
return -EIO;
}
LOG_DBG("Presc: %d, TS1: %d, TS2: %d",
timing.prescaler, timing.phase_seg1, timing.phase_seg2);
LOG_DBG("Presc: %d, TS1: %d, TS2: %d", timing.prescaler, timing.phase_seg1,
timing.phase_seg2);
LOG_DBG("Sample-point err : %d", ret);
} else if (cfg->prop_ts1) {
timing.prop_seg = 0;
@ -472,8 +451,7 @@ int can_mcan_init(const struct device *dev)
}
#ifdef CONFIG_CAN_FD_MODE
if (cfg->sample_point_data) {
ret = can_calc_timing_data(dev, &timing_data,
cfg->bus_speed_data,
ret = can_calc_timing_data(dev, &timing_data, cfg->bus_speed_data,
cfg->sample_point_data);
if (ret == -EINVAL) {
LOG_ERR("Can't find timing for given dataphase param");
@ -485,8 +463,7 @@ int can_mcan_init(const struct device *dev)
timing_data.prop_seg = 0;
timing_data.phase_seg1 = cfg->prop_ts1_data;
timing_data.phase_seg2 = cfg->ts2_data;
ret = can_calc_prescaler(dev, &timing_data,
cfg->bus_speed_data);
ret = can_calc_prescaler(dev, &timing_data, cfg->bus_speed_data);
if (ret) {
LOG_WRN("Dataphase bitrate error: %d", ret);
}
@ -501,10 +478,9 @@ int can_mcan_init(const struct device *dev)
can_mcan_configure_timing(can, &timing, NULL);
#endif
can->ie = CAN_MCAN_IE_BO | CAN_MCAN_IE_EW | CAN_MCAN_IE_EP |
CAN_MCAN_IE_MRAF | CAN_MCAN_IE_TEFL | CAN_MCAN_IE_TEFN |
CAN_MCAN_IE_RF0N | CAN_MCAN_IE_RF1N | CAN_MCAN_IE_RF0L |
CAN_MCAN_IE_RF1L;
can->ie = CAN_MCAN_IE_BO | CAN_MCAN_IE_EW | CAN_MCAN_IE_EP | CAN_MCAN_IE_MRAF |
CAN_MCAN_IE_TEFL | CAN_MCAN_IE_TEFN | CAN_MCAN_IE_RF0N | CAN_MCAN_IE_RF1N |
CAN_MCAN_IE_RF0L | CAN_MCAN_IE_RF1L;
#ifdef CONFIG_CAN_STM32FD
can->ils = CAN_MCAN_ILS_RXFIFO0 | CAN_MCAN_ILS_RXFIFO1;
@ -547,8 +523,7 @@ static void can_mcan_tc_event_handler(const struct device *dev)
uint32_t event_idx, tx_idx;
while (can->txefs & CAN_MCAN_TXEFS_EFFL) {
event_idx = (can->txefs & CAN_MCAN_TXEFS_EFGI) >>
CAN_MCAN_TXEFS_EFGI_POS;
event_idx = (can->txefs & CAN_MCAN_TXEFS_EFGI) >> CAN_MCAN_TXEFS_EFGI_POS;
sys_cache_data_invd_range((void *)&msg_ram->tx_event_fifo[event_idx],
sizeof(struct can_mcan_tx_event_fifo));
tx_event = &msg_ram->tx_event_fifo[event_idx];
@ -571,10 +546,8 @@ void can_mcan_line_0_isr(const struct device *dev)
struct can_mcan_reg *can = cfg->can;
do {
if (can->ir & (CAN_MCAN_IR_BO | CAN_MCAN_IR_EP |
CAN_MCAN_IR_EW)) {
can->ir = CAN_MCAN_IR_BO | CAN_MCAN_IR_EP |
CAN_MCAN_IR_EW;
if (can->ir & (CAN_MCAN_IR_BO | CAN_MCAN_IR_EP | CAN_MCAN_IR_EW)) {
can->ir = CAN_MCAN_IR_BO | CAN_MCAN_IR_EP | CAN_MCAN_IR_EW;
can_mcan_state_change_handler(dev);
}
/* TX event FIFO new entry */
@ -590,21 +563,20 @@ void can_mcan_line_0_isr(const struct device *dev)
}
if (can->ir & CAN_MCAN_IR_ARA) {
can->ir = CAN_MCAN_IR_ARA;
can->ir = CAN_MCAN_IR_ARA;
LOG_ERR("Access to reserved address");
}
if (can->ir & CAN_MCAN_IR_MRAF) {
can->ir = CAN_MCAN_IR_MRAF;
can->ir = CAN_MCAN_IR_MRAF;
LOG_ERR("Message RAM access failure");
}
} while (can->ir & (CAN_MCAN_IR_BO | CAN_MCAN_IR_EW | CAN_MCAN_IR_EP |
CAN_MCAN_IR_TEFL | CAN_MCAN_IR_TEFN));
} while (can->ir & (CAN_MCAN_IR_BO | CAN_MCAN_IR_EW | CAN_MCAN_IR_EP | CAN_MCAN_IR_TEFL |
CAN_MCAN_IR_TEFN));
}
static void can_mcan_get_message(const struct device *dev,
volatile struct can_mcan_rx_fifo *fifo,
static void can_mcan_get_message(const struct device *dev, volatile struct can_mcan_rx_fifo *fifo,
volatile uint32_t *fifo_status_reg,
volatile uint32_t *fifo_ack_reg)
{
@ -620,13 +592,11 @@ static void can_mcan_get_message(const struct device *dev,
bool fd_frame_filter;
while ((*fifo_status_reg & CAN_MCAN_RXF0S_F0FL)) {
get_idx = (*fifo_status_reg & CAN_MCAN_RXF0S_F0GI) >>
CAN_MCAN_RXF0S_F0GI_POS;
get_idx = (*fifo_status_reg & CAN_MCAN_RXF0S_F0GI) >> CAN_MCAN_RXF0S_F0GI_POS;
sys_cache_data_invd_range((void *)&fifo[get_idx].hdr,
sizeof(struct can_mcan_rx_fifo_hdr));
memcpy32_volatile(&hdr, &fifo[get_idx].hdr,
sizeof(struct can_mcan_rx_fifo_hdr));
memcpy32_volatile(&hdr, &fifo[get_idx].hdr, sizeof(struct can_mcan_rx_fifo_hdr));
frame.dlc = hdr.dlc;
@ -685,13 +655,11 @@ static void can_mcan_get_message(const struct device *dev,
if ((frame.flags & CAN_FRAME_IDE) != 0) {
LOG_DBG("Frame on filter %d, ID: 0x%x",
filt_idx + NUM_STD_FILTER_DATA,
frame.id);
filt_idx + NUM_STD_FILTER_DATA, frame.id);
cb = data->rx_cb_ext[filt_idx];
cb_arg = data->cb_arg_ext[filt_idx];
} else {
LOG_DBG("Frame on filter %d, ID: 0x%x",
filt_idx, frame.id);
LOG_DBG("Frame on filter %d, ID: 0x%x", filt_idx, frame.id);
cb = data->rx_cb_std[filt_idx];
cb_arg = data->cb_arg_std[filt_idx];
}
@ -718,31 +686,29 @@ void can_mcan_line_1_isr(const struct device *dev)
do {
if (can->ir & CAN_MCAN_IR_RF0N) {
can->ir = CAN_MCAN_IR_RF0N;
can->ir = CAN_MCAN_IR_RF0N;
LOG_DBG("RX FIFO0 INT");
can_mcan_get_message(dev, msg_ram->rx_fifo0,
&can->rxf0s, &can->rxf0a);
can_mcan_get_message(dev, msg_ram->rx_fifo0, &can->rxf0s, &can->rxf0a);
}
if (can->ir & CAN_MCAN_IR_RF1N) {
can->ir = CAN_MCAN_IR_RF1N;
can->ir = CAN_MCAN_IR_RF1N;
LOG_DBG("RX FIFO1 INT");
can_mcan_get_message(dev, msg_ram->rx_fifo1,
&can->rxf1s, &can->rxf1a);
can_mcan_get_message(dev, msg_ram->rx_fifo1, &can->rxf1s, &can->rxf1a);
}
if (can->ir & CAN_MCAN_IR_RF0L) {
can->ir = CAN_MCAN_IR_RF0L;
can->ir = CAN_MCAN_IR_RF0L;
LOG_ERR("Message lost on FIFO0");
}
if (can->ir & CAN_MCAN_IR_RF1L) {
can->ir = CAN_MCAN_IR_RF1L;
can->ir = CAN_MCAN_IR_RF1L;
LOG_ERR("Message lost on FIFO1");
}
} while (can->ir & (CAN_MCAN_IR_RF0N | CAN_MCAN_IR_RF1N |
CAN_MCAN_IR_RF0L | CAN_MCAN_IR_RF1L));
} while (can->ir &
(CAN_MCAN_IR_RF0N | CAN_MCAN_IR_RF1N | CAN_MCAN_IR_RF0L | CAN_MCAN_IR_RF1L));
}
int can_mcan_get_state(const struct device *dev, enum can_state *state,
@ -767,11 +733,9 @@ int can_mcan_get_state(const struct device *dev, enum can_state *state,
}
if (err_cnt != NULL) {
err_cnt->tx_err_cnt = (can->ecr & CAN_MCAN_ECR_TEC_MSK) <<
CAN_MCAN_ECR_TEC_POS;
err_cnt->tx_err_cnt = (can->ecr & CAN_MCAN_ECR_TEC_MSK) << CAN_MCAN_ECR_TEC_POS;
err_cnt->rx_err_cnt = (can->ecr & CAN_MCAN_ECR_REC_MSK) <<
CAN_MCAN_ECR_REC_POS;
err_cnt->rx_err_cnt = (can->ecr & CAN_MCAN_ECR_REC_MSK) << CAN_MCAN_ECR_REC_POS;
}
return 0;
@ -792,10 +756,7 @@ int can_mcan_recover(const struct device *dev, k_timeout_t timeout)
}
#endif /* CONFIG_CAN_AUTO_BUS_OFF_RECOVERY */
int can_mcan_send(const struct device *dev,
const struct can_frame *frame,
k_timeout_t timeout,
int can_mcan_send(const struct device *dev, const struct can_frame *frame, k_timeout_t timeout,
can_tx_callback_t callback, void *user_data)
{
const struct can_mcan_config *cfg = dev->config;
@ -811,7 +772,7 @@ int can_mcan_send(const struct device *dev,
#ifdef CONFIG_CAN_FD_MODE
.fdf = (frame->flags & CAN_FRAME_FDF) != 0 ? 1U : 0U,
.brs = (frame->flags & CAN_FRAME_BRS) != 0 ? 1U : 0U,
#else /* CONFIG_CAN_FD_MODE */
#else /* CONFIG_CAN_FD_MODE */
.fdf = 0U,
.brs = 0U,
#endif /* !CONFIG_CAN_FD_MODE */
@ -821,8 +782,7 @@ int can_mcan_send(const struct device *dev,
int ret;
struct can_mcan_mm mm;
LOG_DBG("Sending %d bytes. Id: 0x%x, ID type: %s %s %s %s",
data_length, frame->id,
LOG_DBG("Sending %d bytes. Id: 0x%x, ID type: %s %s %s %s", data_length, frame->id,
(frame->flags & CAN_FRAME_IDE) != 0 ? "extended" : "standard",
(frame->flags & CAN_FRAME_RTR) != 0 ? "RTR" : "",
(frame->flags & CAN_FRAME_FDF) != 0 ? "FD frame" : "",
@ -831,8 +791,8 @@ int can_mcan_send(const struct device *dev,
__ASSERT_NO_MSG(callback != NULL);
#ifdef CONFIG_CAN_FD_MODE
if ((frame->flags & ~(CAN_FRAME_IDE | CAN_FRAME_RTR |
CAN_FRAME_FDF | CAN_FRAME_BRS)) != 0) {
if ((frame->flags & ~(CAN_FRAME_IDE | CAN_FRAME_RTR | CAN_FRAME_FDF | CAN_FRAME_BRS)) !=
0) {
LOG_ERR("unsupported CAN frame flags 0x%02x", frame->flags);
return -ENOTSUP;
}
@ -846,7 +806,7 @@ int can_mcan_send(const struct device *dev,
LOG_ERR("CAN-FD BRS not supported in non-FD mode");
return -ENOTSUP;
}
#else /* CONFIG_CAN_FD_MODE */
#else /* CONFIG_CAN_FD_MODE */
if ((frame->flags & ~(CAN_FRAME_IDE | CAN_FRAME_RTR)) != 0) {
LOG_ERR("unsupported CAN frame flags 0x%02x", frame->flags);
return -ENOTSUP;
@ -854,8 +814,8 @@ int can_mcan_send(const struct device *dev,
#endif /* !CONFIG_CAN_FD_MODE */
if (data_length > sizeof(frame->data)) {
LOG_ERR("data length (%zu) > max frame data length (%zu)",
data_length, sizeof(frame->data));
LOG_ERR("data length (%zu) > max frame data length (%zu)", data_length,
sizeof(frame->data));
return -EINVAL;
}
@ -884,13 +844,11 @@ int can_mcan_send(const struct device *dev,
return -EAGAIN;
}
__ASSERT_NO_MSG((can->txfqs & CAN_MCAN_TXFQS_TFQF) !=
CAN_MCAN_TXFQS_TFQF);
__ASSERT_NO_MSG((can->txfqs & CAN_MCAN_TXFQS_TFQF) != CAN_MCAN_TXFQS_TFQF);
k_mutex_lock(&data->tx_mtx, K_FOREVER);
put_idx = ((can->txfqs & CAN_MCAN_TXFQS_TFQPI) >>
CAN_MCAN_TXFQS_TFQPI_POS);
put_idx = ((can->txfqs & CAN_MCAN_TXFQS_TFQPI) >> CAN_MCAN_TXFQS_TFQPI_POS);
mm.idx = put_idx;
mm.cnt = data->mm.cnt++;
@ -946,17 +904,13 @@ int can_mcan_get_max_filters(const struct device *dev, bool ide)
* Dual mode gets tricky, because we can only activate both filters.
* If one of the IDs is not used anymore, we would need to mark it as unused.
*/
int can_mcan_add_rx_filter_std(const struct device *dev,
can_rx_callback_t callback, void *user_data,
const struct can_filter *filter)
int can_mcan_add_rx_filter_std(const struct device *dev, can_rx_callback_t callback,
void *user_data, const struct can_filter *filter)
{
struct can_mcan_data *data = dev->data;
struct can_mcan_msg_sram *msg_ram = data->msg_ram;
struct can_mcan_std_filter filter_element = {
.id1 = filter->id,
.id2 = filter->mask,
.sft = CAN_MCAN_SFT_MASKED
};
.id1 = filter->id, .id2 = filter->mask, .sft = CAN_MCAN_SFT_MASKED};
int filter_id;
k_mutex_lock(&data->inst_mutex, K_FOREVER);
@ -968,11 +922,10 @@ int can_mcan_add_rx_filter_std(const struct device *dev,
}
/* TODO proper fifo balancing */
filter_element.sfce = filter_id & 0x01 ? CAN_MCAN_FCE_FIFO1 :
CAN_MCAN_FCE_FIFO0;
filter_element.sfce = filter_id & 0x01 ? CAN_MCAN_FCE_FIFO1 : CAN_MCAN_FCE_FIFO0;
memcpy32_volatile(&msg_ram->std_filt[filter_id], &filter_element,
sizeof(struct can_mcan_std_filter));
sizeof(struct can_mcan_std_filter));
sys_cache_data_flush_range((void *)&msg_ram->std_filt[filter_id],
sizeof(struct can_mcan_std_filter));
@ -987,7 +940,7 @@ int can_mcan_add_rx_filter_std(const struct device *dev,
}
if ((filter->flags & (CAN_FILTER_DATA | CAN_FILTER_RTR)) !=
(CAN_FILTER_DATA | CAN_FILTER_RTR)) {
(CAN_FILTER_DATA | CAN_FILTER_RTR)) {
data->std_filt_rtr_mask |= (1U << filter_id);
} else {
data->std_filt_rtr_mask &= ~(1U << filter_id);
@ -1016,17 +969,13 @@ static int can_mcan_get_free_ext(volatile struct can_mcan_ext_filter *filters)
return -ENOSPC;
}
static int can_mcan_add_rx_filter_ext(const struct device *dev,
can_rx_callback_t callback, void *user_data,
const struct can_filter *filter)
static int can_mcan_add_rx_filter_ext(const struct device *dev, can_rx_callback_t callback,
void *user_data, const struct can_filter *filter)
{
struct can_mcan_data *data = dev->data;
struct can_mcan_msg_sram *msg_ram = data->msg_ram;
struct can_mcan_ext_filter filter_element = {
.id2 = filter->mask,
.id1 = filter->id,
.eft = CAN_MCAN_EFT_MASKED
};
.id2 = filter->mask, .id1 = filter->id, .eft = CAN_MCAN_EFT_MASKED};
int filter_id;
k_mutex_lock(&data->inst_mutex, K_FOREVER);
@ -1038,8 +987,7 @@ static int can_mcan_add_rx_filter_ext(const struct device *dev,
}
/* TODO proper fifo balancing */
filter_element.efce = filter_id & 0x01 ? CAN_MCAN_FCE_FIFO1 :
CAN_MCAN_FCE_FIFO0;
filter_element.efce = filter_id & 0x01 ? CAN_MCAN_FCE_FIFO1 : CAN_MCAN_FCE_FIFO0;
memcpy32_volatile(&msg_ram->ext_filt[filter_id], &filter_element,
sizeof(struct can_mcan_ext_filter));
@ -1057,7 +1005,7 @@ static int can_mcan_add_rx_filter_ext(const struct device *dev,
}
if ((filter->flags & (CAN_FILTER_DATA | CAN_FILTER_RTR)) !=
(CAN_FILTER_DATA | CAN_FILTER_RTR)) {
(CAN_FILTER_DATA | CAN_FILTER_RTR)) {
data->ext_filt_rtr_mask |= (1U << filter_id);
} else {
data->ext_filt_rtr_mask &= ~(1U << filter_id);
@ -1075,8 +1023,7 @@ static int can_mcan_add_rx_filter_ext(const struct device *dev,
return filter_id;
}
int can_mcan_add_rx_filter(const struct device *dev,
can_rx_callback_t callback, void *user_data,
int can_mcan_add_rx_filter(const struct device *dev, can_rx_callback_t callback, void *user_data,
const struct can_filter *filter)
{
int filter_id;
@ -1085,10 +1032,9 @@ int can_mcan_add_rx_filter(const struct device *dev,
return -EINVAL;
}
#ifdef CONFIG_CAN_FD_MODE
if ((filter->flags & ~(CAN_FILTER_IDE | CAN_FILTER_DATA |
CAN_FILTER_RTR | CAN_FILTER_FDF)) != 0) {
if ((filter->flags &
~(CAN_FILTER_IDE | CAN_FILTER_DATA | CAN_FILTER_RTR | CAN_FILTER_FDF)) != 0) {
#else
if ((filter->flags & ~(CAN_FILTER_IDE | CAN_FILTER_DATA | CAN_FILTER_RTR)) != 0) {
#endif
@ -1136,8 +1082,7 @@ void can_mcan_remove_rx_filter(const struct device *dev, int filter_id)
}
void can_mcan_set_state_change_callback(const struct device *dev,
can_state_change_callback_t callback,
void *user_data)
can_state_change_callback_t callback, void *user_data)
{
struct can_mcan_data *data = dev->data;

228
drivers/can/can_mcan.h
View file

@ -23,10 +23,10 @@
#define NUM_STD_FILTER_ELEMENTS DT_PROP(MCAN_DT_PATH, std_filter_elements)
#define NUM_EXT_FILTER_ELEMENTS DT_PROP(MCAN_DT_PATH, ext_filter_elements)
#define NUM_RX_FIFO0_ELEMENTS DT_PROP(MCAN_DT_PATH, rx_fifo0_elements)
#define NUM_RX_FIFO1_ELEMENTS DT_PROP(MCAN_DT_PATH, rx_fifo0_elements)
#define NUM_RX_BUF_ELEMENTS DT_PROP(MCAN_DT_PATH, rx_buffer_elements)
#define NUM_TX_BUF_ELEMENTS DT_PROP(MCAN_DT_PATH, tx_buffer_elements)
#define NUM_RX_FIFO0_ELEMENTS DT_PROP(MCAN_DT_PATH, rx_fifo0_elements)
#define NUM_RX_FIFO1_ELEMENTS DT_PROP(MCAN_DT_PATH, rx_fifo0_elements)
#define NUM_RX_BUF_ELEMENTS DT_PROP(MCAN_DT_PATH, rx_buffer_elements)
#define NUM_TX_BUF_ELEMENTS DT_PROP(MCAN_DT_PATH, tx_buffer_elements)
#ifdef CONFIG_CAN_STM32FD
#define NUM_STD_FILTER_DATA CONFIG_CAN_MAX_STD_ID_FILTER
@ -39,120 +39,120 @@
struct can_mcan_rx_fifo_hdr {
union {
struct {
volatile uint32_t ext_id : 29; /* Extended Identifier */
volatile uint32_t rtr : 1; /* Remote Transmission Request*/
volatile uint32_t xtd : 1; /* Extended identifier */
volatile uint32_t esi : 1; /* Error state indicator */
volatile uint32_t ext_id: 29; /* Extended Identifier */
volatile uint32_t rtr: 1; /* Remote Transmission Request*/
volatile uint32_t xtd: 1; /* Extended identifier */
volatile uint32_t esi: 1; /* Error state indicator */
};
struct {
volatile uint32_t pad1 : 18;
volatile uint32_t std_id : 11; /* Standard Identifier */
volatile uint32_t pad2 : 3;
volatile uint32_t pad1: 18;
volatile uint32_t std_id: 11; /* Standard Identifier */
volatile uint32_t pad2: 3;
};
};
volatile uint32_t rxts : 16; /* Rx timestamp */
volatile uint32_t dlc : 4; /* Data Length Code */
volatile uint32_t brs : 1; /* Bit Rate Switch */
volatile uint32_t fdf : 1; /* FD Format */
volatile uint32_t res : 2; /* Reserved */
volatile uint32_t fidx : 7; /* Filter Index */
volatile uint32_t anmf : 1; /* Accepted non-matching frame */
volatile uint32_t rxts: 16; /* Rx timestamp */
volatile uint32_t dlc: 4; /* Data Length Code */
volatile uint32_t brs: 1; /* Bit Rate Switch */
volatile uint32_t fdf: 1; /* FD Format */
volatile uint32_t res: 2; /* Reserved */
volatile uint32_t fidx: 7; /* Filter Index */
volatile uint32_t anmf: 1; /* Accepted non-matching frame */
} __packed __aligned(4);
struct can_mcan_rx_fifo {
struct can_mcan_rx_fifo_hdr hdr;
union {
volatile uint8_t data[64];
volatile uint8_t data[64];
volatile uint32_t data_32[16];
};
} __packed __aligned(4);
struct can_mcan_mm {
volatile uint8_t idx : 5;
volatile uint8_t cnt : 3;
volatile uint8_t idx: 5;
volatile uint8_t cnt: 3;
} __packed;
struct can_mcan_tx_buffer_hdr {
union {
struct {
volatile uint32_t ext_id : 29; /* Identifier */
volatile uint32_t rtr : 1; /* Remote Transmission Request*/
volatile uint32_t xtd : 1; /* Extended identifier */
volatile uint32_t esi : 1; /* Error state indicator */
volatile uint32_t ext_id: 29; /* Identifier */
volatile uint32_t rtr: 1; /* Remote Transmission Request*/
volatile uint32_t xtd: 1; /* Extended identifier */
volatile uint32_t esi: 1; /* Error state indicator */
};
struct {
volatile uint32_t pad1 : 18;
volatile uint32_t std_id : 11; /* Identifier */
volatile uint32_t pad2 : 3;
volatile uint32_t pad1: 18;
volatile uint32_t std_id: 11; /* Identifier */
volatile uint32_t pad2: 3;
};
};
volatile uint16_t res1; /* Reserved */
volatile uint8_t dlc : 4; /* Data Length Code */
volatile uint8_t brs : 1; /* Bit Rate Switch */
volatile uint8_t fdf : 1; /* FD Format */
volatile uint8_t res2 : 1; /* Reserved */
volatile uint8_t efc : 1; /* Event FIFO control (Store Tx events) */
struct can_mcan_mm mm; /* Message marker */
volatile uint16_t res1; /* Reserved */
volatile uint8_t dlc: 4; /* Data Length Code */
volatile uint8_t brs: 1; /* Bit Rate Switch */
volatile uint8_t fdf: 1; /* FD Format */
volatile uint8_t res2: 1; /* Reserved */
volatile uint8_t efc: 1; /* Event FIFO control (Store Tx events) */
struct can_mcan_mm mm; /* Message marker */
} __packed __aligned(4);
struct can_mcan_tx_buffer {
struct can_mcan_tx_buffer_hdr hdr;
union {
volatile uint8_t data[64];
volatile uint8_t data[64];
volatile uint32_t data_32[16];
};
} __packed __aligned(4);
#define CAN_MCAN_TE_TX 0x1 /* TX event */
#define CAN_MCAN_TE_TXC 0x2 /* TX event in spite of cancellation */
#define CAN_MCAN_TE_TX 0x1 /* TX event */
#define CAN_MCAN_TE_TXC 0x2 /* TX event in spite of cancellation */
struct can_mcan_tx_event_fifo {
volatile uint32_t id : 29; /* Identifier */
volatile uint32_t rtr : 1; /* Remote Transmission Request*/
volatile uint32_t xtd : 1; /* Extended identifier */
volatile uint32_t esi : 1; /* Error state indicator */
volatile uint32_t id: 29; /* Identifier */
volatile uint32_t rtr: 1; /* Remote Transmission Request*/
volatile uint32_t xtd: 1; /* Extended identifier */
volatile uint32_t esi: 1; /* Error state indicator */
volatile uint16_t txts; /* TX Timestamp */
volatile uint8_t dlc : 4; /* Data Length Code */
volatile uint8_t brs : 1; /* Bit Rate Switch */
volatile uint8_t fdf : 1; /* FD Format */
volatile uint8_t et : 2; /* Event type */
struct can_mcan_mm mm; /* Message marker */
volatile uint16_t txts; /* TX Timestamp */
volatile uint8_t dlc: 4; /* Data Length Code */
volatile uint8_t brs: 1; /* Bit Rate Switch */
volatile uint8_t fdf: 1; /* FD Format */
volatile uint8_t et: 2; /* Event type */
struct can_mcan_mm mm; /* Message marker */
} __packed __aligned(4);
#define CAN_MCAN_FCE_DISABLE 0x0
#define CAN_MCAN_FCE_FIFO0 0x1
#define CAN_MCAN_FCE_FIFO1 0x2
#define CAN_MCAN_FCE_REJECT 0x3
#define CAN_MCAN_FCE_PRIO 0x4
#define CAN_MCAN_FCE_DISABLE 0x0
#define CAN_MCAN_FCE_FIFO0 0x1
#define CAN_MCAN_FCE_FIFO1 0x2
#define CAN_MCAN_FCE_REJECT 0x3
#define CAN_MCAN_FCE_PRIO 0x4
#define CAN_MCAN_FCE_PRIO_FIFO0 0x5
#define CAN_MCAN_FCE_PRIO_FIFO1 0x7
#define CAN_MCAN_SFT_RANGE 0x0
#define CAN_MCAN_SFT_DUAL 0x1
#define CAN_MCAN_SFT_MASKED 0x2
#define CAN_MCAN_SFT_DISABLED 0x3
#define CAN_MCAN_SFT_RANGE 0x0
#define CAN_MCAN_SFT_DUAL 0x1
#define CAN_MCAN_SFT_MASKED 0x2
#define CAN_MCAN_SFT_DISABLED 0x3
struct can_mcan_std_filter {
volatile uint32_t id2 : 11; /* ID2 for dual or range, mask otherwise */
volatile uint32_t res : 5;
volatile uint32_t id1 : 11;
volatile uint32_t sfce : 3; /* Filter config */
volatile uint32_t sft : 2; /* Filter type */
volatile uint32_t id2: 11; /* ID2 for dual or range, mask otherwise */
volatile uint32_t res: 5;
volatile uint32_t id1: 11;
volatile uint32_t sfce: 3; /* Filter config */
volatile uint32_t sft: 2; /* Filter type */
} __packed __aligned(4);
#define CAN_MCAN_EFT_RANGE_XIDAM 0x0
#define CAN_MCAN_EFT_DUAL 0x1
#define CAN_MCAN_EFT_MASKED 0x2
#define CAN_MCAN_EFT_RANGE 0x3
#define CAN_MCAN_EFT_DUAL 0x1
#define CAN_MCAN_EFT_MASKED 0x2
#define CAN_MCAN_EFT_RANGE 0x3
struct can_mcan_ext_filter {
volatile uint32_t id1 : 29;
volatile uint32_t efce : 3; /* Filter config */
volatile uint32_t id2 : 29; /* ID2 for dual or range, mask otherwise */
volatile uint32_t res : 1;
volatile uint32_t eft : 2; /* Filter type */
volatile uint32_t id1: 29;
volatile uint32_t efce: 3; /* Filter config */
volatile uint32_t id2: 29; /* ID2 for dual or range, mask otherwise */
volatile uint32_t res: 1;
volatile uint32_t eft: 2; /* Filter type */
} __packed __aligned(4);
struct can_mcan_msg_sram {
@ -190,7 +190,7 @@ struct can_mcan_data {
} __aligned(4);
struct can_mcan_config {
struct can_mcan_reg *can; /*!< CAN Registers*/
struct can_mcan_reg *can; /*!< CAN Registers*/
uint32_t bus_speed;
uint32_t bus_speed_data;
uint16_t sjw;
@ -212,51 +212,44 @@ struct can_mcan_config {
struct can_mcan_reg;
#ifdef CONFIG_CAN_FD_MODE
#define CAN_MCAN_DT_CONFIG_GET(node_id, _custom_config) \
{ \
.can = (struct can_mcan_reg *)DT_REG_ADDR_BY_NAME(node_id, m_can), \
.bus_speed = DT_PROP(node_id, bus_speed), \
.sjw = DT_PROP(node_id, sjw), \
.sample_point = DT_PROP_OR(node_id, sample_point, 0), \
.prop_ts1 = DT_PROP_OR(node_id, prop_seg, 0) + \
DT_PROP_OR(node_id, phase_seg1, 0), \
.ts2 = DT_PROP_OR(node_id, phase_seg2, 0), \
.bus_speed_data = DT_PROP(node_id, bus_speed_data), \
.sjw_data = DT_PROP(node_id, sjw_data), \
.sample_point_data = \
DT_PROP_OR(node_id, sample_point_data, 0), \
.prop_ts1_data = DT_PROP_OR(node_id, prop_seg_data, 0) + \
DT_PROP_OR(node_id, phase_seg1_data, 0), \
.ts2_data = DT_PROP_OR(node_id, phase_seg2_data, 0), \
.tx_delay_comp_offset = \
DT_PROP(node_id, tx_delay_comp_offset), \
.phy = DEVICE_DT_GET_OR_NULL(DT_PHANDLE(node_id, phys)), \
.max_bitrate = DT_CAN_TRANSCEIVER_MAX_BITRATE(node_id, 8000000),\
.custom = _custom_config, \
#define CAN_MCAN_DT_CONFIG_GET(node_id, _custom_config) \
{ \
.can = (struct can_mcan_reg *)DT_REG_ADDR_BY_NAME(node_id, m_can), \
.bus_speed = DT_PROP(node_id, bus_speed), .sjw = DT_PROP(node_id, sjw), \
.sample_point = DT_PROP_OR(node_id, sample_point, 0), \
.prop_ts1 = DT_PROP_OR(node_id, prop_seg, 0) + DT_PROP_OR(node_id, phase_seg1, 0), \
.ts2 = DT_PROP_OR(node_id, phase_seg2, 0), \
.bus_speed_data = DT_PROP(node_id, bus_speed_data), \
.sjw_data = DT_PROP(node_id, sjw_data), \
.sample_point_data = DT_PROP_OR(node_id, sample_point_data, 0), \
.prop_ts1_data = DT_PROP_OR(node_id, prop_seg_data, 0) + \
DT_PROP_OR(node_id, phase_seg1_data, 0), \
.ts2_data = DT_PROP_OR(node_id, phase_seg2_data, 0), \
.tx_delay_comp_offset = DT_PROP(node_id, tx_delay_comp_offset), \
.phy = DEVICE_DT_GET_OR_NULL(DT_PHANDLE(node_id, phys)), \
.max_bitrate = DT_CAN_TRANSCEIVER_MAX_BITRATE(node_id, 8000000), \
.custom = _custom_config, \
}
#else /* CONFIG_CAN_FD_MODE */
#define CAN_MCAN_DT_CONFIG_GET(node_id, _custom_config) \
{ \
.can = (struct can_mcan_reg *)DT_REG_ADDR_BY_NAME(node_id, m_can), \
.bus_speed = DT_PROP(node_id, bus_speed), \
.sjw = DT_PROP(node_id, sjw), \
.sample_point = DT_PROP_OR(node_id, sample_point, 0), \
.prop_ts1 = DT_PROP_OR(node_id, prop_seg, 0) + \
DT_PROP_OR(node_id, phase_seg1, 0), \
.ts2 = DT_PROP_OR(node_id, phase_seg2, 0), \
.phy = DEVICE_DT_GET_OR_NULL(DT_PHANDLE(node_id, phys)), \
.max_bitrate = DT_CAN_TRANSCEIVER_MAX_BITRATE(node_id, 1000000),\
.custom = _custom_config, \
#define CAN_MCAN_DT_CONFIG_GET(node_id, _custom_config) \
{ \
.can = (struct can_mcan_reg *)DT_REG_ADDR_BY_NAME(node_id, m_can), \
.bus_speed = DT_PROP(node_id, bus_speed), .sjw = DT_PROP(node_id, sjw), \
.sample_point = DT_PROP_OR(node_id, sample_point, 0), \
.prop_ts1 = DT_PROP_OR(node_id, prop_seg, 0) + DT_PROP_OR(node_id, phase_seg1, 0), \
.ts2 = DT_PROP_OR(node_id, phase_seg2, 0), \
.phy = DEVICE_DT_GET_OR_NULL(DT_PHANDLE(node_id, phys)), \
.max_bitrate = DT_CAN_TRANSCEIVER_MAX_BITRATE(node_id, 1000000), \
.custom = _custom_config, \
}
#endif /* !CONFIG_CAN_FD_MODE */
#define CAN_MCAN_DT_CONFIG_INST_GET(inst, _custom_config) \
#define CAN_MCAN_DT_CONFIG_INST_GET(inst, _custom_config) \
CAN_MCAN_DT_CONFIG_GET(DT_DRV_INST(inst), _custom_config)
#define CAN_MCAN_DATA_INITIALIZER(_msg_ram, _custom_data) \
{ \
.msg_ram = _msg_ram, \
.custom = _custom_data, \
#define CAN_MCAN_DATA_INITIALIZER(_msg_ram, _custom_data) \
{ \
.msg_ram = _msg_ram, .custom = _custom_data, \
}
int can_mcan_get_capabilities(const struct device *dev, can_mode_t *cap);
@ -267,11 +260,9 @@ int can_mcan_stop(const struct device *dev);
int can_mcan_set_mode(const struct device *dev, can_mode_t mode);
int can_mcan_set_timing(const struct device *dev,
const struct can_timing *timing);
int can_mcan_set_timing(const struct device *dev, const struct can_timing *timing);
int can_mcan_set_timing_data(const struct device *dev,
const struct can_timing *timing_data);
int can_mcan_set_timing_data(const struct device *dev, const struct can_timing *timing_data);
int can_mcan_init(const struct device *dev);
@ -281,14 +272,12 @@ void can_mcan_line_1_isr(const struct device *dev);
int can_mcan_recover(const struct device *dev, k_timeout_t timeout);
int can_mcan_send(const struct device *dev, const struct can_frame *frame,
k_timeout_t timeout, can_tx_callback_t callback,
void *user_data);
int can_mcan_send(const struct device *dev, const struct can_frame *frame, k_timeout_t timeout,
can_tx_callback_t callback, void *user_data);
int can_mcan_get_max_filters(const struct device *dev, bool ide);
int can_mcan_add_rx_filter(const struct device *dev,
can_rx_callback_t callback, void *user_data,
int can_mcan_add_rx_filter(const struct device *dev, can_rx_callback_t callback, void *user_data,
const struct can_filter *filter);
void can_mcan_remove_rx_filter(const struct device *dev, int filter_id);
@ -297,8 +286,7 @@ int can_mcan_get_state(const struct device *dev, enum can_state *state,
struct can_bus_err_cnt *err_cnt);
void can_mcan_set_state_change_callback(const struct device *dev,
can_state_change_callback_t callback,
void *user_data);
can_state_change_callback_t callback, void *user_data);
int can_mcan_get_max_bitrate(const struct device *dev, uint32_t *max_bitrate);

2050
drivers/can/can_mcan_priv.h
View file

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