drivers: i2s: Update sam ssc driver to use pinctrl

This update Atmel sam ssc driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format. In addition this
remove DEV_NAME macro at sam xdma driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>

boards/arm/sam_e70_xplained/sam_e70_xplained-common.dtsi

@@ -167,10 +167,12 @@ zephyr_udc0: &usbhs {
 &ssc {
 	status = "okay";
 	label = "I2S_0";
+
+	pinctrl-0 = <&ssc_default>;
+	pinctrl-names = "default";
+
 	dma-names = "rx", "tx";
 	dmas = <&xdmac 22 DMA_PERID_SSC_RX>, <&xdmac 23 DMA_PERID_SSC_TX>;
-	pinctrl-0 = <&pd24b_ssc_rf &pa22a_ssc_rk &pa10c_ssc_rd
-		     &pb0d_ssc_tf &pb1d_ssc_tk &pb5d_ssc_td>;
 };
 
 &can0 {

boards/arm/sam_e70_xplained/sam_e70_xplained-pinctrl.dtsi

@@ -30,6 +30,17 @@
 		};
 	};
 
+	ssc_default: ssc_default {
+		group1 {
+			pinmux = <PD24B_SSC_RF>,
+				 <PA22A_SSC_RK>,
+				 <PA10C_SSC_RD>,
+				 <PB0D_SSC_TF>,
+				 <PB1D_SSC_TK>,
+				 <PB5D_SSC_TD>;
+		};
+	};
+
 	twihs0_default: twihs0_default {
 		group1 {
 			pinmux = <PA4A_TWI0_TWCK>,

boards/arm/sam_v71_xult/sam_v71_xult-common.dtsi

@@ -295,10 +295,12 @@ zephyr_udc0: &usbhs {
 &ssc {
 	status = "okay";
 	label = "I2S_0";
+
+	pinctrl-0 = <&ssc_default>;
+	pinctrl-names = "default";
+
 	dma-names = "rx", "tx";
 	dmas = <&xdmac 22 DMA_PERID_SSC_RX>, <&xdmac 23 DMA_PERID_SSC_TX>;
-	pinctrl-0 = <&pd24b_ssc_rf &pa22a_ssc_rk &pa10c_ssc_rd
-		     &pb0d_ssc_tf &pb1d_ssc_tk &pb5d_ssc_td>;
 };
 
 &can1 {

boards/arm/sam_v71_xult/sam_v71_xult-pinctrl.dtsi

@@ -30,6 +30,17 @@
 		};
 	};
 
+	ssc_default: ssc_default {
+		group1 {
+			pinmux = <PD24B_SSC_RF>,
+				 <PA22A_SSC_RK>,
+				 <PA10C_SSC_RD>,
+				 <PB0D_SSC_TF>,
+				 <PB1D_SSC_TK>,
+				 <PB5D_SSC_TD>;
+		};
+	};
+
 	twihs0_default: twihs0_default {
 		group1 {
 			pinmux = <PA4A_TWI0_TWCK>,

drivers/i2s/i2s_sam_ssc.c

@@ -27,6 +27,7 @@
 #include <init.h>
 #include <drivers/dma.h>
 #include <drivers/i2s.h>
+#include <drivers/pinctrl.h>
 #include <soc.h>
 
 #define LOG_DOMAIN dev_i2s_sam_ssc
@@ -67,8 +68,7 @@ struct i2s_sam_dev_cfg {
 	const struct device *dev_dma;
 	Ssc *regs;
 	void (*irq_config)(void);
-	const struct soc_gpio_pin *pin_list;
+	const struct pinctrl_dev_config *pcfg;
-	uint8_t pin_list_size;
 	uint8_t periph_id;
 	uint8_t irq_id;
 };
@@ -952,6 +952,7 @@ static int i2s_sam_initialize(const struct device *dev)
 	const struct i2s_sam_dev_cfg *const dev_cfg = dev->config;
 	struct i2s_sam_dev_data *const dev_data = dev->data;
 	Ssc *const ssc = dev_cfg->regs;
+	int ret;
 
 	/* Configure interrupts */
 	dev_cfg->irq_config();
@@ -967,7 +968,10 @@ static int i2s_sam_initialize(const struct device *dev)
 	}
 
 	/* Connect pins to the peripheral */
-	soc_gpio_list_configure(dev_cfg->pin_list, dev_cfg->pin_list_size);
+	ret = pinctrl_apply_state(dev_cfg->pcfg, PINCTRL_STATE_DEFAULT);
+	if (ret < 0) {
+		return ret;
+	}
 
 	/* Enable module's clock */
 	soc_pmc_peripheral_enable(dev_cfg->periph_id);
@@ -1004,7 +1008,7 @@ static void i2s0_sam_irq_config(void)
 		    DEVICE_DT_INST_GET(0), 0);
 }
 
-static const struct soc_gpio_pin i2s0_pins[] = ATMEL_SAM_DT_INST_PINS(0);
+PINCTRL_DT_INST_DEFINE(0);
 
 static const struct i2s_sam_dev_cfg i2s0_sam_config = {
 	.dev_dma = DEVICE_DT_GET(DT_INST_DMAS_CTLR_BY_NAME(0, tx)),
@@ -1012,8 +1016,7 @@ static const struct i2s_sam_dev_cfg i2s0_sam_config = {
 	.irq_config = i2s0_sam_irq_config,
 	.periph_id = DT_INST_PROP(0, peripheral_id),
 	.irq_id = DT_INST_IRQN(0),
-	.pin_list = i2s0_pins,
+	.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(0),
-	.pin_list_size = ARRAY_SIZE(i2s0_pins),
 };
 
 struct queue_item rx_0_ring_buf[CONFIG_I2S_SAM_SSC_RX_BLOCK_COUNT + 1];

dts/bindings/arm/atmel,sam-ssc.yaml

@@ -5,7 +5,9 @@ description: Atmel SAM SSC (Synchronous Serial Controller) controller
 
 compatible: "atmel,sam-ssc"
 
-include: base.yaml
+include:
+    - name: base.yaml
+    - name: pinctrl-device.yaml
 
 properties:
     reg:
@@ -19,20 +21,6 @@ properties:
       description: peripheral ID
       required: true
 
-    pinctrl-0:
-      type: phandles
-      description: |
-        PIO pin configuration for RF, RK, RD, TF, TK, & TD signals.
-        We expect that the phandles will reference pinctrl nodes.
-        These nodes will have a nodelabel that matches the Atmel SoC HAL
-        defines and be of the form p<port><pin><periph>_<inst>_<signal>.
-
-        For example the SSC on SAME7x would be
-           pinctrl-0 = <&pd24b_ssc_rf &pa22a_ssc_rk &pa10c_ssc_rd
-                        &pb0d_ssc_tf &pb1d_ssc_tk &pb5d_ssc_td>;
-
-      required: true
-
     dmas:
       required: true
       description: |