drivers: ethernet: enc28j60: Add DT property to set Rx filter
Byte value written to the device's ERXFCON: ETHERNET RECEIVE FILTER CONTROL REGISTER Sets the devices receive packet filter, optional. If not set in device tree previous hard coded value`0xA3` is used. Uni, multi and broadcast packets with valid CRC are accepted. Signed-off-by: Dean Sellers <dsellers@evos.com.au>
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3 changed files with 16 additions and 1 deletions
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@ -338,6 +338,7 @@ static void eth_enc28j60_gpio_callback(const struct device *dev,
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static int eth_enc28j60_init_buffers(const struct device *dev)
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static int eth_enc28j60_init_buffers(const struct device *dev)
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{
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{
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uint8_t data_estat;
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uint8_t data_estat;
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const struct eth_enc28j60_config *config = dev->config;
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/* Reception buffers initialization */
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/* Reception buffers initialization */
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eth_enc28j60_set_bank(dev, ENC28J60_REG_ERXSTL);
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eth_enc28j60_set_bank(dev, ENC28J60_REG_ERXSTL);
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@ -372,7 +373,7 @@ static int eth_enc28j60_init_buffers(const struct device *dev)
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eth_enc28j60_set_bank(dev, ENC28J60_REG_ERXFCON);
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eth_enc28j60_set_bank(dev, ENC28J60_REG_ERXFCON);
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eth_enc28j60_write_reg(dev, ENC28J60_REG_ERXFCON,
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eth_enc28j60_write_reg(dev, ENC28J60_REG_ERXFCON,
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ENC28J60_RECEIVE_FILTERS);
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config->hw_rx_filter);
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/* Waiting for OST */
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/* Waiting for OST */
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/* 32 bits for this timer should be fine, rollover not an issue with initialisation */
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/* 32 bits for this timer should be fine, rollover not an issue with initialisation */
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@ -877,6 +878,7 @@ static int eth_enc28j60_init(const struct device *dev)
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.interrupt = GPIO_DT_SPEC_INST_GET(inst, int_gpios), \
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.interrupt = GPIO_DT_SPEC_INST_GET(inst, int_gpios), \
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.full_duplex = DT_INST_PROP(0, full_duplex), \
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.full_duplex = DT_INST_PROP(0, full_duplex), \
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.timeout = CONFIG_ETH_ENC28J60_TIMEOUT, \
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.timeout = CONFIG_ETH_ENC28J60_TIMEOUT, \
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.hw_rx_filter = DT_INST_PROP_OR(inst, hw_rx_filter, ENC28J60_RECEIVE_FILTERS), \
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}; \
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}; \
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\
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\
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ETH_NET_DEVICE_DT_INST_DEFINE(inst, eth_enc28j60_init, NULL, ð_enc28j60_runtime_##inst, \
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ETH_NET_DEVICE_DT_INST_DEFINE(inst, eth_enc28j60_init, NULL, ð_enc28j60_runtime_##inst, \
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@ -178,6 +178,9 @@
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* - Multicast
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* - Multicast
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* - Broadcast
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* - Broadcast
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* - CRC Check
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* - CRC Check
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*
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* Used as default if hw-rx-filter property
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* absent in DT
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*/
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*/
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#define ENC28J60_RECEIVE_FILTERS 0xA3
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#define ENC28J60_RECEIVE_FILTERS 0xA3
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@ -223,6 +226,7 @@ struct eth_enc28j60_config {
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struct gpio_dt_spec interrupt;
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struct gpio_dt_spec interrupt;
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uint8_t full_duplex;
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uint8_t full_duplex;
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int32_t timeout;
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int32_t timeout;
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uint8_t hw_rx_filter;
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};
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};
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struct eth_enc28j60_runtime {
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struct eth_enc28j60_runtime {
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@ -21,3 +21,12 @@ properties:
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type: boolean
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type: boolean
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description: |
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description: |
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Optional feature flag - Enables full duplex reception and transmission.
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Optional feature flag - Enables full duplex reception and transmission.
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hw-rx-filter:
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type: int
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description: |
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Byte value written to the device's
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ERXFCON: ETHERNET RECEIVE FILTER CONTROL REGISTER
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Sets the devices receive packet filter, optional
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If not set in device tree `0xA3` is used, uni, multi and broadcast
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packets with valid CRC are accepted.
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