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arch: arm: cortex_r: Add MPU and USERSPACE support

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Use Cortex-M code as a basis for adding MPU support for the Cortex-R.

Signed-off-by: Phil Erwin <phil.erwin@lexmark.com>
This commit is contained in:
Phil Erwin 2020-05-03 23:30:12 -04:00 • committed by Christopher Friedt
commit e0bed3b989
13 changed files with 753 additions and 147 deletions
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15
include/arch/arm/aarch32/cortex_a_r/cpu.h
View file

@ -7,6 +7,15 @@
#ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_A_R_CPU_H_
#define ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_A_R_CPU_H_
#if defined(CONFIG_ARM_MPU)
#include <arch/arm/aarch32/cortex_a_r/mpu.h>
#endif
/*
* SCTRL register bit assignments
*/
#define SCTRL_MPU_ENABLE (1 << 0)
#define MODE_USR 0x10
#define MODE_FIQ 0x11
#define MODE_IRQ 0x12
@ -31,4 +40,10 @@
#define FPEXC_EN (1 << 30)
#define DFSR_DOMAIN_SHIFT (4)
#define DFSR_DOMAIN_MASK (0xf)
#define DFSR_FAULT_4_MASK (1 << 10)
#define DFSR_WRITE_MASK (1 << 11)
#define DFSR_AXI_SLAVE_MASK (1 << 12)
#endif /* ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_CORTEX_A_R_CPU_H_ */

67
include/arch/arm/aarch32/cortex_a_r/mpu.h Normal file
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@ -0,0 +1,67 @@
/* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2019 Lexmark International, Inc.
*/
#ifndef ARCH_ARM_CORTEX_R_MPU_H
#define ARCH_ARM_CORTEX_R_MPU_H 1
#define MPU_RBAR_ADDR_Msk (~0x1f)
#define MPU_RASR_ENABLE_Msk (1)
#define MPU_RASR_SIZE_Pos 1U
#define MPU_RASR_SIZE_Msk (0x1FUL << MPU_RASR_SIZE_Pos)
#define MPU_TYPE_DREGION_Pos 8U
#define MPU_TYPE_DREGION_Msk (0xFFUL << MPU_TYPE_DREGION_Pos)
#define MPU_RASR_XN_Pos 12
#define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos)
#define MPU_RASR_AP_Pos 8
#define MPU_RASR_AP_Msk (0x7UL << MPU_RASR_AP_Pos)
#define MPU_RASR_TEX_Pos 3
#define MPU_RASR_TEX_Msk (0x7UL << MPU_RASR_TEX_Pos)
#define MPU_RASR_S_Pos 2
#define MPU_RASR_S_Msk (1UL << MPU_RASR_C_Pos)
#define MPU_RASR_C_Pos 1
#define MPU_RASR_C_Msk (1UL << MPU_RASR_C_Pos)
#define MPU_RASR_B_Pos 0
#define MPU_RASR_B_Msk (1UL << MPU_RASR_B_Pos)
#if defined(CONFIG_CPU_CORTEX_R4) || defined(CONFIG_CPU_CORTEX_R5)
#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U)
#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U)
#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U)
#endif
#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U)
#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U)
#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U)
#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0aU)
#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0bU)
#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0cU)
#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0dU)
#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0eU)
#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0fU)
#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U)
#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U)
#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U)
#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U)
#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U)
#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U)
#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U)
#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U)
#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U)
#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U)
#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1aU)
#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1bU)
#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1cU)
#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1dU)
#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1eU)
#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1fU)
#endif

17
include/arch/arm/aarch32/mpu/arm_mpu.h
View file

@ -9,7 +9,8 @@
#if defined(CONFIG_CPU_CORTEX_M0PLUS) || \
defined(CONFIG_CPU_CORTEX_M3) || \
defined(CONFIG_CPU_CORTEX_M4) || \
defined(CONFIG_CPU_CORTEX_M7)
defined(CONFIG_CPU_CORTEX_M7) || \
defined(CONFIG_CPU_CORTEX_R)
#include <arch/arm/aarch32/mpu/arm_mpu_v7m.h>
#elif defined(CONFIG_CPU_CORTEX_M23) || \
defined(CONFIG_CPU_CORTEX_M33) || \
@ -27,6 +28,10 @@ struct arm_mpu_region {
uint32_t base;
/* Region Name */
const char *name;
#if defined(CONFIG_CPU_CORTEX_R)
/* Region Size */
uint32_t size;
#endif
/* Region Attributes */
arm_mpu_region_attr_t attr;
};
@ -39,12 +44,22 @@ struct arm_mpu_config {
const struct arm_mpu_region *mpu_regions;
};
#if defined(CONFIG_CPU_CORTEX_R)
#define MPU_REGION_ENTRY(_name, _base, _size, _attr) \
{\
.name = _name, \
.base = _base, \
.size = _size, \
.attr = _attr, \
}
#else
#define MPU_REGION_ENTRY(_name, _base, _attr) \
{\
.name = _name, \
.base = _base, \
.attr = _attr, \
}
#endif
/* Reference to the MPU configuration.
*

2
include/arch/arm/aarch32/mpu/arm_mpu_v7m.h
View file

@ -7,7 +7,9 @@
#ifndef _ASMLANGUAGE
#if defined(CONFIG_CPU_CORTEX_M)
#include <arch/arm/aarch32/cortex_m/cmsis.h>
#endif
/* Convenience macros to represent the ARMv7-M-specific
* configuration for memory access permission and