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boards: stm32f030_demo: Use dts for clocks configuration

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Convert board to use of device tree for clocks configuration.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
This commit is contained in:
Alexandre Bourdiol 2021-04-30 17:35:44 +02:00 • committed by Kumar Gala
commit e04e228ea5
2 changed files with 20 additions and 16 deletions
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19
boards/arm/stm32f030_demo/stm32f030_demo.dts
View file

@ -32,6 +32,25 @@
};
};
&clk_hse {
clock-frequency = <DT_FREQ_M(8)>;
status = "okay";
};
&pll {
prediv = <1>;
mul = <6>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(48)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
};
/* Due to limited available memory, don't enable gpioc,d,e,f */
&gpioc {status = "disabled";};
&gpiod {status = "disabled";};

17
boards/arm/stm32f030_demo/stm32f030_demo_defconfig
View file

@ -6,9 +6,6 @@ CONFIG_SOC_SERIES_STM32F0X=y
# Platform Configuration
CONFIG_SOC_STM32F030X4=y
# General Kernel Options
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
# Kernel Options due to Low Memory (4k)
CONFIG_MAIN_STACK_SIZE=640
CONFIG_IDLE_STACK_SIZE=200
@ -29,17 +26,5 @@ CONFIG_PINMUX=y
# GPIO Controller
CONFIG_GPIO=y
# Clock configuration
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# SYSCLK selection
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# HSE configuration
CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
# PLL configuration
CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
# produce 48MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_PREDIV=1
CONFIG_CLOCK_STM32_PLL_MULTIPLIER=6
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=1