michaelh/zephyr
1
0
Fork 0
Code Releases Activity

dts: riscv: esp32c3 rework soc/sip list

Browse source 
Introduce dtsi files representing the
current portfolio of chips and modules
based on the:

- flash size
- psram size
- gpio count
- certification status

Update the boards dts files according
to which SOC/SIP they are using.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
This commit is contained in:
Marek Matej 2023-06-09 01:29:56 +02:00 • committed by Carles Cufí
commit e033bf6e7a
10 changed files with 65 additions and 5 deletions
Download patch file Download diff file Expand all files Collapse all files

2
boards/riscv/esp32c3_devkitm/esp32c3_devkitm.dts
View file

@ -6,7 +6,7 @@
/dts-v1/;
#include <espressif/esp32c3.dtsi>
#include <espressif/esp32c3/esp32c3_mini_n4.dtsi>
#include "esp32c3_devkitm-pinctrl.dtsi"
/ {

2
boards/riscv/icev_wireless/icev_wireless.dts
View file

@ -6,7 +6,7 @@
/dts-v1/;
#include <espressif/esp32c3.dtsi>
#include <espressif/esp32c3/esp32c3_fx4.dtsi>
#include "icev_wireless-pinctrl.dtsi"
/ {

2
boards/riscv/stamp_c3/stamp_c3.dts
View file

@ -6,7 +6,7 @@
/dts-v1/;
#include <espressif/esp32c3.dtsi>
#include <espressif/esp32c3/esp32c3_fx4.dtsi>
#include "stamp_c3-pinctrl.dtsi"
/ {

2
boards/riscv/xiao_esp32c3/xiao_esp32c3.dts
View file

@ -6,7 +6,7 @@
/dts-v1/;
#include <espressif/esp32c3.dtsi>
#include <espressif/esp32c3/esp32c3_fx4.dtsi>
#include "xiao_esp32c3-pinctrl.dtsi"
#include "seeed_xiao_connector.dtsi"

7
dts/riscv/espressif/esp32c3/esp32c3.dtsi Normal file
View file

@ -0,0 +1,7 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32c3_common.dtsi"

7
dts/riscv/espressif/esp32c3.dtsi → dts/riscv/espressif/esp32c3/esp32c3_common.dtsi
View file

@ -129,7 +129,12 @@
reg = <0x60004000 0x800>;
interrupts = <GPIO_INTR_SOURCE>;
interrupt-parent = <&intc>;
ngpios = <32>; /* 0..31 */
/* Maximum available pins (per port)
* Actual occupied pins are specified
* on part number dtsi level, using
* the `gpio-reserved-ranges` property.
*/
ngpios = <26>; /* 0..25 */
};
i2c0: i2c@60013000 {

12
dts/riscv/espressif/esp32c3/esp32c3_fx4.dtsi Normal file
View file

@ -0,0 +1,12 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32c3_common.dtsi"
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};

12
dts/riscv/espressif/esp32c3/esp32c3_mini_n4.dtsi Normal file
View file

@ -0,0 +1,12 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32c3_common.dtsi"
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};

12
dts/riscv/espressif/esp32c3/esp32c3_wroom_h2.dtsi Normal file
View file

@ -0,0 +1,12 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32c3_common.dtsi"
/* 2MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(2)>;
};

12
dts/riscv/espressif/esp32c3/esp32c3_wroom_h4.dtsi Normal file
View file

@ -0,0 +1,12 @@
/*
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "esp32c3_common.dtsi"
/* 4MB flash */
&flash0 {
reg = <0x0 DT_SIZE_M(4)>;
};