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drivers: timer: stm32u5 lptimer waits for DIER complete

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On the stm32U5, when modifying the DIER register of the LPTIM peripheral,
a new write operation to can only be performed when the previous write
operation is completed and before going-on.
This is done with a function call for better readability.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is contained in:
Francois Ramu 2023-02-06 15:48:11 +01:00 • committed by Fabio Baltieri
commit df4fa7088d
1 changed files with 16 additions and 8 deletions
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24
drivers/timer/stm32_lptim_timer.c
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@ -298,6 +298,18 @@ uint32_t sys_clock_cycle_get_32(void)
return (uint32_t)(ret); return (uint32_t)(ret);
} }
/* Wait for the IER register of the stm32U5 ready, after any bit write operation */
void stm32_lptim_wait_ready(void)
{
#ifdef CONFIG_SOC_SERIES_STM32U5X
while (LL_LPTIM_IsActiveFlag_DIEROK(LPTIM) == 0) {
}
LL_LPTIM_ClearFlag_DIEROK(LPTIM);
#else
/* Empty : not relevant */
#endif
}
static int sys_clock_driver_init(const struct device *dev) static int sys_clock_driver_init(const struct device *dev)
{ {
int err; int err;
@ -402,9 +414,7 @@ static int sys_clock_driver_init(const struct device *dev)
LL_LPTIM_Enable(LPTIM); LL_LPTIM_Enable(LPTIM);
LL_LPTIM_DisableIT_CC1(LPTIM); LL_LPTIM_DisableIT_CC1(LPTIM);
while (LL_LPTIM_IsActiveFlag_DIEROK(LPTIM) == 0) { stm32_lptim_wait_ready();
}
LL_LPTIM_ClearFlag_DIEROK(LPTIM);
LL_LPTIM_ClearFLAG_CC1(LPTIM); LL_LPTIM_ClearFLAG_CC1(LPTIM);
#else #else
/* LPTIM interrupt set-up before enabling */ /* LPTIM interrupt set-up before enabling */
@ -415,14 +425,12 @@ static int sys_clock_driver_init(const struct device *dev)
/* Autoreload match Interrupt */ /* Autoreload match Interrupt */
LL_LPTIM_EnableIT_ARRM(LPTIM); LL_LPTIM_EnableIT_ARRM(LPTIM);
#ifdef CONFIG_SOC_SERIES_STM32U5X stm32_lptim_wait_ready();
while (LL_LPTIM_IsActiveFlag_DIEROK(LPTIM) == 0) {
}
LL_LPTIM_ClearFlag_DIEROK(LPTIM);
#endif
LL_LPTIM_ClearFLAG_ARRM(LPTIM); LL_LPTIM_ClearFLAG_ARRM(LPTIM);
/* ARROK bit validates the write operation to ARR register */ /* ARROK bit validates the write operation to ARR register */
LL_LPTIM_EnableIT_ARROK(LPTIM); LL_LPTIM_EnableIT_ARROK(LPTIM);
stm32_lptim_wait_ready();
LL_LPTIM_ClearFlag_ARROK(LPTIM); LL_LPTIM_ClearFlag_ARROK(LPTIM);
accumulated_lptim_cnt = 0; accumulated_lptim_cnt = 0;