diff --git a/dts/arm/nxp/nxp_imx95_m7.dtsi b/dts/arm/nxp/nxp_imx95_m7.dtsi
index a266921c32e..14c8d5574fa 100644
--- a/dts/arm/nxp/nxp_imx95_m7.dtsi
+++ b/dts/arm/nxp/nxp_imx95_m7.dtsi
@@ -50,6 +50,12 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 
+			scmi_devpd: protocol@11 {
+				compatible = "arm,scmi-power";
+				reg = <0x11>;
+				#power-domain-cells = <1>;
+			};
+
 			scmi_clk: protocol@14 {
 				compatible = "arm,scmi-clock";
 				reg = <0x14>;
diff --git a/include/zephyr/dt-bindings/power/imx95_power.h b/include/zephyr/dt-bindings/power/imx95_power.h
new file mode 100644
index 00000000000..164080d2d5d
--- /dev/null
+++ b/include/zephyr/dt-bindings/power/imx95_power.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright 2024 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_POWER_IMX95_POWER_H_
+#define ZEPHYR_INCLUDE_DT_BINDINGS_POWER_IMX95_POWER_H_
+
+#define IMX95_PD_ANA       0
+#define IMX95_PD_AON       1
+#define IMX95_PD_BBSM      2
+#define IMX95_PD_CAMERA    3
+#define IMX95_PD_CCMSRCGPC 4
+#define IMX95_PD_A55C0     5
+#define IMX95_PD_A55C1     6
+#define IMX95_PD_A55C2     7
+#define IMX95_PD_A55C3     8
+#define IMX95_PD_A55C4     9
+#define IMX95_PD_A55C5     10
+#define IMX95_PD_A55P      11
+#define IMX95_PD_DDR       12
+#define IMX95_PD_DISPLAY   13
+#define IMX95_PD_GPU       14
+#define IMX95_PD_HSIO_TOP  15
+#define IMX95_PD_HSIO_WAON 16
+#define IMX95_PD_M7        17
+#define IMX95_PD_NETC      18
+#define IMX95_PD_NOC       19
+#define IMX95_PD_NPU       20
+#define IMX95_PD_VPU       21
+#define IMX95_PD_WAKEUP    22
+
+#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_POWER_IMX95_POWER_H_ */