drivers: pinctrl: support digital-path-disable for Numaker
Add new property digital-path-disable for Nuvoton numaker pinctrl driver. Signed-off-by: cyliang tw <cyliang@nuvoton.com>
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385c6874ef
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de58070fa4
3 changed files with 10 additions and 2 deletions
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@ -16,7 +16,9 @@
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#define GPIO_SIZE DT_REG_SIZE(DT_NODELABEL(gpioa))
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#define GPIO_SIZE DT_REG_SIZE(DT_NODELABEL(gpioa))
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#define SLEWCTL_PIN_SHIFT(pin_idx) ((pin_idx) * 2)
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#define SLEWCTL_PIN_SHIFT(pin_idx) ((pin_idx) * 2)
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#define SLEWCTL_MASK(pin_idx) (3 << SLEWCTL_PIN_SHIFT(pin_idx))
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#define SLEWCTL_MASK(pin_idx) (3 << SLEWCTL_PIN_SHIFT(pin_idx))
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#define DINOFF_PIN_SHIFT(pin_idx) (pin_idx + GPIO_DINOFF_DINOFF0_Pos)
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#define DINOFF_MASK(pin_idx) (1 << DINOFF_PIN_SHIFT(pin_idx))
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static void gpio_configure(const pinctrl_soc_pin_t *pin, uint8_t port_idx, uint8_t pin_idx)
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static void gpio_configure(const pinctrl_soc_pin_t *pin, uint8_t port_idx, uint8_t pin_idx)
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{
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{
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@ -28,7 +30,8 @@ static void gpio_configure(const pinctrl_soc_pin_t *pin, uint8_t port_idx, uint8
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((pin->schmitt_enable ? 1 : 0) << pin_idx);
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((pin->schmitt_enable ? 1 : 0) << pin_idx);
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port->SLEWCTL = (port->SLEWCTL & ~SLEWCTL_MASK(pin_idx)) |
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port->SLEWCTL = (port->SLEWCTL & ~SLEWCTL_MASK(pin_idx)) |
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(pin->slew_rate << SLEWCTL_PIN_SHIFT(pin_idx));
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(pin->slew_rate << SLEWCTL_PIN_SHIFT(pin_idx));
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port->DINOFF = (port->DINOFF & ~DINOFF_MASK(pin_idx)) |
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((pin->digital_disable ? 1 : 0) << DINOFF_PIN_SHIFT(pin_idx));
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}
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}
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/**
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/**
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* Configure pin multi-function
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* Configure pin multi-function
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@ -83,3 +83,6 @@ child-binding:
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Set the speed of a pin. This setting effectively limits the
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Set the speed of a pin. This setting effectively limits the
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slew rate of the output signal. Hardware default configuration is low.
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slew rate of the output signal. Hardware default configuration is low.
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Fast slew rate could support fast speed pins, like as SPI CLK up to 50MHz.
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Fast slew rate could support fast speed pins, like as SPI CLK up to 50MHz.
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digital-path-disable:
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type: boolean
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description: disable digital path on a pin.
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@ -25,6 +25,7 @@ typedef struct pinctrl_soc_pin_t {
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uint32_t open_drain: 1;
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uint32_t open_drain: 1;
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uint32_t schmitt_enable: 1;
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uint32_t schmitt_enable: 1;
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uint32_t slew_rate: 2;
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uint32_t slew_rate: 2;
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uint32_t digital_disable: 1;
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} pinctrl_soc_pin_t;
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} pinctrl_soc_pin_t;
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#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx) \
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#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx) \
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@ -33,6 +34,7 @@ typedef struct pinctrl_soc_pin_t {
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.open_drain = DT_PROP(node_id, drive_open_drain), \
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.open_drain = DT_PROP(node_id, drive_open_drain), \
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.schmitt_enable = DT_PROP(node_id, input_schmitt_enable), \
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.schmitt_enable = DT_PROP(node_id, input_schmitt_enable), \
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.slew_rate = DT_ENUM_IDX(node_id, slew_rate), \
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.slew_rate = DT_ENUM_IDX(node_id, slew_rate), \
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.digital_disable = DT_PROP(node_id, digital_path_disable), \
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},
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},
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#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \
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#define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \
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